llvm.org GIT mirror llvm / 9994b91
Targets: commonize some stack realignment code This patch does the following: * Fix FIXME on `needsStackRealignment`: it is now shared between multiple targets, implemented in `TargetRegisterInfo`, and isn't `virtual` anymore. This will break out-of-tree targets, silently if they used `virtual` and with a build error if they used `override`. * Factor out `canRealignStack` as a `virtual` function on `TargetRegisterInfo`, by default only looks for the `no-realign-stack` function attribute. Multiple targets duplicated the same `needsStackRealignment` code: - Aarch64. - ARM. - Mips almost: had extra `DEBUG` diagnostic, which the default implementation now has. - PowerPC. - WebAssembly. - x86 almost: has an extra `-force-align-stack` option, which the default implementation now has. The default implementation of `needsStackRealignment` used to just return `false`. My current patch changes the behavior by simply using the above shared behavior. This affects: - AMDGPU - BPF - CppBackend - MSP430 - NVPTX - Sparc - SystemZ - XCore - Out-of-tree targets This is a breaking change! `make check` passes. The only implementation of the `virtual` function (besides the slight different in x86) was Hexagon (which did `MF.getFrameInfo()->getMaxAlignment() > 8`), and potentially some out-of-tree targets. Hexagon now uses the default implementation. `needsStackRealignment` was being overwritten in `<Target>GenRegisterInfo.inc`, to return `false` as the default also did. That was odd and is now gone. Reviewers: sunfish Subscribers: aemerson, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11160 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242727 91177308-0d34-0410-b5e6-96231b3b80d8 JF Bastien 5 years ago
19 changed file(s) with 99 addition(s) and 185 deletion(s). Raw diff Collapse all Expand all
2020 #include "llvm/CodeGen/MachineValueType.h"
2121 #include "llvm/IR/CallingConv.h"
2222 #include "llvm/MC/MCRegisterInfo.h"
23 #include "llvm/Support/CommandLine.h"
2324 #include
2425 #include
2526
3233 class VirtRegMap;
3334 class raw_ostream;
3435 class LiveRegMatrix;
36
37 extern cl::opt ForceStackAlign;
3538
3639 class TargetRegisterClass {
3740 public:
783786 return false;
784787 }
785788
789 /// canRealignStack - true if the stack can be realigned for the target.
790 virtual bool canRealignStack(const MachineFunction &MF) const;
791
786792 /// needsStackRealignment - true if storage within the function requires the
787793 /// stack pointer to be aligned more than the normal calling convention calls
788 /// for.
789 virtual bool needsStackRealignment(const MachineFunction &MF) const {
790 return false;
791 }
794 /// for. This cannot be overriden by the target, but canRealignStack can be
795 /// overriden.
796 bool needsStackRealignment(const MachineFunction &MF) const;
792797
793798 /// getFrameIndexInstrOffset - Get the offset from the referenced frame
794799 /// index in the instruction, if there is one.
1010 //
1111 //===----------------------------------------------------------------------===//
1212
13 #include "llvm/Target/TargetRegisterInfo.h"
1413 #include "llvm/ADT/BitVector.h"
14 #include "llvm/CodeGen/MachineFrameInfo.h"
1515 #include "llvm/CodeGen/MachineFunction.h"
1616 #include "llvm/CodeGen/MachineRegisterInfo.h"
1717 #include "llvm/CodeGen/VirtRegMap.h"
18 #include "llvm/IR/Function.h"
1819 #include "llvm/Support/Debug.h"
1920 #include "llvm/Support/raw_ostream.h"
21 #include "llvm/Target/TargetFrameLowering.h"
22 #include "llvm/Target/TargetRegisterInfo.h"
23
24 #define DEBUG_TYPE "target-reg-info"
25
26 namespace llvm {
27 cl::opt
28 ForceStackAlign("force-align-stack",
29 cl::desc("Force align the stack to the minimum alignment"
30 " needed for the function."),
31 cl::init(false), cl::Hidden);
32 } // end namespace llvm
2033
2134 using namespace llvm;
2235
295308 Hints.push_back(Phys);
296309 }
297310
311 bool TargetRegisterInfo::canRealignStack(const MachineFunction &MF) const {
312 return !MF.getFunction()->hasFnAttribute("no-realign-stack");
313 }
314
315 bool TargetRegisterInfo::needsStackRealignment(
316 const MachineFunction &MF) const {
317 const MachineFrameInfo *MFI = MF.getFrameInfo();
318 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
319 const Function *F = MF.getFunction();
320 unsigned StackAlign = TFI->getStackAlignment();
321 bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||
322 F->hasFnAttribute(Attribute::StackAlignment));
323 if (ForceStackAlign || requiresRealignment) {
324 if (canRealignStack(MF))
325 return true;
326 DEBUG(dbgs() << "Can't realign function's stack: " << F->getName() << "\n");
327 }
328 return false;
329 }
330
298331 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
299332 void
300333 TargetRegisterInfo::dumpReg(unsigned Reg, unsigned SubRegIndex,
183183 }
184184
185185 return false;
186 }
187
188 bool AArch64RegisterInfo::canRealignStack(const MachineFunction &MF) const {
189
190 if (MF.getFunction()->hasFnAttribute("no-realign-stack"))
191 return false;
192
193 return true;
194 }
195
196 // FIXME: share this with other backends with identical implementation?
197 bool
198 AArch64RegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
199 const MachineFrameInfo *MFI = MF.getFrameInfo();
200 const AArch64FrameLowering *TFI = getFrameLowering(MF);
201 const Function *F = MF.getFunction();
202 unsigned StackAlign = TFI->getStackAlignment();
203 bool requiresRealignment =
204 ((MFI->getMaxAlignment() > StackAlign) ||
205 F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
206 Attribute::StackAlignment));
207
208 return requiresRealignment && canRealignStack(MF);
209186 }
210187
211188 unsigned
9292
9393 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
9494 MachineFunction &MF) const override;
95 // Base pointer (stack realignment) support.
96 bool canRealignStack(const MachineFunction &MF) const;
97 bool needsStackRealignment(const MachineFunction &MF) const override;
9895 };
9996
10097 } // end namespace llvm
338338 // 1. Dynamic stack realignment is explicitly disabled,
339339 // 2. This is a Thumb1 function (it's not useful, so we don't bother), or
340340 // 3. There are VLAs in the function and the base pointer is disabled.
341 if (MF.getFunction()->hasFnAttribute("no-realign-stack"))
341 if (!TargetRegisterInfo::canRealignStack(MF))
342342 return false;
343343 if (AFI->isThumb1OnlyFunction())
344344 return false;
353353 // A base pointer is required and allowed. Check that it isn't too late to
354354 // reserve it.
355355 return MRI->canReserveReg(BasePtr);
356 }
357
358 bool ARMBaseRegisterInfo::
359 needsStackRealignment(const MachineFunction &MF) const {
360 const MachineFrameInfo *MFI = MF.getFrameInfo();
361 const ARMFrameLowering *TFI = getFrameLowering(MF);
362 const Function *F = MF.getFunction();
363 unsigned StackAlign = TFI->getStackAlignment();
364 bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||
365 F->hasFnAttribute(Attribute::StackAlignment));
366
367 return requiresRealignment && canRealignStack(MF);
368356 }
369357
370358 bool ARMBaseRegisterInfo::
133133
134134 bool hasBasePointer(const MachineFunction &MF) const;
135135
136 bool canRealignStack(const MachineFunction &MF) const;
137 bool needsStackRealignment(const MachineFunction &MF) const override;
136 bool canRealignStack(const MachineFunction &MF) const override;
138137 int64_t getFrameIndexInstrOffset(const MachineInstr *MI,
139138 int Idx) const override;
140139 bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
244244 }
245245
246246
247 bool
248 HexagonRegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
249 const MachineFrameInfo *MFI = MF.getFrameInfo();
250 return MFI->getMaxAlignment() > 8;
251 }
252
253
254247 unsigned HexagonRegisterInfo::getFirstCallerSavedNonParamReg() const {
255248 return Hexagon::R6;
256249 }
6262 return true;
6363 }
6464
65 bool needsStackRealignment(const MachineFunction &MF) const override;
66
6765 /// Returns true if the frame pointer is valid.
6866 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
6967
283283 }
284284
285285 bool MipsRegisterInfo::canRealignStack(const MachineFunction &MF) const {
286 const MipsSubtarget &Subtarget = MF.getSubtarget();
287 unsigned FP = Subtarget.isGP32bit() ? Mips::FP : Mips::FP_64;
288 unsigned BP = Subtarget.isGP32bit() ? Mips::S7 : Mips::S7_64;
289
290 // Support dynamic stack realignment only for targets with standard encoding.
291 if (!Subtarget.hasStandardEncoding())
292 return false;
293
294 // We can't perform dynamic stack realignment if we can't reserve the
295 // frame pointer register.
296 if (!MF.getRegInfo().canReserveReg(FP))
297 return false;
298
299 // We can realign the stack if we know the maximum call frame size and we
300 // don't have variable sized objects.
301 if (Subtarget.getFrameLowering()->hasReservedCallFrame(MF))
302 return true;
303
304 // We have to reserve the base pointer register in the presence of variable
305 // sized objects.
306 return MF.getRegInfo().canReserveReg(BP);
307 }
308
309 bool MipsRegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
310 const MipsSubtarget &Subtarget = MF.getSubtarget();
311 const MachineFrameInfo *MFI = MF.getFrameInfo();
312
313 bool CanRealign = canRealignStack(MF);
314
315286 // Avoid realigning functions that explicitly do not want to be realigned.
316287 // Normally, we should report an error when a function should be dynamically
317288 // realigned but also has the attribute no-realign-stack. Unfortunately,
319290 // to that of the stack's alignment as specified by the ABI. As a result,
320291 // the information of whether we have objects with larger alignment
321292 // requirement than the stack's alignment is already lost at this point.
322 if (MF.getFunction()->hasFnAttribute("no-realign-stack"))
293 if (!TargetRegisterInfo::canRealignStack(MF))
323294 return false;
324295
325 const Function *F = MF.getFunction();
326 if (F->hasFnAttribute(Attribute::StackAlignment)) {
327 #ifdef DEBUG
328 if (!CanRealign)
329 DEBUG(dbgs() << "It's not possible to realign the stack of the function: "
330 << F->getName() << "\n");
331 #endif
332 return CanRealign;
333 }
334
335 unsigned StackAlignment = Subtarget.getFrameLowering()->getStackAlignment();
336 if (MFI->getMaxAlignment() > StackAlignment) {
337 #ifdef DEBUG
338 if (!CanRealign)
339 DEBUG(dbgs() << "It's not possible to realign the stack of the function: "
340 << F->getName() << "\n");
341 #endif
342 return CanRealign;
343 }
344
345 return false;
346 }
296 const MipsSubtarget &Subtarget = MF.getSubtarget();
297 unsigned FP = Subtarget.isGP32bit() ? Mips::FP : Mips::FP_64;
298 unsigned BP = Subtarget.isGP32bit() ? Mips::S7 : Mips::S7_64;
299
300 // Support dynamic stack realignment only for targets with standard encoding.
301 if (!Subtarget.hasStandardEncoding())
302 return false;
303
304 // We can't perform dynamic stack realignment if we can't reserve the
305 // frame pointer register.
306 if (!MF.getRegInfo().canReserveReg(FP))
307 return false;
308
309 // We can realign the stack if we know the maximum call frame size and we
310 // don't have variable sized objects.
311 if (Subtarget.getFrameLowering()->hasReservedCallFrame(MF))
312 return true;
313
314 // We have to reserve the base pointer register in the presence of variable
315 // sized objects.
316 return MF.getRegInfo().canReserveReg(BP);
317 }
6060 RegScavenger *RS = nullptr) const;
6161
6262 // Stack realignment queries.
63 bool canRealignStack(const MachineFunction &MF) const;
64
65 bool needsStackRealignment(const MachineFunction &MF) const override;
63 bool canRealignStack(const MachineFunction &MF) const override;
6664
6765 /// Debug information queries.
6866 unsigned getFrameRegister(const MachineFunction &MF) const override;
897897 return needsStackRealignment(MF);
898898 }
899899
900 bool PPCRegisterInfo::canRealignStack(const MachineFunction &MF) const {
901 if (MF.getFunction()->hasFnAttribute("no-realign-stack"))
902 return false;
903
904 return true;
905 }
906
907 bool PPCRegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
908 const PPCFrameLowering *TFI = getFrameLowering(MF);
909 const MachineFrameInfo *MFI = MF.getFrameInfo();
910 const Function *F = MF.getFunction();
911 unsigned StackAlign = TFI->getStackAlignment();
912 bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||
913 F->hasFnAttribute(Attribute::StackAlignment));
914
915 return requiresRealignment && canRealignStack(MF);
916 }
917
918900 /// Returns true if the instruction's frame index
919901 /// reference would be better served by a base register other than FP
920902 /// or SP. Used by LocalStackFrameAllocation to determine which frame index
135135 // Base pointer (stack realignment) support.
136136 unsigned getBaseRegister(const MachineFunction &MF) const;
137137 bool hasBasePointer(const MachineFunction &MF) const;
138 bool canRealignStack(const MachineFunction &MF) const;
139 bool needsStackRealignment(const MachineFunction &MF) const override;
140138 };
141139
142140 } // end namespace llvm
6565 const WebAssemblyFrameLowering *TFI = getFrameLowering(MF);
6666 return Regs[TFI->hasFP(MF)][TT.isArch64Bit()];
6767 }
68
69 bool WebAssemblyRegisterInfo::canRealignStack(const MachineFunction &MF) const {
70 return !MF.getFunction()->hasFnAttribute("no-realign-stack");
71 }
72
73 // FIXME: share this with other backends with identical implementation?
74 bool WebAssemblyRegisterInfo::needsStackRealignment(
75 const MachineFunction &MF) const {
76 const MachineFrameInfo *MFI = MF.getFrameInfo();
77 const WebAssemblyFrameLowering *TFI = getFrameLowering(MF);
78 const Function *F = MF.getFunction();
79 unsigned StackAlign = TFI->getStackAlignment();
80 bool requiresRealignment =
81 ((MFI->getMaxAlignment() > StackAlign) ||
82 F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
83 Attribute::StackAlignment));
84
85 return requiresRealignment && canRealignStack(MF);
86 }
4040
4141 // Debug information queries.
4242 unsigned getFrameRegister(const MachineFunction &MF) const override;
43
44 // Base pointer (stack realignment) support.
45 bool canRealignStack(const MachineFunction &MF) const;
46 bool needsStackRealignment(const MachineFunction &MF) const override;
4743 };
4844
4945 } // end namespace llvm
2626 #include "llvm/IR/Function.h"
2727 #include "llvm/MC/MCAsmInfo.h"
2828 #include "llvm/MC/MCSymbol.h"
29 #include "llvm/Support/CommandLine.h"
3029 #include "llvm/Target/TargetOptions.h"
3130 #include "llvm/Support/Debug.h"
3231 #include
3332
3433 using namespace llvm;
35
36 // FIXME: completely move here.
37 extern cl::opt ForceStackAlign;
3834
3935 X86FrameLowering::X86FrameLowering(const X86Subtarget &STI,
4036 unsigned StackAlignOverride)
4242
4343 #define GET_REGINFO_TARGET_DESC
4444 #include "X86GenRegisterInfo.inc"
45
46 cl::opt
47 ForceStackAlign("force-align-stack",
48 cl::desc("Force align the stack to the minimum alignment"
49 " needed for the function."),
50 cl::init(false), cl::Hidden);
5145
5246 static cl::opt
5347 EnableBasePointer("x86-use-base-pointer", cl::Hidden, cl::init(true),
456450 }
457451
458452 bool X86RegisterInfo::canRealignStack(const MachineFunction &MF) const {
459 if (MF.getFunction()->hasFnAttribute("no-realign-stack"))
453 if (!TargetRegisterInfo::canRealignStack(MF))
460454 return false;
461455
462456 const MachineFrameInfo *MFI = MF.getFrameInfo();
472466 if (MFI->hasVarSizedObjects())
473467 return MRI->canReserveReg(BasePtr);
474468 return true;
475 }
476
477 bool X86RegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
478 const MachineFrameInfo *MFI = MF.getFrameInfo();
479 const X86FrameLowering *TFI = getFrameLowering(MF);
480 const Function *F = MF.getFunction();
481 unsigned StackAlign = TFI->getStackAlignment();
482 bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||
483 F->hasFnAttribute(Attribute::StackAlignment));
484
485 // If we've requested that we force align the stack do so now.
486 if (ForceStackAlign)
487 return canRealignStack(MF);
488
489 return requiresRealignment && canRealignStack(MF);
490469 }
491470
492471 bool X86RegisterInfo::hasReservedSpillSlot(const MachineFunction &MF,
107107
108108 bool hasBasePointer(const MachineFunction &MF) const;
109109
110 bool canRealignStack(const MachineFunction &MF) const;
111
112 bool needsStackRealignment(const MachineFunction &MF) const override;
110 bool canRealignStack(const MachineFunction &MF) const override;
113111
114112 bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
115113 int &FrameIdx) const override;
0 ; Check that stack alignment can be forced. Individual targets should test their
1 ; specific implementation details.
2
3 ; RUN: llc < %s -force-align-stack -stack-alignment=32 | FileCheck %s
4 ; CHECK-LABEL: @f
5 ; CHECK-LABEL: @g
6
7 define i32 @f(i8* %p) nounwind {
8 entry:
9 %0 = load i8, i8* %p
10 %conv = sext i8 %0 to i32
11 ret i32 %conv
12 }
13
14 define i64 @g(i32 %i) nounwind {
15 entry:
16 br label %if.then
17
18 if.then:
19 %0 = alloca i8, i32 %i
20 call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 %i, i32 1, i1 false)
21 %call = call i32 @f(i8* %0)
22 %conv = sext i32 %call to i64
23 ret i64 %conv
24 }
25
26 declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i32, i1) nounwind
10731073
10741074 OS << "struct " << ClassName << " : public TargetRegisterInfo {\n"
10751075 << " explicit " << ClassName
1076 << "(unsigned RA, unsigned D = 0, unsigned E = 0, unsigned PC = 0);\n"
1077 << " bool needsStackRealignment(const MachineFunction &) const override\n"
1078 << " { return false; }\n";
1076 << "(unsigned RA, unsigned D = 0, unsigned E = 0, unsigned PC = 0);\n";
10791077 if (!RegBank.getSubRegIndices().empty()) {
10801078 OS << " unsigned composeSubRegIndicesImpl"
10811079 << "(unsigned, unsigned) const override;\n"