llvm.org GIT mirror llvm / 98689c0
[RegAllocGreedy] IMPLICIT_DEF values shouldn't prefer registers It costs nothing to spill an IMPLICIT_DEF value (the only spill code that's generated is a KILL of the value), so when creating split constraints if the live-out value is IMPLICIT_DEF the exit constraint should be DontCare instead of PrefReg. Differential Revision: https://reviews.llvm.org/D55652 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349151 91177308-0d34-0410-b5e6-96231b3b80d8 John Brawn 11 months ago
4 changed file(s) with 180 addition(s) and 69 deletion(s). Raw diff Collapse all Expand all
11821182 BC.Number = BI.MBB->getNumber();
11831183 Intf.moveToBlock(BC.Number);
11841184 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare;
1185 BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare;
1185 BC.Exit = (BI.LiveOut &&
1186 !LIS->getInstructionFromIndex(BI.LastInstr)->isImplicitDef())
1187 ? SpillPlacement::PrefReg
1188 : SpillPlacement::DontCare;
11861189 BC.ChangesValue = BI.FirstDef.isValid();
11871190
11881191 if (!Intf.hasInterference())
101101
102102 bb.7:
103103 successors: %bb.13(0x80000000)
104
105 ; In reality we are checking that this code doesn't assert when splitting
106 ; and inserting a spill. Here we just check that the point where the error
107 ; occurs we see a correctly generated spill.
108 ; GCN-LABEL: bb.7:
109 ; GCN: SI_SPILL_V128_SAVE %{{[0-9]+}}, %stack.1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr5, 0, implicit $exec
110
104111 undef %15.sub0:vreg_128 = V_MOV_B32_e32 0, implicit $exec
105112 %15.sub1:vreg_128 = COPY %15.sub0
106113 %15.sub2:vreg_128 = COPY %15.sub0
113120
114121 bb.9:
115122 successors: %bb.12(0x80000000)
123
124 ; GCN-LABEL: bb.9:
125 ; GCN: SI_SPILL_V128_SAVE %{{[0-9]+}}, %stack.1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr5, 0, implicit $exec
126
116127 undef %15.sub0:vreg_128 = V_MOV_B32_e32 0, implicit $exec
117128 %15.sub1:vreg_128 = COPY %15.sub0
118129 %15.sub2:vreg_128 = COPY %15.sub0
120131
121132 bb.10:
122133 successors: %bb.12(0x80000000)
134
135 ; GCN-LABEL: bb.10:
136 ; GCN: SI_SPILL_V128_SAVE %{{[0-9]+}}, %stack.1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr5, 0, implicit $exec
137
123138 undef %15.sub0:vreg_128 = V_MOV_B32_e32 2143289344, implicit $exec
124139 %15.sub1:vreg_128 = COPY %15.sub0
125140 %15.sub2:vreg_128 = COPY %15.sub0
141156
142157 bb.13:
143158 successors: %bb.15(0x40000000), %bb.14(0x40000000)
144
145 ; In reality we are checking that this code doesn't assert when splitting
146 ; and inserting a spill. Here we just check that the point where the error
147 ; occurs we see a correctly generated spill.
148 ; GCN-LABEL: bb.13:
149 ; GCN: SI_SPILL_V128_SAVE %{{[0-9]+}}, %stack.1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr5, 0, implicit $exec
150159
151160 %18:vgpr_32 = V_MAD_F32 0, %10.sub0, 0, target-flags(amdgpu-gotprel) 1073741824, 0, -1082130432, 0, 0, implicit $exec
152161 %19:vgpr_32 = V_MAD_F32 0, %12.sub0, 0, target-flags(amdgpu-gotprel) 0, 0, 0, 0, 0, implicit $exec
0 ; REQUIRES: asserts
1 ; RUN: llc -mtriple=thumbv6m -regalloc=greedy -stats < %s 2>&1 | FileCheck %s
2
3 ; Undef incoming values to phis end up creating IMPLICIT_DEF values. If we don't
4 ; prefer them to be in a register then we get fewer spilled live ranges (6
5 ; compared to 7).
6 ; CHECK: 6 regalloc - Number of spilled live ranges
7
8 declare i32 @otherfn(i32)
9 define void @fn(i32 %val, i32* %ptr) {
10 entry:
11 %gep1 = getelementptr i32, i32* %ptr, i32 0
12 %gep2 = getelementptr i32, i32* %ptr, i32 1
13 %gep3 = getelementptr i32, i32* %ptr, i32 2
14 %gep4 = getelementptr i32, i32* %ptr, i32 3
15 %gep5 = getelementptr i32, i32* %ptr, i32 4
16 %gep6 = getelementptr i32, i32* %ptr, i32 5
17 %gep7 = getelementptr i32, i32* %ptr, i32 6
18 %gep8 = getelementptr i32, i32* %ptr, i32 7
19 %cmp1 = icmp uge i32 %val, 3
20 br i1 %cmp1, label %if, label %then
21
22 if:
23 %val1 = load i32, i32* %gep1, align 4
24 %val2 = load i32, i32* %gep2, align 4
25 %val3 = load i32, i32* %gep3, align 4
26 %val4 = load i32, i32* %gep4, align 4
27 %val5 = load i32, i32* %gep5, align 4
28 %val6 = load i32, i32* %gep6, align 4
29 %val7 = load i32, i32* %gep7, align 4
30 %val8 = load i32, i32* %gep8, align 4
31 br label %then
32
33 then:
34 %phi1a = phi i32 [ %val1, %if ], [ undef, %entry ]
35 %phi2a = phi i32 [ %val2, %if ], [ undef, %entry ]
36 %phi3a = phi i32 [ %val3, %if ], [ undef, %entry ]
37 %phi4a = phi i32 [ %val4, %if ], [ undef, %entry ]
38 %phi5a = phi i32 [ %val5, %if ], [ undef, %entry ]
39 %phi6a = phi i32 [ %val6, %if ], [ undef, %entry ]
40 %phi7a = phi i32 [ %val7, %if ], [ undef, %entry ]
41 %phi8a = phi i32 [ %val8, %if ], [ undef, %entry ]
42 %switchval = call i32 @otherfn(i32 %val)
43 switch i32 %switchval, label %default [
44 i32 0, label %case0
45 i32 1, label %case1
46 i32 5, label %case5
47 i32 6, label %case6
48 i32 7, label %case7
49 i32 8, label %case8
50 ]
51
52 default:
53 br label %switchend
54
55 case0:
56 br label %switchend
57
58 case1:
59 br label %switchend
60
61 case5:
62 br label %switchend
63
64 case6:
65 br label %switchend
66
67 case7:
68 br label %switchend
69
70 case8:
71 br label %switchend
72
73 switchend:
74 %phi1b = phi i32 [ 0, %default ], [ undef, %case0 ], [ undef, %case1 ], [ %phi1a, %case5 ], [ 1, %case6 ], [ 2, %case7 ], [ 1, %case8 ]
75 %phi2b = phi i32 [ 0, %default ], [ undef, %case0 ], [ undef, %case1 ], [ %phi2a, %case5 ], [ 2, %case6 ], [ 2, %case7 ], [ 1, %case8 ]
76 %phi3b = phi i32 [ 0, %default ], [ undef, %case0 ], [ undef, %case1 ], [ %phi3a, %case5 ], [ 3, %case6 ], [ 2, %case7 ], [ 1, %case8 ]
77 %phi4b = phi i32 [ 0, %default ], [ undef, %case0 ], [ undef, %case1 ], [ %phi4a, %case5 ], [ 4, %case6 ], [ 2, %case7 ], [ 1, %case8 ]
78 %phi5b = phi i32 [ 0, %default ], [ undef, %case0 ], [ undef, %case1 ], [ %phi5a, %case5 ], [ 5, %case6 ], [ 2, %case7 ], [ 1, %case8 ]
79 %phi6b = phi i32 [ 0, %default ], [ undef, %case0 ], [ undef, %case1 ], [ %phi6a, %case5 ], [ 6, %case6 ], [ 2, %case7 ], [ 1, %case8 ]
80 %phi7b = phi i32 [ 0, %default ], [ undef, %case0 ], [ undef, %case1 ], [ %phi7a, %case5 ], [ 7, %case6 ], [ 2, %case7 ], [ 1, %case8 ]
81 %phi8b = phi i32 [ 0, %default ], [ undef, %case0 ], [ undef, %case1 ], [ %phi8a, %case5 ], [ 8, %case6 ], [ 2, %case7 ], [ 1, %case8 ]
82 %cmp2 = icmp uge i32 %val, 4
83 br i1 %cmp2, label %if2, label %end
84
85 if2:
86 store i32 %phi1b, i32* %gep1, align 4
87 store i32 %phi2b, i32* %gep2, align 4
88 store i32 %phi3b, i32* %gep3, align 4
89 store i32 %phi4b, i32* %gep4, align 4
90 store i32 %phi5b, i32* %gep5, align 4
91 store i32 %phi6b, i32* %gep6, align 4
92 store i32 %phi7b, i32* %gep7, align 4
93 store i32 %phi8b, i32* %gep8, align 4
94 br label %end
95
96 end:
97 ret void
98 }
2323 ; CHECK-NEXT: .cfi_offset %ebx, -12
2424 ; CHECK-NEXT: .cfi_offset %ebp, -8
2525 ; CHECK-NEXT: xorl %ebx, %ebx
26 ; CHECK-NEXT: # implicit-def: $esi
26 ; CHECK-NEXT: # implicit-def: $ecx
2727 ; CHECK-NEXT: # implicit-def: $edi
28 ; CHECK-NEXT: # implicit-def: $ah
2928 ; CHECK-NEXT: # implicit-def: $al
30 ; CHECK-NEXT: # implicit-def: $edx
29 ; CHECK-NEXT: # kill: killed $al
30 ; CHECK-NEXT: # implicit-def: $dl
31 ; CHECK-NEXT: # implicit-def: $ebp
3132 ; CHECK-NEXT: jmp .LBB0_1
3233 ; CHECK-NEXT: .p2align 4, 0x90
3334 ; CHECK-NEXT: .LBB0_16: # %for.inc
3435 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
35 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %ah # 1-byte Reload
36 ; CHECK-NEXT: movb %cl, %al
36 ; CHECK-NEXT: movb %dl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
37 ; CHECK-NEXT: movb %dh, %dl
3738 ; CHECK-NEXT: .LBB0_1: # %for.cond
3839 ; CHECK-NEXT: # =>This Loop Header: Depth=1
3940 ; CHECK-NEXT: # Child Loop BB0_20 Depth 2
40 ; CHECK-NEXT: cmpb $8, %al
41 ; CHECK-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
41 ; CHECK-NEXT: cmpb $8, %dl
42 ; CHECK-NEXT: movb %dl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
4243 ; CHECK-NEXT: ja .LBB0_3
4344 ; CHECK-NEXT: # %bb.2: # %for.cond
4445 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
4647 ; CHECK-NEXT: je .LBB0_3
4748 ; CHECK-NEXT: # %bb.4: # %if.end
4849 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
49 ; CHECK-NEXT: movl %edx, %ebp
50 ; CHECK-NEXT: movl %esi, %ecx
51 ; CHECK-NEXT: movl %esi, %eax
50 ; CHECK-NEXT: movl %ecx, %eax
5251 ; CHECK-NEXT: cltd
5352 ; CHECK-NEXT: idivl a
54 ; CHECK-NEXT: movl %eax, %esi
55 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
56 ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
53 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %dl # 1-byte Reload
54 ; CHECK-NEXT: movb %cl, %dh
5755 ; CHECK-NEXT: movl $0, h
58 ; CHECK-NEXT: cmpb $8, %al
56 ; CHECK-NEXT: cmpb $8, %dl
5957 ; CHECK-NEXT: jg .LBB0_8
6058 ; CHECK-NEXT: # %bb.5: # %if.then13
6159 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
60 ; CHECK-NEXT: movl %eax, %esi
6261 ; CHECK-NEXT: movl $.str, (%esp)
63 ; CHECK-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
62 ; CHECK-NEXT: movb %dh, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
6463 ; CHECK-NEXT: calll printf
65 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %cl # 1-byte Reload
66 ; CHECK-NEXT: testb %bl, %bl
64 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %dh # 1-byte Reload
65 ; CHECK-NEXT: testb %bl, %bl
66 ; CHECK-NEXT: movl %esi, %ecx
6767 ; CHECK-NEXT: # implicit-def: $eax
68 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %ch # 1-byte Reload
69 ; CHECK-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
70 ; CHECK-NEXT: movl %ebp, %edx
68 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %dl # 1-byte Reload
69 ; CHECK-NEXT: movb %dl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
70 ; CHECK-NEXT: movb %dh, %dl
7171 ; CHECK-NEXT: jne .LBB0_16
7272 ; CHECK-NEXT: .p2align 4, 0x90
7373 ; CHECK-NEXT: # %bb.6: # %for.cond35
9090 ; CHECK-NEXT: calll printf
9191 ; CHECK-NEXT: .LBB0_19: # %for.end46
9292 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
93 ; CHECK-NEXT: # implicit-def: $ch
94 ; CHECK-NEXT: # implicit-def: $cl
95 ; CHECK-NEXT: # implicit-def: $edx
93 ; CHECK-NEXT: # implicit-def: $dl
94 ; CHECK-NEXT: # implicit-def: $dh
95 ; CHECK-NEXT: # implicit-def: $ebp
9696 ; CHECK-NEXT: jmp .LBB0_20
9797 ; CHECK-NEXT: .p2align 4, 0x90
9898 ; CHECK-NEXT: .LBB0_3: # %if.then
9999 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
100100 ; CHECK-NEXT: movl $.str, (%esp)
101 ; CHECK-NEXT: movl %edx, %esi
102 ; CHECK-NEXT: movb %ah, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
103101 ; CHECK-NEXT: calll printf
104 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %ch # 1-byte Reload
105 ; CHECK-NEXT: movl %esi, %edx
102 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %dl # 1-byte Reload
106103 ; CHECK-NEXT: # implicit-def: $eax
107104 ; CHECK-NEXT: testl %edi, %edi
108105 ; CHECK-NEXT: jne .LBB0_11
110107 ; CHECK-NEXT: .p2align 4, 0x90
111108 ; CHECK-NEXT: .LBB0_8: # %if.end21
112109 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
113 ; CHECK-NEXT: # implicit-def: $edx
110 ; CHECK-NEXT: # implicit-def: $ebp
114111 ; CHECK-NEXT: testb %bl, %bl
115112 ; CHECK-NEXT: je .LBB0_13
113 ; CHECK-NEXT: jmp .LBB0_10
114 ; CHECK-NEXT: .p2align 4, 0x90
115 ; CHECK-NEXT: .LBB0_7: # in Loop: Header=BB0_1 Depth=1
116 ; CHECK-NEXT: xorl %edi, %edi
117 ; CHECK-NEXT: movb %dl, %dh
118 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %dl # 1-byte Reload
119 ; CHECK-NEXT: .p2align 4, 0x90
120 ; CHECK-NEXT: .LBB0_20: # %for.cond47
121 ; CHECK-NEXT: # Parent Loop BB0_1 Depth=1
122 ; CHECK-NEXT: # => This Inner Loop Header: Depth=2
123 ; CHECK-NEXT: testb %bl, %bl
124 ; CHECK-NEXT: jne .LBB0_20
125 ; CHECK-NEXT: # %bb.21: # %for.cond47
126 ; CHECK-NEXT: # in Loop: Header=BB0_20 Depth=2
127 ; CHECK-NEXT: testb %bl, %bl
128 ; CHECK-NEXT: jne .LBB0_20
129 ; CHECK-NEXT: # %bb.9: # %ae
130 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
131 ; CHECK-NEXT: testb %bl, %bl
132 ; CHECK-NEXT: jne .LBB0_10
133 ; CHECK-NEXT: .LBB0_13: # %if.end26
134 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
135 ; CHECK-NEXT: xorl %ecx, %ecx
136 ; CHECK-NEXT: testb %dl, %dl
137 ; CHECK-NEXT: je .LBB0_16
138 ; CHECK-NEXT: # %bb.14: # %if.end26
139 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
140 ; CHECK-NEXT: testl %ebp, %ebp
141 ; CHECK-NEXT: jne .LBB0_16
142 ; CHECK-NEXT: # %bb.15: # %if.then31
143 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
144 ; CHECK-NEXT: xorl %ecx, %ecx
145 ; CHECK-NEXT: xorl %ebp, %ebp
146 ; CHECK-NEXT: jmp .LBB0_16
116147 ; CHECK-NEXT: .p2align 4, 0x90
117148 ; CHECK-NEXT: .LBB0_10: # in Loop: Header=BB0_1 Depth=1
118149 ; CHECK-NEXT: # implicit-def: $eax
120151 ; CHECK-NEXT: je .LBB0_17
121152 ; CHECK-NEXT: .LBB0_12: # in Loop: Header=BB0_1 Depth=1
122153 ; CHECK-NEXT: # implicit-def: $edi
123 ; CHECK-NEXT: # implicit-def: $ch
124154 ; CHECK-NEXT: # implicit-def: $cl
125155 ; CHECK-NEXT: # kill: killed $cl
126 ; CHECK-NEXT: # implicit-def: $edx
156 ; CHECK-NEXT: # implicit-def: $dl
157 ; CHECK-NEXT: # implicit-def: $ebp
127158 ; CHECK-NEXT: testl %edi, %edi
128159 ; CHECK-NEXT: jne .LBB0_11
129 ; CHECK-NEXT: .LBB0_7: # in Loop: Header=BB0_1 Depth=1
130 ; CHECK-NEXT: xorl %edi, %edi
131 ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %cl # 1-byte Reload
132 ; CHECK-NEXT: .p2align 4, 0x90
133 ; CHECK-NEXT: .LBB0_20: # %for.cond47
134 ; CHECK-NEXT: # Parent Loop BB0_1 Depth=1
135 ; CHECK-NEXT: # => This Inner Loop Header: Depth=2
136 ; CHECK-NEXT: testb %bl, %bl
137 ; CHECK-NEXT: jne .LBB0_20
138 ; CHECK-NEXT: # %bb.21: # %for.cond47
139 ; CHECK-NEXT: # in Loop: Header=BB0_20 Depth=2
140 ; CHECK-NEXT: testb %bl, %bl
141 ; CHECK-NEXT: jne .LBB0_20
142 ; CHECK-NEXT: # %bb.22: # in Loop: Header=BB0_1 Depth=1
143 ; CHECK-NEXT: movb %ch, %al
144 ; CHECK-NEXT: testb %bl, %bl
145 ; CHECK-NEXT: jne .LBB0_10
146 ; CHECK-NEXT: .LBB0_13: # %if.end26
147 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
148 ; CHECK-NEXT: xorl %esi, %esi
149 ; CHECK-NEXT: testb %al, %al
150 ; CHECK-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
151 ; CHECK-NEXT: je .LBB0_16
152 ; CHECK-NEXT: # %bb.14: # %if.end26
153 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
154 ; CHECK-NEXT: testl %edx, %edx
155 ; CHECK-NEXT: jne .LBB0_16
156 ; CHECK-NEXT: # %bb.15: # %if.then31
157 ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
158 ; CHECK-NEXT: xorl %esi, %esi
159 ; CHECK-NEXT: xorl %edx, %edx
160 ; CHECK-NEXT: jmp .LBB0_16
160 ; CHECK-NEXT: jmp .LBB0_7
161161 entry:
162162 br label %for.cond
163163