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[XCore] Add missing l2rus instructions. These instructions are not targeted by the compiler but they are needed for the MC layer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173634 91177308-0d34-0410-b5e6-96231b3b80d8 Richard Osborne 7 years ago
3 changed file(s) with 20 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
448448 case 0x12c:
449449 Inst.setOpcode(XCore::ASHR_l2rus);
450450 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
451 case 0x12d:
452 Inst.setOpcode(XCore::OUTPW_l2rus);
453 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
454 case 0x12e:
455 Inst.setOpcode(XCore::INPW_l2rus);
456 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
451457 case 0x13c:
452458 Inst.setOpcode(XCore::LDAWF_l2rus);
453459 return DecodeL2RUSInstruction(Inst, Insn, Address, Decoder);
450450 (int_xcore_crc32 GRRegs:$src1, GRRegs:$src2,
451451 GRRegs:$src3))]>;
452452
453 // TODO inpw, outpw
454453 let mayStore=1 in {
455454 def ST16_l3r : _FL3R<0b100001100, (outs),
456455 (ins GRRegs:$val, GRRegs:$addr, GRRegs:$offset),
460459 (ins GRRegs:$val, GRRegs:$addr, GRRegs:$offset),
461460 "st8 $val, $addr[$offset]", []>;
462461 }
462
463 def INPW_l2rus : _FL2RUSBitp<0b100101110, (outs GRRegs:$a),
464 (ins GRRegs:$b, i32imm:$c), "inpw $a, res[$b], $c",
465 []>;
466
467 def OUTPW_l2rus : _FL2RUSBitp<0b100101101, (outs),
468 (ins GRRegs:$a, GRRegs:$b, i32imm:$c),
469 "outpw res[$b], $a, $c", []>;
463470
464471 // Four operand long
465472 let Constraints = "$e = $a,$f = $b" in {
402402 # CHECK: ldaw r8, r2[-9]
403403 0x09 0xfd 0xec 0xa7
404404
405 # CHECK: inpw r6, res[r1], 8
406 0xe4 0xfc 0xee 0x97
407
408 # CHECK: outpw res[r3], r0, 2
409 0x0e 0xf8 0xed 0x97
410
405411 # ru6 / lru6 instructions
406412
407413 # CHECK: bt r6, -5