llvm.org GIT mirror llvm / 95ce2e9
Generate the dispatch table for ARM mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141327 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 8 years ago
1 changed file(s) with 72 addition(s) and 30 deletion(s). Raw diff Collapse all Expand all
56845684 // context.
56855685 SetupEntryBlockForSjLj(MI, MBB, DispatchBB, FI);
56865686
5687 // Grab constant pool and fixed stack memory operands.
56885687 MachineMemOperand *FIMMOLd =
56895688 MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
56905689 MachineMemOperand::MOLoad, 4, 4);
56915690
5692 unsigned NewVReg1 = MRI->createVirtualRegister(TRC);
5693 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1)
5694 .addFrameIndex(FI)
5695 .addImm(4)
5696 .addMemOperand(FIMMOLd));
5697 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPri))
5698 .addReg(NewVReg1)
5699 .addImm(LPadList.size()));
5700 BuildMI(DispatchBB, dl, TII->get(ARM::t2Bcc))
5701 .addMBB(TrapBB)
5702 .addImm(ARMCC::HI)
5703 .addReg(ARM::CPSR);
5704
5705 unsigned NewVReg2 = MRI->createVirtualRegister(TRC);
5706 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT), NewVReg2)
5707 .addJumpTableIndex(MJTI)
5708 .addImm(UId));
5709
5710 unsigned NewVReg3 = MRI->createVirtualRegister(TRC);
5711 AddDefaultCC(
5691 if (Subtarget->isThumb2()) {
5692 unsigned NewVReg1 = MRI->createVirtualRegister(TRC);
5693 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1)
5694 .addFrameIndex(FI)
5695 .addImm(4)
5696 .addMemOperand(FIMMOLd));
5697 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPri))
5698 .addReg(NewVReg1)
5699 .addImm(LPadList.size()));
5700 BuildMI(DispatchBB, dl, TII->get(ARM::t2Bcc))
5701 .addMBB(TrapBB)
5702 .addImm(ARMCC::HI)
5703 .addReg(ARM::CPSR);
5704
5705 unsigned NewVReg2 = MRI->createVirtualRegister(TRC);
5706 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT),NewVReg2)
5707 .addJumpTableIndex(MJTI)
5708 .addImm(UId));
5709
5710 unsigned NewVReg3 = MRI->createVirtualRegister(TRC);
5711 AddDefaultCC(
5712 AddDefaultPred(
5713 BuildMI(DispContBB, dl, TII->get(ARM::t2ADDrs), NewVReg3)
5714 .addReg(NewVReg2, RegState::Kill)
5715 .addReg(NewVReg1)
5716 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2))));
5717
5718 BuildMI(DispContBB, dl, TII->get(ARM::t2BR_JT))
5719 .addReg(NewVReg3, RegState::Kill)
5720 .addReg(NewVReg1)
5721 .addJumpTableIndex(MJTI)
5722 .addImm(UId);
5723 } else if (Subtarget->isThumb()) {
5724 } else {
5725 unsigned NewVReg1 = MRI->createVirtualRegister(TRC);
5726 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRi12), NewVReg1)
5727 .addFrameIndex(FI)
5728 .addImm(4)
5729 .addMemOperand(FIMMOLd));
5730 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPri))
5731 .addReg(NewVReg1)
5732 .addImm(LPadList.size()));
5733 BuildMI(DispatchBB, dl, TII->get(ARM::Bcc))
5734 .addMBB(TrapBB)
5735 .addImm(ARMCC::HI)
5736 .addReg(ARM::CPSR);
5737
5738 unsigned NewVReg2 = MRI->createVirtualRegister(TRC);
5739 AddDefaultCC(
5740 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::MOVsi), NewVReg2)
5741 .addReg(NewVReg1)
5742 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2))));
5743 unsigned NewVReg3 = MRI->createVirtualRegister(TRC);
5744 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::LEApcrelJT), NewVReg3)
5745 .addJumpTableIndex(MJTI)
5746 .addImm(UId));
5747
5748 MachineMemOperand *JTMMOLd =
5749 MF->getMachineMemOperand(MachinePointerInfo::getJumpTable(),
5750 MachineMemOperand::MOLoad, 4, 4);
5751 unsigned NewVReg4 = MRI->createVirtualRegister(TRC);
57125752 AddDefaultPred(
5713 BuildMI(DispContBB, dl, TII->get(ARM::t2ADDrs), NewVReg3)
5753 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg4)
57145754 .addReg(NewVReg2, RegState::Kill)
5715 .addReg(NewVReg1)
5716 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2))));
5717
5718 BuildMI(DispContBB, dl, TII->get(ARM::t2BR_JT))
5719 .addReg(NewVReg3, RegState::Kill)
5720 .addReg(NewVReg1)
5721 .addJumpTableIndex(MJTI)
5722 .addImm(UId);
5755 .addReg(NewVReg3)
5756 .addImm(0)
5757 .addMemOperand(JTMMOLd));
5758
5759 BuildMI(DispContBB, dl, TII->get(ARM::BR_JTadd))
5760 .addReg(NewVReg4, RegState::Kill)
5761 .addReg(NewVReg3)
5762 .addJumpTableIndex(MJTI)
5763 .addImm(UId);
5764 }
57235765
57245766 // Add the jump table entries as successors to the MBB.
57255767 for (std::vector::iterator