llvm.org GIT mirror llvm / 95a9d93
Round 2 of dead private variable removal. LLVM is now -Wunused-private-field clean except for - lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields. - gtest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158096 91177308-0d34-0410-b5e6-96231b3b80d8 Benjamin Kramer 8 years ago
18 changed file(s) with 19 addition(s) and 51 deletion(s). Raw diff Collapse all Expand all
2727
2828 class ProfileInfoLoader {
2929 const std::string &Filename;
30 Module &M;
3130 std::vector CommandLines;
3231 std::vector FunctionCounts;
3332 std::vector BlockCounts;
3837 public:
3938 // ProfileInfoLoader ctor - Read the specified profiling data file, exiting
4039 // the program if the file is invalid or broken.
41 ProfileInfoLoader(const char *ToolName, const std::string &Filename,
42 Module &M);
40 ProfileInfoLoader(const char *ToolName, const std::string &Filename);
4341
4442 static const unsigned Uncounted;
4543
8282 // program if the file is invalid or broken.
8383 //
8484 ProfileInfoLoader::ProfileInfoLoader(const char *ToolName,
85 const std::string &Filename,
86 Module &TheModule) :
87 Filename(Filename),
88 M(TheModule), Warned(false) {
85 const std::string &Filename)
86 : Filename(Filename), Warned(false) {
8987 FILE *F = fopen(Filename.c_str(), "rb");
9088 if (F == 0) {
9189 errs() << ToolName << ": Error opening '" << Filename << "': ";
151151 }
152152
153153 bool LoaderPass::runOnModule(Module &M) {
154 ProfileInfoLoader PIL("profile-loader", Filename, M);
154 ProfileInfoLoader PIL("profile-loader", Filename);
155155
156156 EdgeInformation.clear();
157157 std::vector Counters = PIL.getRawEdgeCounts();
5151
5252 namespace {
5353 class InlineSpiller : public Spiller {
54 MachineFunctionPass &Pass;
5554 MachineFunction &MF;
5655 LiveIntervals &LIS;
5756 LiveStacks &LSS;
136135 InlineSpiller(MachineFunctionPass &pass,
137136 MachineFunction &mf,
138137 VirtRegMap &vrm)
139 : Pass(pass),
140 MF(mf),
138 : MF(mf),
141139 LIS(pass.getAnalysis()),
142140 LSS(pass.getAnalysis()),
143141 AA(&pass.getAnalysis()),
7272
7373 // analyses
7474 SlotIndexes *Indexes;
75 LiveStacks *LS;
7675 MachineDominatorTree *DomTree;
7776 MachineLoopInfo *Loops;
7877 EdgeBundles *Bundles;
4444
4545 // If the target supports JIT code generation, create the JIT.
4646 if (TargetJITInfo *TJ = TM->getJITInfo())
47 return new MCJIT(M, TM, *TJ, new MCJITMemoryManager(JMM, M), GVsWithCode);
47 return new MCJIT(M, TM, *TJ, new MCJITMemoryManager(JMM), GVsWithCode);
4848
4949 if (ErrorStr)
5050 *ErrorStr = "target does not support JIT code generation";
2121 // matching LLVM IR counterparts in the module(s) being compiled.
2222 class MCJITMemoryManager : public RTDyldMemoryManager {
2323 virtual void anchor();
24 JITMemoryManager *JMM;
24 OwningPtr JMM;
2525
26 // FIXME: Multiple modules.
27 Module *M;
2826 public:
29 MCJITMemoryManager(JITMemoryManager *jmm, Module *m) :
30 JMM(jmm?jmm:JITMemoryManager::CreateDefaultMemManager()), M(m) {}
31 // We own the JMM, so make sure to delete it.
32 ~MCJITMemoryManager() { delete JMM; }
27 MCJITMemoryManager(JITMemoryManager *jmm) :
28 JMM(jmm?jmm:JITMemoryManager::CreateDefaultMemManager()) {}
3329
3430 uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment,
3531 unsigned SectionID) {
2828 // This is the pipeline hazard recognizer for the Cell SPU processor. It does
2929 // very little right now.
3030 //===----------------------------------------------------------------------===//
31
32 SPUHazardRecognizer::SPUHazardRecognizer(const TargetInstrInfo &tii) :
33 TII(tii),
34 EvenOdd(0)
35 {
36 }
3731
3832 /// Return the pipeline hazard type encountered or generated by this
3933 /// instruction. Currently returns NoHazard.
2323 /// SPUHazardRecognizer
2424 class SPUHazardRecognizer : public ScheduleHazardRecognizer
2525 {
26 private:
27 const TargetInstrInfo &TII;
28 int EvenOdd;
29
3026 public:
31 SPUHazardRecognizer(const TargetInstrInfo &TII);
27 SPUHazardRecognizer(const TargetInstrInfo &/*TII*/) {}
3228 virtual HazardType getHazardType(SUnit *SU, int Stalls);
3329 virtual void EmitInstruction(SUnit *SU);
3430 virtual void AdvanceCycle();
8585 class SPUTargetLowering :
8686 public TargetLowering
8787 {
88 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
8988 SPUTargetMachine &SPUTM;
9089
9190 public:
249249
250250 NVPTXRegisterInfo::NVPTXRegisterInfo(const TargetInstrInfo &tii,
251251 const NVPTXSubtarget &st)
252 : NVPTXGenRegisterInfo(0),
253 TII(tii),
254 ST(st) {
255 Is64Bit = st.is64Bit();
256 }
257
252 : NVPTXGenRegisterInfo(0),
253 Is64Bit(st.is64Bit()) {}
258254
259255 #define GET_REGINFO_TARGET_DESC
260256 #include "NVPTXGenRegisterInfo.inc"
3030
3131 class NVPTXRegisterInfo : public NVPTXGenRegisterInfo {
3232 private:
33 const TargetInstrInfo &TII;
34 const NVPTXSubtarget &ST;
3533 bool Is64Bit;
3634 // Hold Strings that can be free'd all together with NVPTXRegisterInfo
3735 ManagedStringPool ManagedStrPool;
2121 class SparcSubtarget;
2222
2323 class SparcFrameLowering : public TargetFrameLowering {
24 const SparcSubtarget &STI;
2524 public:
26 explicit SparcFrameLowering(const SparcSubtarget &sti)
27 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0), STI(sti) {
25 explicit SparcFrameLowering(const SparcSubtarget &/*sti*/)
26 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0) {
2827 }
2928
3029 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
7777 //===----------------------------------------------------------------------===//
7878
7979 XCoreFrameLowering::XCoreFrameLowering(const XCoreSubtarget &sti)
80 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0),
81 STI(sti) {
80 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0) {
8281 // Do nothing
8382 }
8483
2121 class XCoreSubtarget;
2222
2323 class XCoreFrameLowering: public TargetFrameLowering {
24 const XCoreSubtarget &STI;
2524 public:
2625 XCoreFrameLowering(const XCoreSubtarget &STI);
2726
280280 // using the standard profile info provider pass, but for now this gives us
281281 // access to additional information not exposed via the ProfileInfo
282282 // interface.
283 ProfileInfoLoader PIL(argv[0], ProfileDataFile, *M);
283 ProfileInfoLoader PIL(argv[0], ProfileDataFile);
284284
285285 // Run the printer pass.
286286 PassManager PassMgr;
166166 &(TypeBuilder, true>::get(context2))->getContext());
167167 }
168168
169 class MyType {
169 struct MyType {
170170 int a;
171171 int *b;
172172 void *array[1];
173173 };
174174
175 class MyPortableType {
175 struct MyPortableType {
176176 int32_t a;
177177 int32_t *b;
178178 void *array[1];
2222 /// and emission of the instruction selector.
2323 ///
2424 class DAGISelEmitter : public TableGenBackend {
25 RecordKeeper &Records;
2625 CodeGenDAGPatterns CGP;
2726 public:
28 explicit DAGISelEmitter(RecordKeeper &R) : Records(R), CGP(R) {}
27 explicit DAGISelEmitter(RecordKeeper &R) : CGP(R) {}
2928
3029 // run - Output the isel, returning true on failure.
3130 void run(raw_ostream &OS);