llvm.org GIT mirror llvm / 951cd02
Fix a few places where 32bit instructions/registerset were used on PPC64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133260 91177308-0d34-0410-b5e6-96231b3b80d8 Roman Divacky 9 years ago
3 changed file(s) with 27 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
18691869 InVals.push_back(FIN);
18701870 if (ObjSize==1 || ObjSize==2) {
18711871 if (GPR_idx != Num_GPR_Regs) {
1872 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass);
1872 unsigned VReg;
1873 if (isPPC64)
1874 VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass);
1875 else
1876 VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass);
18731877 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
18741878 SDValue Store = DAG.getTruncStore(Val.getValue(1), dl, Val, FIN,
18751879 MachinePointerInfo(),
18881892 // to memory. ArgVal will be address of the beginning of
18891893 // the object.
18901894 if (GPR_idx != Num_GPR_Regs) {
1891 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass);
1895 unsigned VReg;
1896 if (isPPC64)
1897 VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass);
1898 else
1899 VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass);
18921900 int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset, true);
18931901 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
18941902 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
46744682 .addReg(TmpReg).addReg(MaskReg);
46754683 BuildMI(BB, dl, TII->get(is64bit ? PPC::OR8 : PPC::OR), Tmp4Reg)
46764684 .addReg(Tmp3Reg).addReg(Tmp2Reg);
4677 BuildMI(BB, dl, TII->get(PPC::STWCX))
4685 BuildMI(BB, dl, TII->get(is64bit ? PPC::STDCX : PPC::STWCX))
46784686 .addReg(Tmp4Reg).addReg(ZeroReg).addReg(PtrReg);
46794687 BuildMI(BB, dl, TII->get(PPC::BCC))
46804688 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB);
503503 const TargetRegisterClass *RC = Subtarget.isPPC64() ? G8RC : GPRC;
504504 unsigned Reg = findScratchRegister(II, RS, RC, SPAdj);
505505 unsigned SrcReg = MI.getOperand(0).getReg();
506 bool LP64 = Subtarget.isPPC64();
506507
507508 // We need to store the CR in the low 4-bits of the saved value. First, issue
508509 // an MFCRpsued to save all of the CRBits and, if needed, kill the SrcReg.
519520 .addImm(0)
520521 .addImm(31);
521522
522 addFrameReference(BuildMI(MBB, II, dl, TII.get(PPC::STW))
523 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW))
523524 .addReg(Reg, getKillRegState(MI.getOperand(1).getImm())),
524525 FrameIndex);
525526
0 ; RUN: llc %s -o -
1
2 ; ModuleID = 'undo.c'
3 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
4 target triple = "powerpc64-unknown-freebsd"
5
6 %struct.__sFILE = type {}
7 %struct.pos_T = type { i64 }
8
9 ; check that we're not copying stuff between R and X registers
10 define internal void @serialize_pos(%struct.pos_T* byval %pos, %struct.__sFILE* %fp) nounwind {
11 entry:
12 ret void
13 }