llvm.org GIT mirror llvm / 94c4904
CodeGen: Rename DEBUG_TYPE to match passnames Rename the DEBUG_TYPE to match the names of corresponding passes where it makes sense. Also establish the pattern of simply referencing DEBUG_TYPE instead of repeating the passname where possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303921 91177308-0d34-0410-b5e6-96231b3b80d8 Matthias Braun 2 years ago
74 changed file(s) with 146 addition(s) and 162 deletion(s). Raw diff Collapse all Expand all
9595
9696 char AtomicExpand::ID = 0;
9797 char &llvm::AtomicExpandID = AtomicExpand::ID;
98 INITIALIZE_PASS(AtomicExpand, "atomic-expand", "Expand Atomic instructions",
98 INITIALIZE_PASS(AtomicExpand, DEBUG_TYPE, "Expand Atomic instructions",
9999 false, false)
100100
101101 FunctionPass *llvm::createAtomicExpandPass() { return new AtomicExpand(); }
2323 #include
2424 using namespace llvm;
2525
26 #define DEBUG_TYPE "basictti"
27
2826 // This flag is used by the template base class for BasicTTIImpl, and here to
2927 // provide a definition.
3028 cl::opt
2626
2727 using namespace llvm;
2828
29 #define DEBUG_TYPE "coal-branch"
29 #define DEBUG_TYPE "branch-coalescing"
3030
3131 static cl::opt
3232 EnableBranchCoalescing("enable-branch-coalesce", cl::Hidden,
192192 char BranchCoalescing::ID = 0;
193193 char &llvm::BranchCoalescingID = BranchCoalescing::ID;
194194
195 INITIALIZE_PASS_BEGIN(BranchCoalescing, "branch-coalescing",
195 INITIALIZE_PASS_BEGIN(BranchCoalescing, DEBUG_TYPE,
196196 "Branch Coalescing", false, false)
197197 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
198198 INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
199 INITIALIZE_PASS_END(BranchCoalescing, "branch-coalescing", "Branch Coalescing",
199 INITIALIZE_PASS_END(BranchCoalescing, DEBUG_TYPE, "Branch Coalescing",
200200 false, false)
201201
202202 BranchCoalescing::CoalescingCandidateInfo::CoalescingCandidateInfo()
4343 #include
4444 using namespace llvm;
4545
46 #define DEBUG_TYPE "branchfolding"
46 #define DEBUG_TYPE "branch-folder"
4747
4848 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
4949 STATISTIC(NumBranchOpts, "Number of branches optimized");
8888 char BranchFolderPass::ID = 0;
8989 char &llvm::BranchFolderPassID = BranchFolderPass::ID;
9090
91 INITIALIZE_PASS(BranchFolderPass, "branch-folder",
91 INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE,
9292 "Control Flow Optimizer", false, false)
9393
9494 bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
256256 }
257257
258258 char CodeGenPrepare::ID = 0;
259 INITIALIZE_PASS_BEGIN(CodeGenPrepare, "codegenprepare",
259 INITIALIZE_PASS_BEGIN(CodeGenPrepare, DEBUG_TYPE,
260260 "Optimize for code generation", false, false)
261261 INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)
262 INITIALIZE_PASS_END(CodeGenPrepare, "codegenprepare",
262 INITIALIZE_PASS_END(CodeGenPrepare, DEBUG_TYPE,
263263 "Optimize for code generation", false, false)
264264
265265 FunctionPass *llvm::createCodeGenPreparePass() { return new CodeGenPrepare(); }
2222
2323 using namespace llvm;
2424
25 #define DEBUG_TYPE "codegen-dce"
25 #define DEBUG_TYPE "dead-mi-elimination"
2626
2727 STATISTIC(NumDeletes, "Number of dead instructions deleted");
2828
5353 char DeadMachineInstructionElim::ID = 0;
5454 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
5555
56 INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
56 INITIALIZE_PASS(DeadMachineInstructionElim, DEBUG_TYPE,
5757 "Remove dead machine instructions", false, false)
5858
5959 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
131131 char DetectDeadLanes::ID = 0;
132132 char &llvm::DetectDeadLanesID = DetectDeadLanes::ID;
133133
134 INITIALIZE_PASS(DetectDeadLanes, "detect-dead-lanes", "Detect Dead Lanes",
135 false, false)
134 INITIALIZE_PASS(DetectDeadLanes, DEBUG_TYPE, "Detect Dead Lanes", false, false)
136135
137136 /// Returns true if \p MI will get lowered to a series of COPY instructions.
138137 /// We call this a COPY-like instruction.
7070 } // end anonymous namespace
7171
7272 char DwarfEHPrepare::ID = 0;
73 INITIALIZE_PASS_BEGIN(DwarfEHPrepare, "dwarfehprepare",
73 INITIALIZE_PASS_BEGIN(DwarfEHPrepare, DEBUG_TYPE,
7474 "Prepare DWARF exceptions", false, false)
7575 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
7676 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
7777 INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
78 INITIALIZE_PASS_END(DwarfEHPrepare, "dwarfehprepare",
78 INITIALIZE_PASS_END(DwarfEHPrepare, DEBUG_TYPE,
7979 "Prepare DWARF exceptions", false, false)
8080
8181 FunctionPass *llvm::createDwarfEHPass() { return new DwarfEHPrepare(); }
615615 char EarlyIfConverter::ID = 0;
616616 char &llvm::EarlyIfConverterID = EarlyIfConverter::ID;
617617
618 INITIALIZE_PASS_BEGIN(EarlyIfConverter,
619 "early-ifcvt", "Early If Converter", false, false)
618 INITIALIZE_PASS_BEGIN(EarlyIfConverter, DEBUG_TYPE,
619 "Early If Converter", false, false)
620620 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
621621 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
622622 INITIALIZE_PASS_DEPENDENCY(MachineTraceMetrics)
623 INITIALIZE_PASS_END(EarlyIfConverter,
624 "early-ifcvt", "Early If Converter", false, false)
623 INITIALIZE_PASS_END(EarlyIfConverter, DEBUG_TYPE,
624 "Early If Converter", false, false)
625625
626626 void EarlyIfConverter::getAnalysisUsage(AnalysisUsage &AU) const {
627627 AU.addRequired();
4040
4141 char ExpandISelPseudos::ID = 0;
4242 char &llvm::ExpandISelPseudosID = ExpandISelPseudos::ID;
43 INITIALIZE_PASS(ExpandISelPseudos, "expand-isel-pseudos",
43 INITIALIZE_PASS(ExpandISelPseudos, DEBUG_TYPE,
4444 "Expand ISel Pseudo-instructions", false, false)
4545
4646 bool ExpandISelPseudos::runOnMachineFunction(MachineFunction &MF) {
5757 char ExpandPostRA::ID = 0;
5858 char &llvm::ExpandPostRAPseudosID = ExpandPostRA::ID;
5959
60 INITIALIZE_PASS(ExpandPostRA, "postrapseudos",
60 INITIALIZE_PASS(ExpandPostRA, DEBUG_TYPE,
6161 "Post-RA pseudo instruction expansion pass", false, false)
6262
6363 /// TransferImplicitOperands - MI is a pseudo-instruction, and the lowered
3636
3737 char FuncletLayout::ID = 0;
3838 char &llvm::FuncletLayoutID = FuncletLayout::ID;
39 INITIALIZE_PASS(FuncletLayout, "funclet-layout",
39 INITIALIZE_PASS(FuncletLayout, DEBUG_TYPE,
4040 "Contiguously Lay Out Funclets", false, false)
4141
4242 bool FuncletLayout::runOnMachineFunction(MachineFunction &F) {
191191 } // end anonymous namespace
192192
193193 char GlobalMerge::ID = 0;
194 INITIALIZE_PASS_BEGIN(GlobalMerge, "global-merge", "Merge global variables",
195 false, false)
196 INITIALIZE_PASS_END(GlobalMerge, "global-merge", "Merge global variables",
197 false, false)
194 INITIALIZE_PASS(GlobalMerge, DEBUG_TYPE, "Merge global variables", false, false)
198195
199196 bool GlobalMerge::doMerge(SmallVectorImpl &Globals,
200197 Module &M, bool isConst, unsigned AddrSpace) const {
3838
3939 using namespace llvm;
4040
41 #define DEBUG_TYPE "ifcvt"
41 #define DEBUG_TYPE "if-converter"
4242
4343 // Hidden options for help debugging.
4444 static cl::opt IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
315315
316316 char &llvm::IfConverterID = IfConverter::ID;
317317
318 INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
318 INITIALIZE_PASS_BEGIN(IfConverter, DEBUG_TYPE, "If Converter", false, false)
319319 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
320 INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
320 INITIALIZE_PASS_END(IfConverter, DEBUG_TYPE, "If Converter", false, false)
321321
322322 bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
323323 if (skipFunction(*MF.getFunction()) || (PredicateFtor && !PredicateFtor(MF)))
673673
674674 char ImplicitNullChecks::ID = 0;
675675 char &llvm::ImplicitNullChecksID = ImplicitNullChecks::ID;
676 INITIALIZE_PASS_BEGIN(ImplicitNullChecks, "implicit-null-checks",
676 INITIALIZE_PASS_BEGIN(ImplicitNullChecks, DEBUG_TYPE,
677677 "Implicit null checks", false, false)
678678 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
679 INITIALIZE_PASS_END(ImplicitNullChecks, "implicit-null-checks",
679 INITIALIZE_PASS_END(ImplicitNullChecks, DEBUG_TYPE,
680680 "Implicit null checks", false, false)
106106 } // end anonymous namespace.
107107
108108 char InterleavedAccess::ID = 0;
109 INITIALIZE_PASS_BEGIN(
110 InterleavedAccess, "interleaved-access",
109 INITIALIZE_PASS_BEGIN(InterleavedAccess, DEBUG_TYPE,
111110 "Lower interleaved memory accesses to target specific intrinsics", false,
112111 false)
113112 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
114 INITIALIZE_PASS_END(
115 InterleavedAccess, "interleaved-access",
113 INITIALIZE_PASS_END(InterleavedAccess, DEBUG_TYPE,
116114 "Lower interleaved memory accesses to target specific intrinsics", false,
117115 false)
118116
4242
4343 using namespace llvm;
4444
45 #define DEBUG_TYPE "live-debug-values"
45 #define DEBUG_TYPE "livedebugvalues"
4646
4747 STATISTIC(NumInserted, "Number of DBG_VALUE instructions inserted");
4848
282282
283283 char LiveDebugValues::ID = 0;
284284 char &llvm::LiveDebugValuesID = LiveDebugValues::ID;
285 INITIALIZE_PASS(LiveDebugValues, "livedebugvalues", "Live DEBUG_VALUE analysis",
285 INITIALIZE_PASS(LiveDebugValues, DEBUG_TYPE, "Live DEBUG_VALUE analysis",
286286 false, false)
287287
288288 /// Default construct and initialize the pass.
4444
4545 using namespace llvm;
4646
47 #define DEBUG_TYPE "livedebug"
47 #define DEBUG_TYPE "livedebugvars"
4848
4949 static cl::opt
5050 EnableLDV("live-debug-variables", cl::init(true),
5353 STATISTIC(NumInsertedDebugValues, "Number of DBG_VALUEs inserted");
5454 char LiveDebugVariables::ID = 0;
5555
56 INITIALIZE_PASS_BEGIN(LiveDebugVariables, "livedebugvars",
56 INITIALIZE_PASS_BEGIN(LiveDebugVariables, DEBUG_TYPE,
5757 "Debug Variable Analysis", false, false)
5858 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
5959 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
60 INITIALIZE_PASS_END(LiveDebugVariables, "livedebugvars",
60 INITIALIZE_PASS_END(LiveDebugVariables, DEBUG_TYPE,
6161 "Debug Variable Analysis", false, false)
6262
6363 void LiveDebugVariables::getAnalysisUsage(AnalysisUsage &AU) const {
2424 #define DEBUG_TYPE "livestacks"
2525
2626 char LiveStacks::ID = 0;
27 INITIALIZE_PASS_BEGIN(LiveStacks, "livestacks",
27 INITIALIZE_PASS_BEGIN(LiveStacks, DEBUG_TYPE,
2828 "Live Stack Slot Analysis", false, false)
2929 INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
30 INITIALIZE_PASS_END(LiveStacks, "livestacks",
30 INITIALIZE_PASS_END(LiveStacks, DEBUG_TYPE,
3131 "Live Stack Slot Analysis", false, false)
3232
3333 char &llvm::LiveStacksID = LiveStacks::ID;
102102
103103 char LocalStackSlotPass::ID = 0;
104104 char &llvm::LocalStackSlotAllocationID = LocalStackSlotPass::ID;
105 INITIALIZE_PASS_BEGIN(LocalStackSlotPass, "localstackalloc",
105 INITIALIZE_PASS_BEGIN(LocalStackSlotPass, DEBUG_TYPE,
106106 "Local Stack Slot Allocation", false, false)
107107 INITIALIZE_PASS_DEPENDENCY(StackProtector)
108 INITIALIZE_PASS_END(LocalStackSlotPass, "localstackalloc",
108 INITIALIZE_PASS_END(LocalStackSlotPass, DEBUG_TYPE,
109109 "Local Stack Slot Allocation", false, false)
110110
111111
5252
5353 char LowerEmuTLS::ID = 0;
5454
55 INITIALIZE_PASS(LowerEmuTLS, "loweremutls",
55 INITIALIZE_PASS(LowerEmuTLS, DEBUG_TYPE,
5656 "Add __emutls_[vt]. variables for emultated TLS model", false,
5757 false)
5858
2525
2626 using namespace llvm;
2727
28 #define DEBUG_TYPE "block-freq"
28 #define DEBUG_TYPE "machine-block-freq"
2929
3030
3131 static cl::opt ViewMachineBlockFreqPropagationDAG(
148148
149149 } // end namespace llvm
150150
151 INITIALIZE_PASS_BEGIN(MachineBlockFrequencyInfo, "machine-block-freq",
151 INITIALIZE_PASS_BEGIN(MachineBlockFrequencyInfo, DEBUG_TYPE,
152152 "Machine Block Frequency Analysis", true, true)
153153 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
154154 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
155 INITIALIZE_PASS_END(MachineBlockFrequencyInfo, "machine-block-freq",
155 INITIALIZE_PASS_END(MachineBlockFrequencyInfo, DEBUG_TYPE,
156156 "Machine Block Frequency Analysis", true, true)
157157
158158 char MachineBlockFrequencyInfo::ID = 0;
498498
499499 char MachineBlockPlacement::ID = 0;
500500 char &llvm::MachineBlockPlacementID = MachineBlockPlacement::ID;
501 INITIALIZE_PASS_BEGIN(MachineBlockPlacement, "block-placement",
501 INITIALIZE_PASS_BEGIN(MachineBlockPlacement, DEBUG_TYPE,
502502 "Branch Probability Basic Block Placement", false, false)
503503 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
504504 INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
505505 INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
506506 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
507 INITIALIZE_PASS_END(MachineBlockPlacement, "block-placement",
507 INITIALIZE_PASS_END(MachineBlockPlacement, DEBUG_TYPE,
508508 "Branch Probability Basic Block Placement", false, false)
509509
510510 #ifndef NDEBUG
107107
108108 char MachineCSE::ID = 0;
109109 char &llvm::MachineCSEID = MachineCSE::ID;
110 INITIALIZE_PASS_BEGIN(MachineCSE, "machine-cse",
111 "Machine Common Subexpression Elimination", false, false)
110 INITIALIZE_PASS_BEGIN(MachineCSE, DEBUG_TYPE,
111 "Machine Common Subexpression Elimination", false, false)
112112 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
113113 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
114 INITIALIZE_PASS_END(MachineCSE, "machine-cse",
115 "Machine Common Subexpression Elimination", false, false)
114 INITIALIZE_PASS_END(MachineCSE, DEBUG_TYPE,
115 "Machine Common Subexpression Elimination", false, false)
116116
117117 /// The source register of a COPY machine instruction can be propagated to all
118118 /// its users, and this propagation could increase the probability of finding
8585 char MachineCombiner::ID = 0;
8686 char &llvm::MachineCombinerID = MachineCombiner::ID;
8787
88 INITIALIZE_PASS_BEGIN(MachineCombiner, "machine-combiner",
88 INITIALIZE_PASS_BEGIN(MachineCombiner, DEBUG_TYPE,
8989 "Machine InstCombiner", false, false)
9090 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
9191 INITIALIZE_PASS_DEPENDENCY(MachineTraceMetrics)
92 INITIALIZE_PASS_END(MachineCombiner, "machine-combiner", "Machine InstCombiner",
92 INITIALIZE_PASS_END(MachineCombiner, DEBUG_TYPE, "Machine InstCombiner",
9393 false, false)
9494
9595 void MachineCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
2626 #include "llvm/Target/TargetSubtargetInfo.h"
2727 using namespace llvm;
2828
29 #define DEBUG_TYPE "codegen-cp"
29 #define DEBUG_TYPE "machine-cp"
3030
3131 STATISTIC(NumDeletes, "Number of dead copies deleted");
3232
7878 char MachineCopyPropagation::ID = 0;
7979 char &llvm::MachineCopyPropagationID = MachineCopyPropagation::ID;
8080
81 INITIALIZE_PASS(MachineCopyPropagation, "machine-cp",
81 INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE,
8282 "Machine Copy Propagation Pass", false, false)
8383
8484 /// Remove any entry in \p Map where the register is a subregister or equal to
3737 #include "llvm/Target/TargetSubtargetInfo.h"
3838 using namespace llvm;
3939
40 #define DEBUG_TYPE "machine-licm"
40 #define DEBUG_TYPE "machinelicm"
4141
4242 static cl::opt
4343 AvoidSpeculation("avoid-speculation",
236236
237237 char MachineLICM::ID = 0;
238238 char &llvm::MachineLICMID = MachineLICM::ID;
239 INITIALIZE_PASS_BEGIN(MachineLICM, "machinelicm",
240 "Machine Loop Invariant Code Motion", false, false)
239 INITIALIZE_PASS_BEGIN(MachineLICM, DEBUG_TYPE,
240 "Machine Loop Invariant Code Motion", false, false)
241241 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
242242 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
243243 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
244 INITIALIZE_PASS_END(MachineLICM, "machinelicm",
245 "Machine Loop Invariant Code Motion", false, false)
244 INITIALIZE_PASS_END(MachineLICM, DEBUG_TYPE,
245 "Machine Loop Invariant Code Motion", false, false)
246246
247247 /// Test if the given loop is the outer-most loop that has a unique predecessor.
248248 static bool LoopIsOuterMostWithPredecessor(MachineLoop *CurLoop) {
900900 ModulePass *createMachineOutlinerPass() { return new MachineOutliner(); }
901901 }
902902
903 INITIALIZE_PASS(MachineOutliner, "machine-outliner",
903 INITIALIZE_PASS(MachineOutliner, DEBUG_TYPE,
904904 "Machine Function Outliner", false, false)
905905
906906 void MachineOutliner::pruneOverlaps(std::vector &CandidateList,
714714 int MachinePipeliner::NumTries = 0;
715715 #endif
716716 char &llvm::MachinePipelinerID = MachinePipeliner::ID;
717 INITIALIZE_PASS_BEGIN(MachinePipeliner, "pipeliner",
717 INITIALIZE_PASS_BEGIN(MachinePipeliner, DEBUG_TYPE,
718718 "Modulo Software Pipelining", false, false)
719719 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
720720 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
721721 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
722722 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
723 INITIALIZE_PASS_END(MachinePipeliner, "pipeliner",
723 INITIALIZE_PASS_END(MachinePipeliner, DEBUG_TYPE,
724724 "Modulo Software Pipelining", false, false)
725725
726726 /// The "main" function for implementing Swing Modulo Scheduling.
6868
6969 using namespace llvm;
7070
71 #define DEBUG_TYPE "misched"
71 #define DEBUG_TYPE "machine-scheduler"
7272
7373 namespace llvm {
7474
190190
191191 char &llvm::MachineSchedulerID = MachineScheduler::ID;
192192
193 INITIALIZE_PASS_BEGIN(MachineScheduler, "machine-scheduler",
193 INITIALIZE_PASS_BEGIN(MachineScheduler, DEBUG_TYPE,
194194 "Machine Instruction Scheduler", false, false)
195195 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
196196 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
197197 INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
198198 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
199 INITIALIZE_PASS_END(MachineScheduler, "machine-scheduler",
199 INITIALIZE_PASS_END(MachineScheduler, DEBUG_TYPE,
200200 "Machine Instruction Scheduler", false, false)
201201
202202 MachineScheduler::MachineScheduler()
172172
173173 char MachineSinking::ID = 0;
174174 char &llvm::MachineSinkingID = MachineSinking::ID;
175 INITIALIZE_PASS_BEGIN(MachineSinking, "machine-sink",
176 "Machine code sinking", false, false)
175 INITIALIZE_PASS_BEGIN(MachineSinking, DEBUG_TYPE,
176 "Machine code sinking", false, false)
177177 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
178178 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
179179 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
180180 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
181 INITIALIZE_PASS_END(MachineSinking, "machine-sink",
182 "Machine code sinking", false, false)
181 INITIALIZE_PASS_END(MachineSinking, DEBUG_TYPE,
182 "Machine code sinking", false, false)
183183
184184 bool MachineSinking::PerformTrivialForwardCoalescing(MachineInstr &MI,
185185 MachineBasicBlock *MBB) {
4343 char MachineTraceMetrics::ID = 0;
4444 char &llvm::MachineTraceMetricsID = MachineTraceMetrics::ID;
4545
46 INITIALIZE_PASS_BEGIN(MachineTraceMetrics,
47 "machine-trace-metrics", "Machine Trace Metrics", false, true)
46 INITIALIZE_PASS_BEGIN(MachineTraceMetrics, DEBUG_TYPE,
47 "Machine Trace Metrics", false, true)
4848 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
4949 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
50 INITIALIZE_PASS_END(MachineTraceMetrics,
51 "machine-trace-metrics", "Machine Trace Metrics", false, true)
50 INITIALIZE_PASS_END(MachineTraceMetrics, DEBUG_TYPE,
51 "Machine Trace Metrics", false, true)
5252
5353 MachineTraceMetrics::MachineTraceMetrics() : MachineFunctionPass(ID) {
5454 std::fill(std::begin(Ensembles), std::end(Ensembles), nullptr);
2222 #include "llvm/Target/TargetSubtargetInfo.h"
2323 using namespace llvm;
2424
25 #define DEBUG_TYPE "phi-opt"
25 #define DEBUG_TYPE "opt-phis"
2626
2727 STATISTIC(NumPHICycles, "Number of PHI cycles replaced");
2828 STATISTIC(NumDeadPHICycles, "Number of dead PHI cycles");
5858
5959 char OptimizePHIs::ID = 0;
6060 char &llvm::OptimizePHIsID = OptimizePHIs::ID;
61 INITIALIZE_PASS(OptimizePHIs, "opt-phis",
61 INITIALIZE_PASS(OptimizePHIs, DEBUG_TYPE,
6262 "Optimize machine instruction PHIs", false, false)
6363
6464 bool OptimizePHIs::runOnMachineFunction(MachineFunction &Fn) {
111111 char PHIElimination::ID = 0;
112112 char& llvm::PHIEliminationID = PHIElimination::ID;
113113
114 INITIALIZE_PASS_BEGIN(PHIElimination, "phi-node-elimination",
114 INITIALIZE_PASS_BEGIN(PHIElimination, DEBUG_TYPE,
115115 "Eliminate PHI nodes for register allocation",
116116 false, false)
117117 INITIALIZE_PASS_DEPENDENCY(LiveVariables)
118 INITIALIZE_PASS_END(PHIElimination, "phi-node-elimination",
118 INITIALIZE_PASS_END(PHIElimination, DEBUG_TYPE,
119119 "Eliminate PHI nodes for register allocation", false, false)
120120
121121 void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
199199
200200 char &llvm::PostRASchedulerID = PostRAScheduler::ID;
201201
202 INITIALIZE_PASS(PostRAScheduler, "post-RA-sched",
202 INITIALIZE_PASS(PostRAScheduler, DEBUG_TYPE,
203203 "Post RA top-down list latency scheduler", false, false)
204204
205205 SchedulePostRATDList::SchedulePostRATDList(
1919
2020 using namespace llvm;
2121
22 #define DEBUG_TYPE "processimplicitdefs"
22 #define DEBUG_TYPE "processimpdefs"
2323
2424 namespace {
2525 /// Process IMPLICIT_DEF instructions and make sure there is one implicit_def
5050 char ProcessImplicitDefs::ID = 0;
5151 char &llvm::ProcessImplicitDefsID = ProcessImplicitDefs::ID;
5252
53 INITIALIZE_PASS_BEGIN(ProcessImplicitDefs, "processimpdefs",
54 "Process Implicit Definitions", false, false)
55 INITIALIZE_PASS_END(ProcessImplicitDefs, "processimpdefs",
53 INITIALIZE_PASS(ProcessImplicitDefs, DEBUG_TYPE,
5654 "Process Implicit Definitions", false, false)
5755
5856 void ProcessImplicitDefs::getAnalysisUsage(AnalysisUsage &AU) const {
4444
4545 using namespace llvm;
4646
47 #define DEBUG_TYPE "pei"
47 #define DEBUG_TYPE "prologepilog"
4848
4949 typedef SmallVector MBBVector;
5050 static void doSpillCalleeSavedRegs(MachineFunction &MF, RegScavenger *RS,
128128 cl::desc("Warn for stack size bigger than the given"
129129 " number"));
130130
131 INITIALIZE_PASS_BEGIN(PEI, "prologepilog", "Prologue/Epilogue Insertion", false,
131 INITIALIZE_PASS_BEGIN(PEI, DEBUG_TYPE, "Prologue/Epilogue Insertion", false,
132132 false)
133133 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
134134 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
135135 INITIALIZE_PASS_DEPENDENCY(StackProtector)
136 INITIALIZE_PASS_END(PEI, "prologepilog",
136 INITIALIZE_PASS_END(PEI, DEBUG_TYPE,
137137 "Prologue/Epilogue Insertion & Frame Finalization", false,
138138 false)
139139
111111
112112 char &llvm::RenameIndependentSubregsID = RenameIndependentSubregs::ID;
113113
114 INITIALIZE_PASS_BEGIN(RenameIndependentSubregs, "rename-independent-subregs",
114 INITIALIZE_PASS_BEGIN(RenameIndependentSubregs, DEBUG_TYPE,
115115 "Rename Independent Subregisters", false, false)
116116 INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
117117 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
118 INITIALIZE_PASS_END(RenameIndependentSubregs, "rename-independent-subregs",
118 INITIALIZE_PASS_END(RenameIndependentSubregs, DEBUG_TYPE,
119119 "Rename Independent Subregisters", false, false)
120120
121121 bool RenameIndependentSubregs::renameComponents(LiveInterval &LI) const {
5151 using namespace llvm;
5252 using namespace llvm::safestack;
5353
54 #define DEBUG_TYPE "safestack"
54 #define DEBUG_TYPE "safe-stack"
5555
5656 namespace llvm {
5757
819819 } // anonymous namespace
820820
821821 char SafeStackLegacyPass::ID = 0;
822 INITIALIZE_PASS_BEGIN(SafeStackLegacyPass, "safe-stack",
822 INITIALIZE_PASS_BEGIN(SafeStackLegacyPass, DEBUG_TYPE,
823823 "Safe Stack instrumentation pass", false, false)
824824 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
825 INITIALIZE_PASS_END(SafeStackLegacyPass, "safe-stack",
825 INITIALIZE_PASS_END(SafeStackLegacyPass, DEBUG_TYPE,
826826 "Safe Stack instrumentation pass", false, false)
827827
828828 FunctionPass *llvm::createSafeStackPass() { return new SafeStackLegacyPass(); }
4848 } // namespace
4949
5050 char ScalarizeMaskedMemIntrin::ID = 0;
51 INITIALIZE_PASS_BEGIN(ScalarizeMaskedMemIntrin, "scalarize-masked-mem-intrin",
52 "Scalarize unsupported masked memory intrinsics", false,
53 false)
54 INITIALIZE_PASS_END(ScalarizeMaskedMemIntrin, "scalarize-masked-mem-intrin",
55 "Scalarize unsupported masked memory intrinsics", false,
56 false)
51 INITIALIZE_PASS(ScalarizeMaskedMemIntrin, DEBUG_TYPE,
52 "Scalarize unsupported masked memory intrinsics", false, false)
5753
5854 FunctionPass *llvm::createScalarizeMaskedMemIntrinPass() {
5955 return new ScalarizeMaskedMemIntrin();
2626
2727 using namespace llvm;
2828
29 #define DEBUG_TYPE "shadowstackgclowering"
29 #define DEBUG_TYPE "shadow-stack-gc-lowering"
3030
3131 namespace {
3232
6565 };
6666 }
6767
68 INITIALIZE_PASS_BEGIN(ShadowStackGCLowering, "shadow-stack-gc-lowering",
68 INITIALIZE_PASS_BEGIN(ShadowStackGCLowering, DEBUG_TYPE,
6969 "Shadow Stack GC Lowering", false, false)
7070 INITIALIZE_PASS_DEPENDENCY(GCModuleInfo)
71 INITIALIZE_PASS_END(ShadowStackGCLowering, "shadow-stack-gc-lowering",
71 INITIALIZE_PASS_END(ShadowStackGCLowering, DEBUG_TYPE,
7272 "Shadow Stack GC Lowering", false, false)
7373
7474 FunctionPass *llvm::createShadowStackGCLoweringPass() { return new ShadowStackGCLowering(); }
209209 char ShrinkWrap::ID = 0;
210210 char &llvm::ShrinkWrapID = ShrinkWrap::ID;
211211
212 INITIALIZE_PASS_BEGIN(ShrinkWrap, "shrink-wrap", "Shrink Wrap Pass", false,
213 false)
212 INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
214213 INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
215214 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
216215 INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
217216 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
218 INITIALIZE_PASS_END(ShrinkWrap, "shrink-wrap", "Shrink Wrap Pass", false, false)
217 INITIALIZE_PASS_END(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
219218
220219 bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI,
221220 RegScavenger *RS) const {
7373 } // end anonymous namespace
7474
7575 char SjLjEHPrepare::ID = 0;
76 INITIALIZE_PASS(SjLjEHPrepare, "sjljehprepare", "Prepare SjLj exceptions",
76 INITIALIZE_PASS(SjLjEHPrepare, DEBUG_TYPE, "Prepare SjLj exceptions",
7777 false, false)
7878
7979 // Public Interface To the SjLjEHPrepare pass.
1818 #define DEBUG_TYPE "slotindexes"
1919
2020 char SlotIndexes::ID = 0;
21 INITIALIZE_PASS(SlotIndexes, "slotindexes",
21 INITIALIZE_PASS(SlotIndexes, DEBUG_TYPE,
2222 "Slot index numbering", false, false)
2323
2424 STATISTIC(NumLocalRenum, "Number of local renumberings");
3939
4040 using namespace llvm;
4141
42 #define DEBUG_TYPE "spillplacement"
42 #define DEBUG_TYPE "spill-code-placement"
4343
4444 char SpillPlacement::ID = 0;
45 INITIALIZE_PASS_BEGIN(SpillPlacement, "spill-code-placement",
45 INITIALIZE_PASS_BEGIN(SpillPlacement, DEBUG_TYPE,
4646 "Spill Code Placement Analysis", true, true)
4747 INITIALIZE_PASS_DEPENDENCY(EdgeBundles)
4848 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
49 INITIALIZE_PASS_END(SpillPlacement, "spill-code-placement",
49 INITIALIZE_PASS_END(SpillPlacement, DEBUG_TYPE,
5050 "Spill Code Placement Analysis", true, true)
5151
5252 char &llvm::SpillPlacementID = SpillPlacement::ID;
5252
5353 using namespace llvm;
5454
55 #define DEBUG_TYPE "stackcoloring"
55 #define DEBUG_TYPE "stack-coloring"
5656
5757 static cl::opt
5858 DisableColoring("no-stack-coloring",
370370 char StackColoring::ID = 0;
371371 char &llvm::StackColoringID = StackColoring::ID;
372372
373 INITIALIZE_PASS_BEGIN(StackColoring,
374 "stack-coloring", "Merge disjoint stack slots", false, false)
373 INITIALIZE_PASS_BEGIN(StackColoring, DEBUG_TYPE,
374 "Merge disjoint stack slots", false, false)
375375 INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
376376 INITIALIZE_PASS_DEPENDENCY(StackProtector)
377 INITIALIZE_PASS_END(StackColoring,
378 "stack-coloring", "Merge disjoint stack slots", false, false)
377 INITIALIZE_PASS_END(StackColoring, DEBUG_TYPE,
378 "Merge disjoint stack slots", false, false)
379379
380380 void StackColoring::getAnalysisUsage(AnalysisUsage &AU) const {
381381 AU.addRequired();
5757 cl::init(true), cl::Hidden);
5858
5959 char StackProtector::ID = 0;
60 INITIALIZE_PASS_BEGIN(StackProtector, "stack-protector",
60 INITIALIZE_PASS_BEGIN(StackProtector, DEBUG_TYPE,
6161 "Insert stack protectors", false, true)
6262 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
63 INITIALIZE_PASS_END(StackProtector, "stack-protector",
63 INITIALIZE_PASS_END(StackProtector, DEBUG_TYPE,
6464 "Insert stack protectors", false, true)
6565
6666 FunctionPass *llvm::createStackProtectorPass() { return new StackProtector(); }
3131 #include
3232 using namespace llvm;
3333
34 #define DEBUG_TYPE "stackslotcoloring"
34 #define DEBUG_TYPE "stack-slot-coloring"
3535
3636 static cl::opt
3737 DisableSharing("no-stack-slot-sharing",
115115 char StackSlotColoring::ID = 0;
116116 char &llvm::StackSlotColoringID = StackSlotColoring::ID;
117117
118 INITIALIZE_PASS_BEGIN(StackSlotColoring, "stack-slot-coloring",
118 INITIALIZE_PASS_BEGIN(StackSlotColoring, DEBUG_TYPE,
119119 "Stack Slot Coloring", false, false)
120120 INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
121121 INITIALIZE_PASS_DEPENDENCY(LiveStacks)
122122 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
123 INITIALIZE_PASS_END(StackSlotColoring, "stack-slot-coloring",
123 INITIALIZE_PASS_END(StackSlotColoring, DEBUG_TYPE,
124124 "Stack Slot Coloring", false, false)
125125
126126 namespace {
3939
4040 char &llvm::TailDuplicateID = TailDuplicatePass::ID;
4141
42 INITIALIZE_PASS(TailDuplicatePass, "tailduplication", "Tail Duplication", false,
43 false)
42 INITIALIZE_PASS(TailDuplicatePass, DEBUG_TYPE, "Tail Duplication", false, false)
4443
4544 bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
4645 if (skipFunction(*MF.getFunction()))
5151
5252 using namespace llvm;
5353
54 #define DEBUG_TYPE "twoaddrinstr"
54 #define DEBUG_TYPE "twoaddressinstruction"
5555
5656 STATISTIC(NumTwoAddressInstrs, "Number of two-address instructions");
5757 STATISTIC(NumCommuted , "Number of instructions commuted to coalesce");
170170 } // end anonymous namespace
171171
172172 char TwoAddressInstructionPass::ID = 0;
173 INITIALIZE_PASS_BEGIN(TwoAddressInstructionPass, "twoaddressinstruction",
173 INITIALIZE_PASS_BEGIN(TwoAddressInstructionPass, DEBUG_TYPE,
174174 "Two-Address instruction pass", false, false)
175175 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
176 INITIALIZE_PASS_END(TwoAddressInstructionPass, "twoaddressinstruction",
176 INITIALIZE_PASS_END(TwoAddressInstructionPass, DEBUG_TYPE,
177177 "Two-Address instruction pass", false, false)
178178
179179 char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID;
9393 } // end anonymous namespace
9494
9595 char WinEHPrepare::ID = 0;
96 INITIALIZE_PASS(WinEHPrepare, "winehprepare", "Prepare Windows exceptions",
96 INITIALIZE_PASS(WinEHPrepare, DEBUG_TYPE, "Prepare Windows exceptions",
9797 false, false)
9898
9999 FunctionPass *llvm::createWinEHPass() { return new WinEHPrepare(); }
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -verify-misched -debug-only=misched -aarch64-enable-stp-suppress=false -o - 2>&1 > /dev/null | FileCheck %s
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -verify-misched -debug-only=machine-scheduler -aarch64-enable-stp-suppress=false -o - 2>&1 > /dev/null | FileCheck %s
22
33 ; CHECK: ********** MI Scheduling **********
44 ; CHECK-LABEL: stp_i64_scale:BB#0
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched=0 -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched=0 -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
22 ; REQUIRES: asserts
33
44 @G = external global [0 x i32], align 4
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
2 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=exynos-m1 -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck --check-prefix=EXYNOS %s
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
2 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=exynos-m1 -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck --check-prefix=EXYNOS %s
33
44 ; Test ldr clustering.
55 ; CHECK: ********** MI Scheduling **********
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -disable-machine-dce -o - 2>&1 > /dev/null | FileCheck %s
2 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -disable-machine-dce -o - -misched-limit=2 2>&1 > /dev/null | FileCheck %s
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -disable-machine-dce -o - 2>&1 > /dev/null | FileCheck %s
2 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -disable-machine-dce -o - -misched-limit=2 2>&1 > /dev/null | FileCheck %s
33 ;
44 ; The Cortex-A53 machine model will cause the MADD instruction to be scheduled
55 ; much higher than the ADD instructions in order to hide latency. When not
55 ; the loads to avoid unnecessary stalls. The generic machine model schedules 4
66 ; loads consecutively for this case and will cause stalls.
77 ;
8 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
8 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
99 ; CHECK: ********** MI Scheduling **********
1010 ; CHECK: main:BB#2
1111 ; CHECK: LDR
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
22 ;
33 ; For Cortex-A53, shiftable operands that are not actually shifted
44 ; are not needed for an additional two cycles.
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
22 ;
33 ; Test for bug in misched memory dependency calculation.
44 ;
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched=0 -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched=0 -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
22
33
44 @G1 = common global [100 x i32] zeroinitializer, align 4
None # RUN: llc -o /dev/null %s -mtriple=aarch64-- -run-pass=machine-scheduler -enable-misched -debug-only=misched 2>&1 | FileCheck %s
0 # RUN: llc -o /dev/null %s -mtriple=aarch64-- -run-pass=machine-scheduler -enable-misched -debug-only=machine-scheduler 2>&1 | FileCheck %s
11 # REQUIRES: asserts
22 --- |
33 define void @func() { ret void }
None ; RUN: llc -mcpu=cyclone -debug-only=misched < %s 2>&1 | FileCheck %s
0 ; RUN: llc -mcpu=cyclone -debug-only=machine-scheduler < %s 2>&1 | FileCheck %s
11
22 ; REQUIRES: asserts
33
None ; RUN: llc -debug-only=misched -march=amdgcn -verify-machineinstrs %s -o - 2>&1| FileCheck -check-prefix=SI-NOHSA -check-prefix=FUNC -check-prefix=DEBUG %s
0 ; RUN: llc -debug-only=machine-scheduler -march=amdgcn -verify-machineinstrs %s -o - 2>&1| FileCheck -check-prefix=SI-NOHSA -check-prefix=FUNC -check-prefix=DEBUG %s
11 ; REQUIRES: asserts
22
33 ; Verify that the extload generated from %eval has the default
1919 %eval = sext i16 %val to i32
2020 store i32 %eval, i32* %out
2121 ret void
22 }
22 }
None # RUN: llc -march=amdgcn -misched=converge -run-pass machine-scheduler %s -o - -debug-only=misched 2>&1 | FileCheck %s
0 # RUN: llc -march=amdgcn -misched=converge -run-pass machine-scheduler %s -o - -debug-only=machine-scheduler 2>&1 | FileCheck %s
11 # REQUIRES: asserts
22
33 # Check there is no SReg_32 pressure created by DS_* instructions because of M0 use
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=R52_SCHED
2 ; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=generic -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
1 ; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=R52_SCHED
2 ; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=generic -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
33 ;
44 ; Check the latency for instructions for both generic and cortex-r52.
55 ; Cortex-r52 machine model will cause the div to be sceduled before eor
0 ; REQUIRES: asserts
1 ; RUN: llc -mtriple=thumb-eabi -mcpu=swift -pre-RA-sched=source -join-globalcopies -enable-misched -verify-misched -debug-only=misched -arm-atomic-cfg-tidy=0 %s -o - 2>&1 | FileCheck %s
1 ; RUN: llc -mtriple=thumb-eabi -mcpu=swift -pre-RA-sched=source -join-globalcopies -enable-misched -verify-misched -debug-only=machine-scheduler -arm-atomic-cfg-tidy=0 %s -o - 2>&1 | FileCheck %s
22 ;
33 ; Loop counter copies should be eliminated.
44 ; There is also a MUL here, but we don't care where it is scheduled.
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a9 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > \
1 ; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a9 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > \
22 ; RUN: /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_A9
3 ; RUN: llc < %s -mtriple=arm-eabi -mcpu=swift -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > \
3 ; RUN: llc < %s -mtriple=arm-eabi -mcpu=swift -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > \
44 ; RUN: /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_SWIFT
5 ; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-r52 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > \
5 ; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-r52 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > \
66 ; RUN: /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_R52
77 ;
88 ; Check the latency of instructions for processors with sched-models
0 # Basic machine sched model test for Thumb2 int instructions
11 # RUN: llc -o /dev/null %s -mtriple=thumbv7-eabi -mcpu=swift -run-pass machine-scheduler -enable-misched -verify-misched \
2 # RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_SWIFT
2 # RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_SWIFT
33 # RUN: llc -o /dev/null %s -mtriple=thumbv7--eabi -mcpu=cortex-a9 -run-pass machine-scheduler -enable-misched -verify-misched \
4 # RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_A9
4 # RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_A9
55 # RUN: llc -o /dev/null %s -mtriple=thumbv8r-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -verify-misched \
6 # RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_R52
6 # RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_R52
77 # REQUIRES: asserts
88 --- |
99 ; ModuleID = 'foo.ll'
0 # RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=swift -run-pass machine-scheduler -enable-misched -verify-misched \
1 # RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_SWIFT
1 # RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_SWIFT
22 # RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-a9 -run-pass machine-scheduler -enable-misched -verify-misched \
3 # RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_A9
3 # RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_A9
44 # RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -verify-misched \
5 # RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_R52
5 # RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_R52
66 # REQUIRES: asserts
77 --- |
88 ; ModuleID = 'foo.ll'
None # RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -debug-only=misched -misched-topdown 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=TOPDOWN
1 # RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -debug-only=misched -misched-bottomup 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=BOTTOMUP
0 # RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -debug-only=machine-scheduler -misched-topdown 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=TOPDOWN
1 # RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -debug-only=machine-scheduler -misched-bottomup 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=BOTTOMUP
22 # REQUIRES: asserts
33 --- |
44 ; ModuleID = 'foo.ll'
0 ; REQUIRES: asserts
1 ; RUN: llc %s -mtriple=lanai-unknown-unknown -debug-only=misched -o /dev/null 2>&1 | FileCheck %s
1 ; RUN: llc %s -mtriple=lanai-unknown-unknown -debug-only=machine-scheduler -o /dev/null 2>&1 | FileCheck %s
22
33 ; Make sure there are no control dependencies between memory operations that
44 ; are trivially disjoint.
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "9 machine-licm"
1 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "9 machinelicm"
22 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn | FileCheck %s
33 ; rdar://6627786
44 ; rdar://7792037
0 ; REQUIRES: asserts
1 ; RUN: llc -mcpu=haswell < %s -stats -O2 2>&1 | grep "4 machine-licm.*hoisted"
1 ; RUN: llc -mcpu=haswell < %s -stats -O2 2>&1 | grep "4 machinelicm.*hoisted"
22 ; For test:
33 ; 2 invariant loads, 1 for OBJC_SELECTOR_REFERENCES_
44 ; and 1 for objc_msgSend from the GOT
0 ; REQUIRES: asserts
1 ; RUN: llc < %s -verify-machineinstrs -march=x86 -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
1 ; RUN: llc < %s -verify-machineinstrs -march=x86 -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
22 ;
33 ; Test scheduling of copy instructions.
44 ;
0 ; REQUIRES: asserts
11 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -stats 2>&1 | \
2 ; RUN: grep "twoaddrinstr" | grep "Number of instructions aggressively commuted"
2 ; RUN: grep "twoaddressinstruction" | grep "Number of instructions aggressively commuted"
33 ; rdar://6480363
44
55 target triple = "i386-apple-darwin9.6"