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[asan] Hook ClInstrumentWrites and ClInstrumentReads to masked operation instrumentation. Reviewers: kcc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D27548 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289717 91177308-0d34-0410-b5e6-96231b3b80d8 Filipe Cabecinhas 3 years ago
2 changed file(s) with 28 addition(s) and 11 deletion(s). Raw diff Collapse all Expand all
10451045 F->getName().startswith("llvm.masked.store."))) {
10461046 unsigned OpOffset = 0;
10471047 if (F->getName().startswith("llvm.masked.store.")) {
1048 if (!ClInstrumentWrites)
1049 return nullptr;
10481050 // Masked store has an initial operand for the value.
10491051 OpOffset = 1;
10501052 *IsWrite = true;
10511053 } else {
1054 if (!ClInstrumentReads)
1055 return nullptr;
10521056 *IsWrite = false;
10531057 }
10541058 // Only instrument if the mask is constant for now.
None ; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -S | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=BOTH
0 ; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -S \
1 ; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=ALL
2 ; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-reads=0 -S \
3 ; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=STORE -check-prefix=ALL
4 ; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-writes=0 -S \
5 ; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=NOSTORE -check-prefix=ALL
6 ; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-reads=0 -asan-instrument-writes=0 -S \
7 ; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=NOSTORE -check-prefix=ALL
18 ; Support ASan instrumentation for constant-mask llvm.masked.{load,store}
29
310 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
1219 declare void @llvm.masked.store.v4p0i32.p0v4p0i32(<4 x i32*>, <4 x i32*>*, i32, <4 x i1>) argmemonly nounwind
1320
1421 define void @store.v4f32.1110(<4 x float> %arg) sanitize_address {
15 ; BOTH-LABEL: @store.v4f32.1110
22 ; ALL-LABEL: @store.v4f32.1110
1623 %p = load <4 x float>*, <4 x float>** @v4f32, align 8
24 ; NOSTORE-NOT: call void @__asan_store
1725 ; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0
1826 ; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64
1927 ; STORE: call void @__asan_store4(i64 [[PGEP0]])
2937 }
3038
3139 define void @store.v8i32.10010110(<8 x i32> %arg) sanitize_address {
32 ; BOTH-LABEL: @store.v8i32.10010110
40 ; ALL-LABEL: @store.v8i32.10010110
3341 %p = load <8 x i32>*, <8 x i32>** @v8i32, align 8
42 ; NOSTORE-NOT: call void @__asan_store
3443 ; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 0
3544 ; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP0]] to i64
3645 ; STORE: call void @__asan_store4(i64 [[PGEP0]])
4958 }
5059
5160 define void @store.v4i64.0001(<4 x i32*> %arg) sanitize_address {
52 ; BOTH-LABEL: @store.v4i64.0001
61 ; ALL-LABEL: @store.v4i64.0001
5362 %p = load <4 x i32*>*, <4 x i32*>** @v4i64, align 8
63 ; NOSTORE-NOT: call void @__asan_store
5464 ; STORE: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x i32*>, <4 x i32*>* %p, i64 0, i64 3
5565 ; STORE: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint i32** [[GEP3]] to i64
5666 ; STORE: call void @__asan_store8(i64 [[PGEP3]])
6070 }
6171
6272 define void @store.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address {
63 ; BOTH-LABEL: @store.v4f32.variable
73 ; ALL-LABEL: @store.v4f32.variable
6474 %p = load <4 x float>*, <4 x float>** @v4f32, align 8
65 ; BOTH-NOT: call void @__asan_store
75 ; ALL-NOT: call void @__asan_store
6676 tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> %mask)
6777 ret void
6878 }
7383 declare <4 x i32*> @llvm.masked.load.v4p0i32.p0v4p0i32(<4 x i32*>*, i32, <4 x i1>, <4 x i32*>) argmemonly nounwind
7484
7585 define <8 x i32> @load.v8i32.11100001(<8 x i32> %arg) sanitize_address {
76 ; BOTH-LABEL: @load.v8i32.11100001
86 ; ALL-LABEL: @load.v8i32.11100001
7787 %p = load <8 x i32>*, <8 x i32>** @v8i32, align 8
88 ; NOLOAD-NOT: call void @__asan_load
7889 ; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 0
7990 ; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP0]] to i64
8091 ; LOAD: call void @__asan_load4(i64 [[PGEP0]])
93104 }
94105
95106 define <4 x float> @load.v4f32.1001(<4 x float> %arg) sanitize_address {
96 ; BOTH-LABEL: @load.v4f32.1001
107 ; ALL-LABEL: @load.v4f32.1001
97108 %p = load <4 x float>*, <4 x float>** @v4f32, align 8
109 ; NOLOAD-NOT: call void @__asan_load
98110 ; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0
99111 ; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64
100112 ; LOAD: call void @__asan_load4(i64 [[PGEP0]])
107119 }
108120
109121 define <4 x i32*> @load.v4i64.0001(<4 x i32*> %arg) sanitize_address {
110 ; BOTH-LABEL: @load.v4i64.0001
122 ; ALL-LABEL: @load.v4i64.0001
111123 %p = load <4 x i32*>*, <4 x i32*>** @v4i64, align 8
124 ; NOLOAD-NOT: call void @__asan_load
112125 ; LOAD: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x i32*>, <4 x i32*>* %p, i64 0, i64 3
113126 ; LOAD: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint i32** [[GEP3]] to i64
114127 ; LOAD: call void @__asan_load8(i64 [[PGEP3]])
118131 }
119132
120133 define <4 x float> @load.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address {
121 ; BOTH-LABEL: @load.v4f32.variable
134 ; ALL-LABEL: @load.v4f32.variable
122135 %p = load <4 x float>*, <4 x float>** @v4f32, align 8
123 ; BOTH-NOT: call void @__asan_load
136 ; ALL-NOT: call void @__asan_load
124137 %res = tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> %mask, <4 x float> %arg)
125138 ret <4 x float> %res
126139 }