llvm.org GIT mirror llvm / 9434811
[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314559 91177308-0d34-0410-b5e6-96231b3b80d8 Eugene Zelenko 2 years ago
14 changed file(s) with 291 addition(s) and 188 deletion(s). Raw diff Collapse all Expand all
55 // License. See LICENSE.TXT for details.
66 //
77 //===----------------------------------------------------------------------===//
8 //
89 /// \file
910 /// This file provides a helper that implements much of the TTI interface in
1011 /// terms of the target-independent code generator and TargetLowering
1112 /// interfaces.
12 ///
13 //
1314 //===----------------------------------------------------------------------===//
1415
1516 #ifndef LLVM_CODEGEN_BASICTTIIMPL_H
1617 #define LLVM_CODEGEN_BASICTTIIMPL_H
1718
19 #include "llvm/ADT/APInt.h"
20 #include "llvm/ADT/ArrayRef.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/SmallPtrSet.h"
23 #include "llvm/ADT/SmallVector.h"
1824 #include "llvm/Analysis/LoopInfo.h"
19 #include "llvm/Analysis/TargetLibraryInfo.h"
25 #include "llvm/Analysis/TargetTransformInfo.h"
2026 #include "llvm/Analysis/TargetTransformInfoImpl.h"
27 #include "llvm/CodeGen/ISDOpcodes.h"
28 #include "llvm/CodeGen/MachineValueType.h"
29 #include "llvm/CodeGen/ValueTypes.h"
30 #include "llvm/IR/BasicBlock.h"
31 #include "llvm/IR/CallSite.h"
32 #include "llvm/IR/Constant.h"
33 #include "llvm/IR/Constants.h"
34 #include "llvm/IR/DataLayout.h"
35 #include "llvm/IR/DerivedTypes.h"
36 #include "llvm/IR/InstrTypes.h"
37 #include "llvm/IR/Instruction.h"
38 #include "llvm/IR/Instructions.h"
39 #include "llvm/IR/Intrinsics.h"
40 #include "llvm/IR/Operator.h"
41 #include "llvm/IR/Type.h"
42 #include "llvm/IR/Value.h"
43 #include "llvm/MC/MCSchedule.h"
44 #include "llvm/Support/Casting.h"
2145 #include "llvm/Support/CommandLine.h"
46 #include "llvm/Support/ErrorHandling.h"
47 #include "llvm/Support/MathExtras.h"
2248 #include "llvm/Target/TargetLowering.h"
2349 #include "llvm/Target/TargetSubtargetInfo.h"
50 #include
51 #include
52 #include
53 #include
54 #include
2455
2556 namespace llvm {
57
58 class Function;
59 class GlobalValue;
60 class LLVMContext;
61 class ScalarEvolution;
62 class SCEV;
63 class TargetMachine;
2664
2765 extern cl::opt PartialUnrollingThreshold;
2866
3876 template
3977 class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase {
4078 private:
41 typedef TargetTransformInfoImplCRTPBase BaseT;
42 typedef TargetTransformInfo TTI;
79 using BaseT = TargetTransformInfoImplCRTPBase;
80 using TTI = TargetTransformInfo;
4381
4482 /// Estimate a cost of shuffle as a sequence of extract and insert
4583 /// operations.
234272 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
235273 return N;
236274 uint64_t Range =
237 (MaxCaseVal - MinCaseVal).getLimitedValue(UINT64_MAX - 1) + 1;
275 (MaxCaseVal - MinCaseVal)
276 .getLimitedValue(std::numeric_limits::max() - 1) + 1;
238277 // Check whether a range of clusters is dense enough for a jump table
239278 if (TLI->isSuitableForJumpTable(&SI, N, Range)) {
240279 JumpTableSize = Range;
271310 const TargetLoweringBase *TLI = getTLI();
272311 switch (Opcode) {
273312 default: break;
274 case Instruction::Trunc: {
313 case Instruction::Trunc:
275314 if (TLI->isTruncateFree(OpTy, Ty))
276315 return TargetTransformInfo::TCC_Free;
277316 return TargetTransformInfo::TCC_Basic;
278 }
279 case Instruction::ZExt: {
317 case Instruction::ZExt:
280318 if (TLI->isZExtFree(OpTy, Ty))
281319 return TargetTransformInfo::TCC_Free;
282320 return TargetTransformInfo::TCC_Basic;
283 }
284321 }
285322
286323 return BaseT::getOperationCost(Opcode, Ty, OpTy);
400437 if (A->getType()->isVectorTy()) {
401438 VecTy = A->getType();
402439 // If A is a vector operand, VF should be 1 or correspond to A.
403 assert ((VF == 1 || VF == VecTy->getVectorNumElements()) &&
404 "Vector argument does not match VF");
440 assert((VF == 1 || VF == VecTy->getVectorNumElements()) &&
441 "Vector argument does not match VF");
405442 }
406443 else
407444 VecTy = VectorType::get(A->getType(), VF);
414451 }
415452
416453 unsigned getScalarizationOverhead(Type *VecTy, ArrayRef Args) {
417 assert (VecTy->isVectorTy());
454 assert(VecTy->isVectorTy());
418455
419456 unsigned Cost = 0;
420457
537574
538575 // Handle scalar conversions.
539576 if (!Src->isVectorTy() && !Dst->isVectorTy()) {
540
541577 // Scalar bitcasts are usually free.
542578 if (Opcode == Instruction::BitCast)
543579 return 0;
553589
554590 // Check vector-to-vector casts.
555591 if (Dst->isVectorTy() && Src->isVectorTy()) {
556
557592 // If the cast is between same-sized registers, then the check is simple.
558593 if (SrcLT.first == DstLT.first &&
559594 SrcLT.second.getSizeInBits() == DstLT.second.getSizeInBits()) {
749784 // We only scale the cost of loads since interleaved store groups aren't
750785 // allowed to have gaps.
751786 if (Opcode == Instruction::Load && VecTySize > VecTyLTSize) {
752
753787 // The number of loads of a legal type it will take to represent a load
754788 // of the unlegalized vector type.
755789 unsigned NumLegalInsts = ceil(VecTySize, VecTyLTSize);
827861 ArrayRef Args, FastMathFlags FMF,
828862 unsigned VF = 1) {
829863 unsigned RetVF = (RetTy->isVectorTy() ? RetTy->getVectorNumElements() : 1);
830 assert ((RetVF == 1 || VF == 1) && "VF > 1 and RetVF is a vector type");
864 assert((RetVF == 1 || VF == 1) && "VF > 1 and RetVF is a vector type");
831865
832866 switch (IID) {
833867 default: {
835869 SmallVector Types;
836870 for (Value *Op : Args) {
837871 Type *OpTy = Op->getType();
838 assert (VF == 1 || !OpTy->isVectorTy());
872 assert(VF == 1 || !OpTy->isVectorTy());
839873 Types.push_back(VF == 1 ? OpTy : VectorType::get(OpTy, VF));
840874 }
841875
845879 // Compute the scalarization overhead based on Args for a vector
846880 // intrinsic. A vectorizer will pass a scalar RetTy and VF > 1, while
847881 // CostModel will pass a vector RetTy and VF is 1.
848 unsigned ScalarizationCost = UINT_MAX;
882 unsigned ScalarizationCost = std::numeric_limits::max();
849883 if (RetVF > 1 || VF > 1) {
850884 ScalarizationCost = 0;
851885 if (!RetTy->isVoidTy())
857891 getIntrinsicInstrCost(IID, RetTy, Types, FMF, ScalarizationCost);
858892 }
859893 case Intrinsic::masked_scatter: {
860 assert (VF == 1 && "Can't vectorize types here.");
894 assert(VF == 1 && "Can't vectorize types here.");
861895 Value *Mask = Args[3];
862896 bool VarMask = !isa(Mask);
863897 unsigned Alignment = cast(Args[2])->getZExtValue();
868902 Alignment);
869903 }
870904 case Intrinsic::masked_gather: {
871 assert (VF == 1 && "Can't vectorize types here.");
905 assert(VF == 1 && "Can't vectorize types here.");
872906 Value *Mask = Args[2];
873907 bool VarMask = !isa(Mask);
874908 unsigned Alignment = cast(Args[1])->getZExtValue();
881915 }
882916
883917 /// Get intrinsic cost based on argument types.
884 /// If ScalarizationCostPassed is UINT_MAX, the cost of scalarizing the
885 /// arguments and the return value will be computed based on types.
886 unsigned getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy,
887 ArrayRef Tys, FastMathFlags FMF,
888 unsigned ScalarizationCostPassed = UINT_MAX) {
918 /// If ScalarizationCostPassed is std::numeric_limits::max(), the
919 /// cost of scalarizing the arguments and the return value will be computed
920 /// based on types.
921 unsigned getIntrinsicInstrCost(
922 Intrinsic::ID IID, Type *RetTy, ArrayRef Tys, FastMathFlags FMF,
923 unsigned ScalarizationCostPassed = std::numeric_limits::max()) {
889924 SmallVector ISDs;
890925 unsigned SingleCallCost = 10; // Library call cost. Make it expensive.
891926 switch (IID) {
895930 unsigned ScalarCalls = 1;
896931 Type *ScalarRetTy = RetTy;
897932 if (RetTy->isVectorTy()) {
898 if (ScalarizationCostPassed == UINT_MAX)
933 if (ScalarizationCostPassed == std::numeric_limits::max())
899934 ScalarizationCost = getScalarizationOverhead(RetTy, true, false);
900935 ScalarCalls = std::max(ScalarCalls, RetTy->getVectorNumElements());
901936 ScalarRetTy = RetTy->getScalarType();
904939 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
905940 Type *Ty = Tys[i];
906941 if (Ty->isVectorTy()) {
907 if (ScalarizationCostPassed == UINT_MAX)
942 if (ScalarizationCostPassed == std::numeric_limits::max())
908943 ScalarizationCost += getScalarizationOverhead(Ty, false, true);
909944 ScalarCalls = std::max(ScalarCalls, Ty->getVectorNumElements());
910945 Ty = Ty->getScalarType();
10531088 // this will emit a costly libcall, adding call overhead and spills. Make it
10541089 // very expensive.
10551090 if (RetTy->isVectorTy()) {
1056 unsigned ScalarizationCost = ((ScalarizationCostPassed != UINT_MAX) ?
1057 ScalarizationCostPassed : getScalarizationOverhead(RetTy, true, false));
1091 unsigned ScalarizationCost =
1092 ((ScalarizationCostPassed != std::numeric_limits::max())
1093 ? ScalarizationCostPassed
1094 : getScalarizationOverhead(RetTy, true, false));
10581095 unsigned ScalarCalls = RetTy->getVectorNumElements();
10591096 SmallVector ScalarTys;
10601097 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
10671104 IID, RetTy->getScalarType(), ScalarTys, FMF);
10681105 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
10691106 if (Tys[i]->isVectorTy()) {
1070 if (ScalarizationCostPassed == UINT_MAX)
1107 if (ScalarizationCostPassed == std::numeric_limits::max())
10711108 ScalarizationCost += getScalarizationOverhead(Tys[i], false, true);
10721109 ScalarCalls = std::max(ScalarCalls, Tys[i]->getVectorNumElements());
10731110 }
12441281 /// \brief Concrete BasicTTIImpl that can be used if no further customization
12451282 /// is needed.
12461283 class BasicTTIImpl : public BasicTTIImplBase {
1247 typedef BasicTTIImplBase BaseT;
1284 using BaseT = BasicTTIImplBase;
1285
12481286 friend class BasicTTIImplBase;
12491287
12501288 const TargetSubtargetInfo *ST;
12571295 explicit BasicTTIImpl(const TargetMachine *ST, const Function &F);
12581296 };
12591297
1260 }
1261
1262 #endif
1298 } // end namespace llvm
1299
1300 #endif // LLVM_CODEGEN_BASICTTIIMPL_H
None //===---------------- lib/CodeGen/CalcSpillWeights.h ------------*- C++ -*-===//
0 //===- lib/CodeGen/CalcSpillWeights.h ---------------------------*- C++ -*-===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
55 // License. See LICENSE.TXT for details.
66 //
77 //===----------------------------------------------------------------------===//
8
98
109 #ifndef LLVM_CODEGEN_CALCSPILLWEIGHTS_H
1110 #define LLVM_CODEGEN_CALCSPILLWEIGHTS_H
1514
1615 namespace llvm {
1716
18 class LiveInterval;
19 class LiveIntervals;
20 class MachineBlockFrequencyInfo;
21 class MachineLoopInfo;
22 class VirtRegMap;
17 class LiveInterval;
18 class LiveIntervals;
19 class MachineBlockFrequencyInfo;
20 class MachineFunction;
21 class MachineLoopInfo;
22 class VirtRegMap;
2323
2424 /// \brief Normalize the spill weight of a live interval
2525 ///
3131 /// per function call. Derived from block frequencies.
3232 /// @param Size Size of live interval as returnexd by getSize()
3333 /// @param NumInstr Number of instructions using this live interval
34 ///
3534 static inline float normalizeSpillWeight(float UseDefFreq, unsigned Size,
3635 unsigned NumInstr) {
3736 // The constant 25 instructions is added to avoid depending too much on
4645 /// spill weight and allocation hint.
4746 class VirtRegAuxInfo {
4847 public:
49 typedef float (*NormalizingFn)(float, unsigned, unsigned);
48 using NormalizingFn = float (*)(float, unsigned, unsigned);
5049
5150 private:
5251 MachineFunction &MF;
7675 const MachineBlockFrequencyInfo &MBFI,
7776 VirtRegAuxInfo::NormalizingFn norm =
7877 normalizeSpillWeight);
79 }
78
79 } // end namespace llvm
8080
8181 #endif // LLVM_CODEGEN_CALCSPILLWEIGHTS_H
None //===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
0 //===- llvm/CallingConvLower.h - Calling Conventions ------------*- C++ -*-===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
2222 #include "llvm/Target/TargetCallingConv.h"
2323
2424 namespace llvm {
25
2526 class CCState;
2627 class MVT;
2728 class TargetMachine;
502503 }
503504
504505 // Get list of pending assignments
505 SmallVectorImpl<llvm::CCValAssign> &getPendingLocs() {
506 SmallVectorImpl<CCValAssign> &getPendingLocs() {
506507 return PendingLocs;
507508 }
508509
563564 void MarkAllocated(unsigned Reg);
564565 };
565566
566
567
568567 } // end namespace llvm
569568
570 #endif
569 #endif // LLVM_CODEGEN_CALLINGCONVLOWER_H
225225 /// Provides the logic to select generic machine instructions.
226226 class InstructionSelector {
227227 public:
228 typedef bool(*ImmediatePredicateFn)(int64_t);
228 using ImmediatePredicateFn = bool (*)(int64_t);
229229
230230 virtual ~InstructionSelector() = default;
231231
239239 /// if returns true:
240240 /// for I in all mutated/inserted instructions:
241241 /// !isPreISelGenericOpcode(I.getOpcode())
242 ///
243242 virtual bool select(MachineInstr &I) const = 0;
244243
245244 protected:
None //===----- AggressiveAntiDepBreaker.cpp - Anti-dep breaker ----------------===//
0 //===- AggressiveAntiDepBreaker.cpp - Anti-dep breaker --------------------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1414 //===----------------------------------------------------------------------===//
1515
1616 #include "AggressiveAntiDepBreaker.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/BitVector.h"
19 #include "llvm/ADT/SmallSet.h"
20 #include "llvm/ADT/iterator_range.h"
1721 #include "llvm/CodeGen/MachineBasicBlock.h"
1822 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
1924 #include "llvm/CodeGen/MachineInstr.h"
25 #include "llvm/CodeGen/MachineOperand.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/CodeGen/MachineValueType.h"
2028 #include "llvm/CodeGen/RegisterClassInfo.h"
29 #include "llvm/CodeGen/ScheduleDAG.h"
30 #include "llvm/MC/MCInstrDesc.h"
31 #include "llvm/MC/MCRegisterInfo.h"
2132 #include "llvm/Support/CommandLine.h"
2233 #include "llvm/Support/Debug.h"
23 #include "llvm/Support/ErrorHandling.h"
2434 #include "llvm/Support/raw_ostream.h"
2535 #include "llvm/Target/TargetInstrInfo.h"
2636 #include "llvm/Target/TargetRegisterInfo.h"
37 #include "llvm/Target/TargetSubtargetInfo.h"
38 #include
39 #include
40 #include
41 #include
42 #include
43
2744 using namespace llvm;
2845
2946 #define DEBUG_TYPE "post-RA-sched"
3350 DebugDiv("agg-antidep-debugdiv",
3451 cl::desc("Debug control for aggressive anti-dep breaker"),
3552 cl::init(0), cl::Hidden);
53
3654 static cl::opt
3755 DebugMod("agg-antidep-debugmod",
3856 cl::desc("Debug control for aggressive anti-dep breaker"),
3957 cl::init(0), cl::Hidden);
4058
4159 AggressiveAntiDepState::AggressiveAntiDepState(const unsigned TargetRegs,
42 MachineBasicBlock *BB) :
43 NumTargetRegs(TargetRegs), GroupNodes(TargetRegs, 0),
44 GroupNodeIndices(TargetRegs, 0),
45 KillIndices(TargetRegs, 0),
46 DefIndices(TargetRegs, 0)
47 {
60 MachineBasicBlock *BB)
61 : NumTargetRegs(TargetRegs), GroupNodes(TargetRegs, 0),
62 GroupNodeIndices(TargetRegs, 0), KillIndices(TargetRegs, 0),
63 DefIndices(TargetRegs, 0) {
4864 const unsigned BBSize = BB->size();
4965 for (unsigned i = 0; i < NumTargetRegs; ++i) {
5066 // Initialize all registers to be in their own group. Initially we
7591 }
7692 }
7793
78 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2)
79 {
94 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) {
8095 assert(GroupNodes[0] == 0 && "GroupNode 0 not parent!");
8196 assert(GroupNodeIndices[0] == 0 && "Reg 0 not in Group 0!");
8297
91106 return Parent;
92107 }
93108
94 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg)
95 {
109 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) {
96110 // Create a new GroupNode for Reg. Reg's existing GroupNode must
97111 // stay as is because there could be other GroupNodes referring to
98112 // it.
102116 return idx;
103117 }
104118
105 bool AggressiveAntiDepState::IsLive(unsigned Reg)
106 {
119 bool AggressiveAntiDepState::IsLive(unsigned Reg) {
107120 // KillIndex must be defined and DefIndex not defined for a register
108121 // to be live.
109122 return((KillIndices[Reg] != ~0u) && (DefIndices[Reg] == ~0u));
114127 TargetSubtargetInfo::RegClassVector &CriticalPathRCs)
115128 : AntiDepBreaker(), MF(MFi), MRI(MF.getRegInfo()),
116129 TII(MF.getSubtarget().getInstrInfo()),
117 TRI(MF.getSubtarget().getRegisterInfo()), RegClassInfo(RCI),
118 State(nullptr) {
130 TRI(MF.getSubtarget().getRegisterInfo()), RegClassInfo(RCI) {
119131 /* Collect a bitset of all registers that are only broken if they
120132 are on the critical path. */
121133 for (unsigned i = 0, e = CriticalPathRCs.size(); i < e; ++i) {
249261
250262 /// AntiDepEdges - Return in Edges the anti- and output- dependencies
251263 /// in SU that we want to consider for breaking.
252 static void AntiDepEdges(const SUnit *SU, std::vector*>& Edges) {
264 static void AntiDepEdges(const SUnit *SU, std::vector *> &Edges) {
253265 SmallSet RegSet;
254266 for (SUnit::const_pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end();
255267 P != PE; ++P) {
543555 // break the anti-dependence.
544556 std::vector Regs;
545557 State->GetGroupRegs(AntiDepGroupIndex, Regs, &RegRefs);
546 assert(Regs.size() > 0 && "Empty register group!");
547 if (Regs.size() == 0)
558 assert(!Regs.empty() && "Empty register group!");
559 if (Regs.empty())
548560 return false;
549561
550562 // Find the "superest" register in the group. At the same time,
731743
732744 /// BreakAntiDependencies - Identifiy anti-dependencies within the
733745 /// ScheduleDAG and break them by renaming registers.
734 ///
735746 unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
736 const std::vector& SUnits,
747 const std::vector &SUnits,
737748 MachineBasicBlock::iterator Begin,
738749 MachineBasicBlock::iterator End,
739750 unsigned InsertPosIndex,
740751 DbgValueVector &DbgValues) {
741
742752 std::vector &KillIndices = State->GetKillIndices();
743753 std::vector &DefIndices = State->GetDefIndices();
744754 std::multimap&
None //=- llvm/CodeGen/AggressiveAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-=//
0 //==- llvm/CodeGen/AggressiveAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-==//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1818
1919 #include "AntiDepBreaker.h"
2020 #include "llvm/ADT/BitVector.h"
21 #include "llvm/ADT/SmallSet.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/ScheduleDAG.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
21 #include "llvm/Support/Compiler.h"
2822 #include "llvm/Target/TargetSubtargetInfo.h"
2923 #include
24 #include
25 #include
3026
3127 namespace llvm {
28
29 class MachineBasicBlock;
30 class MachineFunction;
31 class MachineInstr;
32 class MachineOperand;
33 class MachineRegisterInfo;
3234 class RegisterClassInfo;
35 class TargetInstrInfo;
36 class TargetRegisterClass;
37 class TargetRegisterInfo;
3338
3439 /// Contains all the state necessary for anti-dep breaking.
3540 class LLVM_LIBRARY_VISIBILITY AggressiveAntiDepState {
3641 public:
3742 /// Information about a register reference within a liverange
38 typedef struct {
43 struct RegisterReference {
3944 /// The registers operand
4045 MachineOperand *Operand;
46
4147 /// The register class
4248 const TargetRegisterClass *RC;
43 } RegisterReference;
49 };
4450
4551 private:
4652 /// Number of non-virtual target registers (i.e. TRI->getNumRegs()).
109115
110116 class LLVM_LIBRARY_VISIBILITY AggressiveAntiDepBreaker
111117 : public AntiDepBreaker {
112 MachineFunction& MF;
118 MachineFunction &MF;
113119 MachineRegisterInfo &MRI;
114120 const TargetInstrInfo *TII;
115121 const TargetRegisterInfo *TRI;
120126 BitVector CriticalPathSet;
121127
122128 /// The state used to identify and rename anti-dependence registers.
123 AggressiveAntiDepState *State;
129 AggressiveAntiDepState *State = nullptr;
124130
125131 public:
126 AggressiveAntiDepBreaker(MachineFunction& MFi,
132 AggressiveAntiDepBreaker(MachineFunction &MFi,
127133 const RegisterClassInfo &RCI,
128134 TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
129135 ~AggressiveAntiDepBreaker() override;
133139
134140 /// Identifiy anti-dependencies along the critical path
135141 /// of the ScheduleDAG and break them by renaming registers.
136 ///
137 unsigned BreakAntiDependencies(const std::vector& SUnits,
142 unsigned BreakAntiDependencies(const std::vector &SUnits,
138143 MachineBasicBlock::iterator Begin,
139144 MachineBasicBlock::iterator End,
140145 unsigned InsertPosIndex,
142147
143148 /// Update liveness information to account for the current
144149 /// instruction, which will not be scheduled.
145 ///
146150 void Observe(MachineInstr &MI, unsigned Count,
147151 unsigned InsertPosIndex) override;
148152
151155
152156 private:
153157 /// Keep track of a position in the allocation order for each regclass.
154 typedef std::map RenameOrderType;
158 using RenameOrderType = std::map;
155159
156160 /// Return true if MO represents a register
157161 /// that is both implicitly used and defined in MI
173177 RenameOrderType& RenameOrder,
174178 std::map &RenameMap);
175179 };
176 }
177180
178 #endif
181 } // end namespace llvm
182
183 #endif // LLVM_LIB_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H
None //=- llvm/CodeGen/AntiDepBreaker.h - Anti-Dependence Breaking -*- C++ -*-=//
0 //===- llvm/CodeGen/AntiDepBreaker.h - Anti-Dependence Breaking -*- C++ -*-===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1414 #ifndef LLVM_LIB_CODEGEN_ANTIDEPBREAKER_H
1515 #define LLVM_LIB_CODEGEN_ANTIDEPBREAKER_H
1616
17 #include "llvm/ADT/iterator_range.h"
1718 #include "llvm/CodeGen/MachineBasicBlock.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/MachineOperand.h"
2121 #include "llvm/CodeGen/ScheduleDAG.h"
22 #include "llvm/Target/TargetRegisterInfo.h"
22 #include "llvm/Support/Compiler.h"
23 #include
24 #include
2325 #include
2426
2527 namespace llvm {
2830 /// registers to break register anti-dependencies (WAR hazards).
2931 class LLVM_LIBRARY_VISIBILITY AntiDepBreaker {
3032 public:
31 typedef std::vector >
32 DbgValueVector;
33 using DbgValueVector =
34 std::vector>;
3335
3436 virtual ~AntiDepBreaker();
3537
3638 /// Initialize anti-dep breaking for a new basic block.
37 virtual void StartBlock(MachineBasicBlock *BB) =0;
39 virtual void StartBlock(MachineBasicBlock *BB) = 0;
3840
3941 /// Identifiy anti-dependencies within a basic-block region and break them by
4042 /// renaming registers. Return the number of anti-dependencies broken.
41 virtual unsigned BreakAntiDependencies(const std::vector& SUnits,
43 virtual unsigned BreakAntiDependencies(const std::vector &SUnits,
4244 MachineBasicBlock::iterator Begin,
4345 MachineBasicBlock::iterator End,
4446 unsigned InsertPosIndex,
5052 unsigned InsertPosIndex) = 0;
5153
5254 /// Finish anti-dep breaking for a basic block.
53 virtual void FinishBlock() =0;
55 virtual void FinishBlock() = 0;
5456
5557 /// Update DBG_VALUE if dependency breaker is updating
5658 /// other machine instruction to use NewReg.
8082 }
8183 };
8284
83 }
85 } // end namespace llvm
8486
85 #endif
87 #endif // LLVM_LIB_CODEGEN_ANTIDEPBREAKER_H
1414 ///
1515 //===----------------------------------------------------------------------===//
1616
17 #include "llvm/Analysis/LoopInfo.h"
18 #include "llvm/Analysis/TargetTransformInfo.h"
19 #include "llvm/Analysis/TargetTransformInfoImpl.h"
2017 #include "llvm/CodeGen/BasicTTIImpl.h"
21 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/IR/Function.h"
2219 #include "llvm/Support/CommandLine.h"
23 #include
20 #include "llvm/Target/TargetMachine.h"
21 #include "llvm/Target/TargetSubtargetInfo.h"
22
2423 using namespace llvm;
2524
2625 // This flag is used by the template base class for BasicTTIImpl, and here to
2726 // provide a definition.
2827 cl::opt
29 llvm::PartialUnrollingThreshold("partial-unrolling-threshold", cl::init(0),
30 cl::desc("Threshold for partial unrolling"),
31 cl::Hidden);
28 llvm::PartialUnrollingThreshold("partial-unrolling-threshold", cl::init(0),
29 cl::desc("Threshold for partial unrolling"),
30 cl::Hidden);
3231
3332 BasicTTIImpl::BasicTTIImpl(const TargetMachine *TM, const Function &F)
3433 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
None //===------------------------ CalcSpillWeights.cpp ------------------------===//
0 //===- CalcSpillWeights.cpp -----------------------------------------------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
77 //===----------------------------------------------------------------------===//
88
99 #include "llvm/CodeGen/CalcSpillWeights.h"
10 #include "llvm/ADT/SmallPtrSet.h"
11 #include "llvm/CodeGen/LiveInterval.h"
1012 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
11 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
1213 #include "llvm/CodeGen/MachineFunction.h"
14 #include "llvm/CodeGen/MachineInstr.h"
1315 #include "llvm/CodeGen/MachineLoopInfo.h"
16 #include "llvm/CodeGen/MachineOperand.h"
1417 #include "llvm/CodeGen/MachineRegisterInfo.h"
1518 #include "llvm/CodeGen/VirtRegMap.h"
1619 #include "llvm/Support/Debug.h"
1821 #include "llvm/Target/TargetInstrInfo.h"
1922 #include "llvm/Target/TargetRegisterInfo.h"
2023 #include "llvm/Target/TargetSubtargetInfo.h"
24 #include
25 #include
26
2127 using namespace llvm;
2228
2329 #define DEBUG_TYPE "calcspillweights"
None //===----- CriticalAntiDepBreaker.cpp - Anti-dep breaker -------- ---------===//
0 //===- CriticalAntiDepBreaker.cpp - Anti-dep breaker ----------------------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1313 //===----------------------------------------------------------------------===//
1414
1515 #include "CriticalAntiDepBreaker.h"
16 #include "llvm/ADT/ArrayRef.h"
17 #include "llvm/ADT/BitVector.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/SmallVector.h"
1620 #include "llvm/CodeGen/MachineBasicBlock.h"
1721 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineInstr.h"
24 #include "llvm/CodeGen/MachineOperand.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/RegisterClassInfo.h"
27 #include "llvm/CodeGen/ScheduleDAG.h"
28 #include "llvm/MC/MCInstrDesc.h"
29 #include "llvm/MC/MCRegisterInfo.h"
1830 #include "llvm/Support/Debug.h"
19 #include "llvm/Support/ErrorHandling.h"
2031 #include "llvm/Support/raw_ostream.h"
2132 #include "llvm/Target/TargetInstrInfo.h"
2233 #include "llvm/Target/TargetRegisterInfo.h"
2334 #include "llvm/Target/TargetSubtargetInfo.h"
35 #include
36 #include
37 #include
38 #include
2439
2540 using namespace llvm;
2641
3449 Classes(TRI->getNumRegs(), nullptr), KillIndices(TRI->getNumRegs(), 0),
3550 DefIndices(TRI->getNumRegs(), 0), KeepRegs(TRI->getNumRegs(), false) {}
3651
37 CriticalAntiDepBreaker::~CriticalAntiDepBreaker() {
38 }
52 CriticalAntiDepBreaker::~CriticalAntiDepBreaker() = default;
3953
4054 void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
4155 const unsigned BBSize = BB->size();
332346 bool
333347 CriticalAntiDepBreaker::isNewRegClobberedByRefs(RegRefIter RegRefBegin,
334348 RegRefIter RegRefEnd,
335 unsigned NewReg)
336 {
349 unsigned NewReg) {
337350 for (RegRefIter I = RegRefBegin; I != RegRefEnd; ++I ) {
338351 MachineOperand *RefOper = I->second;
339352
380393 unsigned AntiDepReg,
381394 unsigned LastNewReg,
382395 const TargetRegisterClass *RC,
383 SmallVectorImpl &Forbid)
384 {
396 SmallVectorImpl &Forbid) {
385397 ArrayRef Order = RegClassInfo.getOrder(RC);
386398 for (unsigned i = 0; i != Order.size(); ++i) {
387399 unsigned NewReg = Order[i];
422434 }
423435
424436 unsigned CriticalAntiDepBreaker::
425 BreakAntiDependencies(const std::vector& SUnits,
437 BreakAntiDependencies(const std::vector &SUnits,
426438 MachineBasicBlock::iterator Begin,
427439 MachineBasicBlock::iterator End,
428440 unsigned InsertPosIndex,
435447 // This is used for updating debug information.
436448 //
437449 // FIXME: Replace this with the existing map in ScheduleDAGInstrs::MISUnitMap
438 DenseMap*,const SUnit*> MISUnitMap;
450 DenseMap *, const SUnit *> MISUnitMap;
439451
440452 // Find the node at the bottom of the critical path.
441453 const SUnit *Max = nullptr;
None //=- llvm/CodeGen/CriticalAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-=//
0 //===- llvm/CodeGen/CriticalAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1717
1818 #include "AntiDepBreaker.h"
1919 #include "llvm/ADT/BitVector.h"
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/RegisterClassInfo.h"
23 #include "llvm/CodeGen/ScheduleDAG.h"
20 #include "llvm/Support/Compiler.h"
21 #include
22 #include
2423
2524 namespace llvm {
25
26 class MachineBasicBlock;
27 class MachineFunction;
28 class MachineInstr;
29 class MachineOperand;
30 class MachineRegisterInfo;
2631 class RegisterClassInfo;
2732 class TargetInstrInfo;
33 class TargetRegisterClass;
2834 class TargetRegisterInfo;
29 class MachineFunction;
3035
3136 class LLVM_LIBRARY_VISIBILITY CriticalAntiDepBreaker : public AntiDepBreaker {
3237 MachineFunction& MF;
4550 /// corresponding value is null. If the register is live but used in
4651 /// multiple register classes, the corresponding value is -1 casted to a
4752 /// pointer.
48 std::vector*> Classes;
53 std::vector *> Classes;
4954
5055 /// Map registers to all their references within a live range.
5156 std::multimap RegRefs;
52 typedef std::multimap::const_iterator
53 RegRefIter;
57
58 using RegRefIter =
59 std::multimap::const_iterator;
5460
5561 /// The index of the most recent kill (proceeding bottom-up),
5662 /// or ~0u if the register is not live.
6571 BitVector KeepRegs;
6672
6773 public:
68 CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo&);
74 CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo &RCI);
6975 ~CriticalAntiDepBreaker() override;
7076
7177 /// Initialize anti-dep breaking for a new basic block.
7379
7480 /// Identifiy anti-dependencies along the critical path
7581 /// of the ScheduleDAG and break them by renaming registers.
76 unsigned BreakAntiDependencies(const std::vector& SUnits,
82 unsigned BreakAntiDependencies(const std::vector &SUnits,
7783 MachineBasicBlock::iterator Begin,
7884 MachineBasicBlock::iterator End,
7985 unsigned InsertPosIndex,
100106 const TargetRegisterClass *RC,
101107 SmallVectorImpl &Forbid);
102108 };
103 }
104109
105 #endif
110 } // end namespace llvm
111
112 #endif // LLVM_LIB_CODEGEN_CRITICALANTIDEPBREAKER_H
55 // License. See LICENSE.TXT for details.
66 //
77 //===----------------------------------------------------------------------===//
8 //
89 /// \file
910 /// This file implements the InstructionSelector class.
11 //
1012 //===----------------------------------------------------------------------===//
1113
1214 #include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
1517 #include "llvm/CodeGen/MachineFunction.h"
1618 #include "llvm/CodeGen/MachineInstr.h"
1719 #include "llvm/CodeGen/MachineOperand.h"
18 #include "llvm/CodeGen/MachineInstrBuilder.h"
19 #include "llvm/CodeGen/MachineRegisterInfo.h"
2020 #include "llvm/MC/MCInstrDesc.h"
21 #include "llvm/IR/Constants.h"
22 #include "llvm/Target/TargetInstrInfo.h"
2321 #include "llvm/Support/Debug.h"
2422 #include "llvm/Support/raw_ostream.h"
2523 #include "llvm/Target/TargetRegisterInfo.h"
None //===-- StackColoring.cpp -------------------------------------------------===//
0 //===- StackColoring.cpp --------------------------------------------------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
2121 //===----------------------------------------------------------------------===//
2222
2323 #include "llvm/ADT/BitVector.h"
24 #include "llvm/ADT/DenseMap.h"
2425 #include "llvm/ADT/DepthFirstIterator.h"
25 #include "llvm/ADT/SetVector.h"
2626 #include "llvm/ADT/SmallPtrSet.h"
27 #include "llvm/ADT/SmallVector.h"
2728 #include "llvm/ADT/Statistic.h"
2829 #include "llvm/Analysis/ValueTracking.h"
2930 #include "llvm/CodeGen/LiveInterval.h"
3031 #include "llvm/CodeGen/MachineBasicBlock.h"
3132 #include "llvm/CodeGen/MachineFrameInfo.h"
33 #include "llvm/CodeGen/MachineFunction.h"
3234 #include "llvm/CodeGen/MachineFunctionPass.h"
33 #include "llvm/CodeGen/MachineLoopInfo.h"
35 #include "llvm/CodeGen/MachineInstr.h"
3436 #include "llvm/CodeGen/MachineMemOperand.h"
35 #include "llvm/CodeGen/MachineModuleInfo.h"
36 #include "llvm/CodeGen/MachineRegisterInfo.h"
37 #include "llvm/CodeGen/MachineOperand.h"
3738 #include "llvm/CodeGen/Passes.h"
38 #include "llvm/CodeGen/PseudoSourceValue.h"
3939 #include "llvm/CodeGen/SelectionDAGNodes.h"
4040 #include "llvm/CodeGen/SlotIndexes.h"
4141 #include "llvm/CodeGen/StackProtector.h"
4242 #include "llvm/CodeGen/WinEHFuncInfo.h"
43 #include "llvm/IR/DebugInfo.h"
43 #include "llvm/IR/Constants.h"
44 #include "llvm/IR/DebugInfoMetadata.h"
4445 #include "llvm/IR/Function.h"
4546 #include "llvm/IR/Instructions.h"
46 #include "llvm/IR/IntrinsicInst.h"
47 #include "llvm/IR/Module.h"
47 #include "llvm/IR/Metadata.h"
48 #include "llvm/IR/Use.h"
49 #include "llvm/IR/Value.h"
50 #include "llvm/Pass.h"
51 #include "llvm/Support/Casting.h"
4852 #include "llvm/Support/CommandLine.h"
53 #include "llvm/Support/Compiler.h"
4954 #include "llvm/Support/Debug.h"
5055 #include "llvm/Support/raw_ostream.h"
51 #include "llvm/Target/TargetInstrInfo.h"
52 #include "llvm/Target/TargetRegisterInfo.h"
56 #include "llvm/Target/TargetOpcodes.h"
57 #include
58 #include
59 #include
60 #include
61 #include
5362
5463 using namespace llvm;
5564
365374 //
366375
367376 namespace {
377
368378 /// StackColoring - A machine pass for merging disjoint stack allocations,
369379 /// marked by the LIFETIME_START and LIFETIME_END pseudo instructions.
370380 class StackColoring : public MachineFunctionPass {
377387 struct BlockLifetimeInfo {
378388 /// Which slots BEGINs in each basic block.
379389 BitVector Begin;
390
380391 /// Which slots ENDs in each basic block.
381392 BitVector End;
393
382394 /// Which slots are marked as LIVE_IN, coming into each basic block.
383395 BitVector LiveIn;
396
384397 /// Which slots are marked as LIVE_OUT, coming out of each basic block.
385398 BitVector LiveOut;
386399 };
387400
388401 /// Maps active slots (per bit) for each basic block.
389 typedef DenseMap LivenessMap;
402 using LivenessMap = DenseMap;
390403 LivenessMap BlockLiveness;
391404
392405 /// Maps serial numbers to basic blocks.
393 DenseMap*, int> BasicBlocks;
406 DenseMap *, int> BasicBlocks;
407
394408 /// Maps basic blocks to a serial number.
395 SmallVector*, 8> BasicBlockNumbering;
409 SmallVector *, 8> BasicBlockNumbering;
396410
397411 /// Maps slots to their use interval. Outside of this interval, slots
398412 /// values are either dead or `undef` and they will not be written to.
399413 SmallVector, 16> Intervals;
414
400415 /// Maps slots to the points where they can become in-use.
401416 SmallVector, 16> LiveStarts;
417
402418 /// VNInfo is used for the construction of LiveIntervals.
403419 VNInfo::Allocator VNInfoAllocator;
420
404421 /// SlotIndex analysis object.
405422 SlotIndexes *Indexes;
423
406424 /// The stack protector object.
407425 StackProtector *SP;
408426
423441
424442 public:
425443 static char ID;
444
426445 StackColoring() : MachineFunctionPass(ID) {
427446 initializeStackColoringPass(*PassRegistry::getPassRegistry());
428447 }
448
429449 void getAnalysisUsage(AnalysisUsage &AU) const override;
430450 bool runOnMachineFunction(MachineFunction &MF) override;
431451
432452 private:
453 /// Used in collectMarkers
454 using BlockBitVecMap = DenseMap;
455
433456 /// Debug.
434457 void dump() const;
435458 void dumpIntervals() const;
488511 /// Map entries which point to other entries to their destination.
489512 /// A->B->C becomes A->C.
490513 void expungeSlotMap(DenseMap &SlotRemap, unsigned NumSlots);
491
492 /// Used in collectMarkers
493 typedef DenseMap BlockBitVecMap;
494514 };
515
495516 } // end anonymous namespace
496517
497518 char StackColoring::ID = 0;
519
498520 char &llvm::StackColoringID = StackColoring::ID;
499521
500522 INITIALIZE_PASS_BEGIN(StackColoring, DEBUG_TYPE,
558580 return -1;
559581 }
560582
561 //
562583 // At the moment the only way to end a variable lifetime is with
563584 // a VARIABLE_LIFETIME op (which can't contain a start). If things
564585 // change and the IR allows for a single inst that both begins
565586 // and ends lifetime(s), this interface will need to be reworked.
566 //
567587 bool StackColoring::isLifetimeStartOrEnd(const MachineInstr &MI,
568588 SmallVector &slots,
569 bool &isStart)
570 {
589 bool &isStart) {
571590 if (MI.getOpcode() == TargetOpcode::LIFETIME_START ||
572591 MI.getOpcode() == TargetOpcode::LIFETIME_END) {
573592 int Slot = getStartOrEndSlot(MI);
607626 return false;
608627 }
609628
610 unsigned StackColoring::collectMarkers(unsigned NumSlot)
611 {
629 unsigned StackColoring::collectMarkers(unsigned NumSlot) {
612630 unsigned MarkersFound = 0;
613631 BlockBitVecMap SeenStartMap;
614632 InterestingSlots.clear();
623641 // Step 1: collect markers and populate the "InterestingSlots"
624642 // and "ConservativeSlots" sets.
625643 for (MachineBasicBlock *MBB : depth_first(MF)) {
626
627644 // Compute the set of slots for which we've seen a START marker but have
628645 // not yet seen an END marker at this point in the walk (e.g. on entry
629646 // to this bb).
696713 // NOTE: We use a depth-first iteration to ensure that we obtain a
697714 // deterministic numbering.
698715 for (MachineBasicBlock *MBB : depth_first(MF)) {
699
700716 // Assign a serial number to this basic block.
701717 BasicBlocks[MBB] = BasicBlockNumbering.size();
702718 BasicBlockNumbering.push_back(MBB);
744760 return MarkersFound;
745761 }
746762
747 void StackColoring::calculateLocalLiveness()
748 {
763 void StackColoring::calculateLocalLiveness() {
749764 unsigned NumIters = 0;
750765 bool changed = true;
751766 while (changed) {
753768 ++NumIters;
754769
755770 for (const MachineBasicBlock *BB : BasicBlockNumbering) {
756
757771 // Use an iterator to avoid repeated lookups.
758772 LivenessMap::iterator BI = BlockLiveness.find(BB);
759773 assert(BI != BlockLiveness.end() && "Block not found");
791805 BlockInfo.LiveOut |= LocalLiveOut;
792806 }
793807 }
794 }// while changed.
808 } // while changed.
795809
796810 NumIterations = NumIters;
797811 }
817831
818832 // Create the interval for the basic blocks containing lifetime begin/end.
819833 for (const MachineInstr &MI : MBB) {
820
821834 SmallVector slots;
822835 bool IsStart = false;
823836 if (!isLifetimeStartOrEnd(MI, slots, IsStart))
10461059 if (WinEHFuncInfo *EHInfo = MF->getWinEHFuncInfo())
10471060 for (WinEHTryBlockMapEntry &TBME : EHInfo->TryBlockMap)
10481061 for (WinEHHandlerType &H : TBME.HandlerArray)
1049 if (H.CatchObj.FrameIndex != INT_MAX &&
1062 if (H.CatchObj.FrameIndex != std::numeric_limits::max() &&
10501063 SlotRemap.count(H.CatchObj.FrameIndex))
10511064 H.CatchObj.FrameIndex = SlotRemap[H.CatchObj.FrameIndex];
10521065
12301243 LiveInterval *Second = &*Intervals[SecondSlot];
12311244 auto &FirstS = LiveStarts[FirstSlot];
12321245 auto &SecondS = LiveStarts[SecondSlot];
1233 assert (!First->empty() && !Second->empty() && "Found an empty range");
1246 assert(!First->empty() && !Second->empty() && "Found an empty range");
12341247
12351248 // Merge disjoint slots. This is a little bit tricky - see the
12361249 // Implementation Notes section for an explanation.
None //===-- TwoAddressInstructionPass.cpp - Two-Address instruction pass ------===//
0 //===- TwoAddressInstructionPass.cpp - Two-Address instruction pass -------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
2727 //===----------------------------------------------------------------------===//
2828
2929 #include "llvm/ADT/DenseMap.h"
30 #include "llvm/ADT/STLExtras.h"
30 #include "llvm/ADT/SmallPtrSet.h"
31 #include "llvm/ADT/SmallSet.h"
3132 #include "llvm/ADT/SmallVector.h"
3233 #include "llvm/ADT/Statistic.h"
34 #include "llvm/ADT/iterator_range.h"
3335 #include "llvm/Analysis/AliasAnalysis.h"
36 #include "llvm/CodeGen/LiveInterval.h"
3437 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
3538 #include "llvm/CodeGen/LiveVariables.h"
39 #include "llvm/CodeGen/MachineBasicBlock.h"
40 #include "llvm/CodeGen/MachineFunction.h"
3641 #include "llvm/CodeGen/MachineFunctionPass.h"
3742 #include "llvm/CodeGen/MachineInstr.h"
3843 #include "llvm/CodeGen/MachineInstrBuilder.h"
44 #include "llvm/CodeGen/MachineOperand.h"
3945 #include "llvm/CodeGen/MachineRegisterInfo.h"
4046 #include "llvm/CodeGen/Passes.h"
41 #include "llvm/IR/Function.h"
47 #include "llvm/CodeGen/SlotIndexes.h"
48 #include "llvm/MC/MCInstrDesc.h"
4249 #include "llvm/MC/MCInstrItineraries.h"
50 #include "llvm/Pass.h"
51 #include "llvm/Support/CodeGen.h"
4352 #include "llvm/Support/CommandLine.h"
4453 #include "llvm/Support/Debug.h"
4554 #include "llvm/Support/ErrorHandling.h"
4655 #include "llvm/Support/raw_ostream.h"
4756 #include "llvm/Target/TargetInstrInfo.h"
4857 #include "llvm/Target/TargetMachine.h"
58 #include "llvm/Target/TargetOpcodes.h"
4959 #include "llvm/Target/TargetRegisterInfo.h"
5060 #include "llvm/Target/TargetSubtargetInfo.h"
61 #include
62 #include
63 #include
5164
5265 using namespace llvm;
5366
7588 "the benefit of commuting operands"));
7689
7790 namespace {
91
7892 class TwoAddressInstructionPass : public MachineFunctionPass {
7993 MachineFunction *MF;
8094 const TargetInstrInfo *TII;
147161
148162 void processCopy(MachineInstr *MI);
149163
150 typedef SmallVector, 4> TiedPairList;
151 typedef SmallDenseMap TiedOperandMap;
164 using TiedPairList = SmallVector, 4>;
165 using TiedOperandMap = SmallDenseMap;
166
152167 bool collectTiedOperands(MachineInstr *MI, TiedOperandMap&);
153168 void processTiedPairs(MachineInstr *MI, TiedPairList&, unsigned &Dist);
154169 void eliminateRegSequence(MachineBasicBlock::iterator&);
155170
156171 public:
157172 static char ID; // Pass identification, replacement for typeid
173
158174 TwoAddressInstructionPass() : MachineFunctionPass(ID) {
159175 initializeTwoAddressInstructionPassPass(*PassRegistry::getPassRegistry());
160176 }
174190 /// Pass entry point.
175191 bool runOnMachineFunction(MachineFunction&) override;
176192 };
193
177194 } // end anonymous namespace
178195
179196 char TwoAddressInstructionPass::ID = 0;
197
198 char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID;
199
180200 INITIALIZE_PASS_BEGIN(TwoAddressInstructionPass, DEBUG_TYPE,
181201 "Two-Address instruction pass", false, false)
182202 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
183203 INITIALIZE_PASS_END(TwoAddressInstructionPass, DEBUG_TYPE,
184204 "Two-Address instruction pass", false, false)
185
186 char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID;
187205
188206 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS);
189207
266284 ++KillPos;
267285
268286 unsigned NumVisited = 0;
269 for (MachineInstr &OtherMI : llvm::make_range(std::next(OldPos), KillPos)) {
287 for (MachineInstr &OtherMI : make_range(std::next(OldPos), KillPos)) {
270288 // DBG_VALUE cannot be counted against the limit.
271289 if (OtherMI.isDebugValue())
272290 continue;
451469 LiveIntervals *LIS,
452470 bool allowFalsePositives) {
453471 MachineInstr *DefMI = &MI;
454 for (;;) {
472 while (true) {
455473 // All uses of physical registers are likely to be kills.
456474 if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
457475 (allowFalsePositives || MRI->hasOneUse(Reg)))
903921 // Move the copies connected to MI down as well.
904922 MachineBasicBlock::iterator Begin = MI;
905923 MachineBasicBlock::iterator AfterMI = std::next(Begin);
906
907924 MachineBasicBlock::iterator End = AfterMI;
908925 while (End->isCopy() &&
909926 regOverlapsSet(Defs, End->getOperand(1).getReg(), TRI)) {
915932 unsigned NumVisited = 0;
916933 MachineBasicBlock::iterator KillPos = KillMI;
917934 ++KillPos;
918 for (MachineInstr &OtherMI : llvm::make_range(End, KillPos)) {
935 for (MachineInstr &OtherMI : make_range(End, KillPos)) {
919936 // DBG_VALUE cannot be counted against the limit.
920937 if (OtherMI.isDebugValue())
921938 continue;
10891106 // Check if the reschedule will not break depedencies.
10901107 unsigned NumVisited = 0;
10911108 for (MachineInstr &OtherMI :
1092 llvm::make_range(mi, MachineBasicBlock::iterator(KillMI))) {
1109 make_range(mi, MachineBasicBlock::iterator(KillMI))) {
10931110 // DBG_VALUE cannot be counted against the limit.
10941111 if (OtherMI.isDebugValue())
10951112 continue;
16081625 if (I->end == UseIdx)
16091626 LI.removeSegment(LastCopyIdx, UseIdx);
16101627 }
1611
16121628 } else if (RemovedKillFlag) {
16131629 // Some tied uses of regB matched their destination registers, so
16141630 // regB is still used in this instruction, but a kill flag was
16891705 // transformations that may either eliminate the tied operands or
16901706 // improve the opportunities for coalescing away the register copy.
16911707 if (TiedOperands.size() == 1) {
1692 SmallVectorImpl > &TiedPairs
1708 SmallVectorImpl> &TiedPairs
16931709 = TiedOperands.begin()->second;
16941710 if (TiedPairs.size() == 1) {
16951711 unsigned SrcIdx = TiedPairs[0].first;
17501766 ///
17511767 /// %dst:ssub0 = COPY %v1
17521768 /// %dst:ssub1 = COPY %v2
1753 ///
17541769 void TwoAddressInstructionPass::
17551770 eliminateRegSequence(MachineBasicBlock::iterator &MBBI) {
17561771 MachineInstr &MI = *MBBI;