llvm.org GIT mirror llvm / 93f90ed
[AArch64] Convert a conditional check that will always be true to an assert. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244479 91177308-0d34-0410-b5e6-96231b3b80d8 Chad Rosier 4 years ago
1 changed file(s) with 4 addition(s) and 6 deletion(s). Raw diff Collapse all Expand all
597597 }
598598
599599 if (CanMergeOpc && getLdStOffsetOp(MI).isImm()) {
600 assert(MI->mayLoadOrStore() && "Expected memory operation.");
600601 // If we've found another instruction with the same opcode, check to see
601602 // if the base and offset are compatible with our starting instruction.
602603 // These instructions all have scaled immediate operands, so we just
622623 bool MIIsUnscaled = isUnscaledLdSt(MI);
623624 if (!inBoundsForPair(MIIsUnscaled, MinOffset, OffsetStride)) {
624625 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI);
625 if (MI->mayLoadOrStore())
626 MemInsns.push_back(MI);
626 MemInsns.push_back(MI);
627627 continue;
628628 }
629629 // If the alignment requirements of the paired (scaled) instruction
632632 if (IsUnscaled && EnableAArch64UnscaledMemOp &&
633633 (alignTo(MinOffset, OffsetStride) != MinOffset)) {
634634 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI);
635 if (MI->mayLoadOrStore())
636 MemInsns.push_back(MI);
635 MemInsns.push_back(MI);
637636 continue;
638637 }
639638 // If the destination register of the loads is the same register, bail
641640 // registers the same is UNPREDICTABLE and will result in an exception.
642641 if (MayLoad && Reg == getLdStRegOp(MI).getReg()) {
643642 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI);
644 if (MI->mayLoadOrStore())
645 MemInsns.push_back(MI);
643 MemInsns.push_back(MI);
646644 continue;
647645 }
648646