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Debug Info: Implement DwarfUnit::addRegisterOffset using DwarfExpression. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225707 91177308-0d34-0410-b5e6-96231b3b80d8 Adrian Prantl 5 years ago
5 changed file(s) with 60 addition(s) and 16 deletion(s). Raw diff Collapse all Expand all
4141 void EmitOp(uint8_t Op, const char* Comment) override;
4242 void EmitSigned(int Value) override;
4343 void EmitUnsigned(unsigned Value) override;
44 unsigned getFrameRegister() override {
45 llvm_unreachable("not available");
46 };
4447 };
4548
4649 void DebugLocDwarfExpression::EmitOp(uint8_t Op, const char* Comment) {
6262 EmitOp(dwarf::DW_OP_constu);
6363 EmitUnsigned(ShiftBy);
6464 EmitOp(dwarf::DW_OP_shr);
65 }
66
67 bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
68 const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
69 int DwarfReg = TRI->getDwarfRegNum(MachineReg, false);
70 if (DwarfReg < 0)
71 return false;
72
73 if (MachineReg == getFrameRegister()) {
74 // If variable offset is based in frame register then use fbreg.
75 EmitOp(dwarf::DW_OP_fbreg);
76 EmitSigned(Offset);
77 } else {
78 AddRegIndirect(DwarfReg, Offset);
79 }
80 return true;
6581 }
6682
6783 void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
2323 /// independently of whether they are emitted into a DIE or into a .debug_loc
2424 /// entry.
2525 class DwarfExpression {
26 protected:
2627 TargetMachine &TM;
2728 public:
2829 DwarfExpression(TargetMachine &TM) : TM(TM) {}
3031 virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
3132 virtual void EmitSigned(int Value) = 0;
3233 virtual void EmitUnsigned(unsigned Value) = 0;
34
35 virtual unsigned getFrameRegister() = 0;
36
3337 /// Emit a dwarf register operation.
3438 void AddReg(int DwarfReg, const char* Comment = nullptr);
3539 /// Emit an (double-)indirect dwarf register operation.
4145 void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
4246 /// Emit a shift-right dwarf expression.
4347 void AddShr(unsigned ShiftBy);
48
49 /// Emit an indirect dwarf register operation for the given machine register.
50 /// Returns false if no DWARF register exists for MachineReg.
51 bool AddMachineRegIndirect(unsigned MachineReg, int Offset);
4452
4553 /// \brief Emit a partial DWARF register operation.
4654 /// \param MLoc the register
1515 #include "DwarfAccelTable.h"
1616 #include "DwarfCompileUnit.h"
1717 #include "DwarfDebug.h"
18 #include "DwarfExpression.h"
1819 #include "llvm/ADT/APFloat.h"
1920 #include "llvm/IR/Constants.h"
2021 #include "llvm/IR/DIBuilder.h"
4243 cl::desc("Generate DWARF4 type units."),
4344 cl::init(false));
4445
46 /// DwarfExpression implementation for DwarfUnit.
47 class DIEDwarfExpression : public DwarfExpression {
48 DwarfUnit &DU;
49 DIELoc &DIE;
50 public:
51 DIEDwarfExpression(TargetMachine &TM, DwarfUnit &DU, DIELoc &DIE)
52 : DwarfExpression(TM), DU(DU), DIE(DIE) {}
53
54 void EmitOp(uint8_t Op, const char* Comment = nullptr) override;
55 void EmitSigned(int Value) override;
56 void EmitUnsigned(unsigned Value) override;
57 unsigned getFrameRegister() override;
58 };
59
60 void DIEDwarfExpression::EmitOp(uint8_t Op, const char* Comment) {
61 DU.addUInt(DIE, dwarf::DW_FORM_data1, Op);
62 }
63 void DIEDwarfExpression::EmitSigned(int Value) {
64 DU.addSInt(DIE, dwarf::DW_FORM_sdata, Value);
65 }
66 void DIEDwarfExpression::EmitUnsigned(unsigned Value) {
67 DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
68 }
69 unsigned DIEDwarfExpression::getFrameRegister() {
70 const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
71 return TRI->getFrameRegister(*DU.getAsmPrinter()->MF);
72 }
73
74
4575 /// Unit - Unit constructor.
4676 DwarfUnit::DwarfUnit(unsigned UID, dwarf::Tag UnitTag, DICompileUnit Node,
4777 AsmPrinter *A, DwarfDebug *DW, DwarfFile *DWU)
462492 /// addRegisterOffset - Add register offset.
463493 bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
464494 int64_t Offset) {
465 const TargetRegisterInfo *TRI = Asm->TM.getSubtargetImpl()->getRegisterInfo();
466 int DWReg = TRI->getDwarfRegNum(Reg, false);
467 if (DWReg < 0)
468 return false;
469
470 if (Reg == TRI->getFrameRegister(*Asm->MF))
471 // If variable offset is based in frame register then use fbreg.
472 addUInt(TheDie, dwarf::DW_FORM_data1, dwarf::DW_OP_fbreg);
473 else if (DWReg < 32)
474 addUInt(TheDie, dwarf::DW_FORM_data1, dwarf::DW_OP_breg0 + DWReg);
475 else {
476 addUInt(TheDie, dwarf::DW_FORM_data1, dwarf::DW_OP_bregx);
477 addUInt(TheDie, dwarf::DW_FORM_udata, DWReg);
478 }
479 addSInt(TheDie, dwarf::DW_FORM_sdata, Offset);
480 return true;
495 DIEDwarfExpression Expr(Asm->TM, *this, TheDie);
496 return Expr.AddMachineRegIndirect(Reg, Offset);
481497 }
482498
483499 /* Byref variables, in Blocks, are declared by the programmer as "SomeType
137137 }
138138
139139 // Accessors.
140 AsmPrinter* getAsmPrinter() const { return Asm; }
140141 unsigned getUniqueID() const { return UniqueID; }
141142 uint16_t getLanguage() const { return CUNode.getLanguage(); }
142143 DICompileUnit getCUNode() const { return CUNode; }