llvm.org GIT mirror llvm / 93d6b17
[PowerPC][HTM]Fix $zero is not a GPRC register for builtin_ttest This was found during HTM cleanup. Adding a test for builtin_ttest would expose following issue. *** Bad machine code: Illegal physical register for instruction *** - function: test10 - basic block: %bb.0 entry (0xf0e57497b58) - instruction: %5:crrc0 = TABORTWCI 0, $zero, 0 - operand 2: $zero $zero is not a GPRC register. LLVM ERROR: Found 1 machine code errors. Differential Revision: https://reviews.llvm.org/D63079 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362974 91177308-0d34-0410-b5e6-96231b3b80d8 Jinsong Ji 4 months ago
2 changed file(s) with 4 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
165165 (TSR 0)>;
166166
167167 def : Pat<(i64 (int_ppc_ttest)),
168 (RLDICL (i64 (COPY (TABORTWCI 0, ZERO, 0))), 36, 28)>;
168 (RLDICL (i64 (COPY (TABORTWCI 0, (LI 0), 0))), 36, 28)>;
169169
170170 } // [HasHTM]
5656 %0 = tail call i32 @llvm.ppc.tendall()
5757 %1 = tail call i32 @llvm.ppc.tresume()
5858 %2 = tail call i32 @llvm.ppc.tsuspend()
59 %3 = tail call i64 @llvm.ppc.ttest()
5960 ret void
6061 ; CHECK-LABEL: @test4
6162 ; CHECK: tend. 1
6263 ; CHECK: tsr. 1
6364 ; CHECK: tsr. 0
65 ; CHECK: tabortwci. 0, {{[0-9]+}}, 0
6466 }
6567
6668 declare i32 @llvm.ppc.tendall()
6769 declare i32 @llvm.ppc.tresume()
6870 declare i32 @llvm.ppc.tsuspend()
71 declare i64 @llvm.ppc.ttest()
6972
7073
7174 define void @test5(i64 %v) {