llvm.org GIT mirror llvm / 9334b07
[x86] Fix disassembly of MOV16ao16 et al. The addition of IC_OPSIZE_ADSIZE in r198759 wasn't quite complete. It also turns out to have been unnecessary. The disassembler handles the AdSize prefix for itself, and doesn't care about the difference between (e.g.) MOV8ao8 and MOB8ao8_16 definitions. So just let them coexist and don't worry about it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199654 91177308-0d34-0410-b5e6-96231b3b80d8 David Woodhouse 6 years ago
4 changed file(s) with 96 addition(s) and 8 deletion(s). Raw diff Collapse all Expand all
9191 "operands change width") \
9292 ENUM_ENTRY(IC_ADSIZE, 3, "requires an ADSIZE prefix, so " \
9393 "operands change width") \
94 ENUM_ENTRY(IC_OPSIZE_ADSIZE, 3, "requires both OPSIZE and ADSIZE " \
95 "prefixes") \
9694 ENUM_ENTRY(IC_XD, 2, "may say something about the opcode " \
9795 "but not the operands") \
9896 ENUM_ENTRY(IC_XS, 2, "may say something about the opcode " \
0 # RUN: llvm-mc --hdis %s -triple=i686-linux-gnu-code16 | FileCheck --check-prefix=16 %s
1 # RUN: llvm-mc --hdis %s -triple=i686-linux-gnu | FileCheck --check-prefix=32 %s
2 # RUN: llvm-mc --hdis %s -triple=x86_64-linux-gnu | FileCheck --check-prefix=64 %s
3
4 # 16: movb 0x5a5a, %al
5 # 32: movb 0x5a5a5a5a, %al
6 # 64: movabsb 0x5a5a5a5a5a5a5a5a, %al
7 0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
8
9 # 16: movb 0x5a5a5a5a, %al
10 # 32: movb 0x5a5a, %al
11 # 64: movabsb 0x5a5a5a5a, %al
12 0x67 0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
13
14 # 16: movw 0x5a5a, %ax
15 # 32: movl 0x5a5a5a5a, %eax
16 # 64: movabsl 0x5a5a5a5a5a5a5a5a, %eax
17 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
18
19 # 16: movw 0x5a5a5a5a, %ax
20 # 32: movl 0x5a5a, %eax
21 # 64: movabsl 0x5a5a5a5a, %eax
22 0x67 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
23
24 # 16: movl 0x5a5a, %eax
25 # 32: movw 0x5a5a5a5a, %ax
26 # 64: movabsw 0x5a5a5a5a5a5a5a5a, %ax
27 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
28
29 # 16: movl 0x5a5a5a5a, %eax
30 # 32: movw 0x5a5a, %ax
31 # 64: movabsw 0x5a5a5a5a, %ax
32 0x66 0x67 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
33
34 # 16: movl 0x5a5a5a5a, %eax
35 # 32: movw 0x5a5a, %ax
36 # 64: movabsw 0x5a5a5a5a, %ax
37 0x67 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
38
39 # 16: movl %es:0x5a5a5a5a, %eax
40 # 32: movw %es:0x5a5a, %ax
41 # 64: movabsw %es:0x5a5a5a5a, %ax
42 0x67 0x26 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
43
44
45
46 # 16: movb %al, 0x5a5a
47 # 32: movb %al, 0x5a5a5a5a
48 # 64: movabsb %al, 0x5a5a5a5a5a5a5a5a
49 0xa2 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
50
51 # 16: movb %al, 0x5a5a5a5a
52 # 32: movb %al, 0x5a5a
53 # 64: movabsb %al, 0x5a5a5a5a
54 0x67 0xa2 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
55
56 # 16: movw %ax, 0x5a5a
57 # 32: movl %eax, 0x5a5a5a5a
58 # 64: movabsl %eax, 0x5a5a5a5a5a5a5a5a
59 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
60
61 # 16: movw %ax, %gs:0x5a5a5a5a
62 # 32: movl %eax, %gs:0x5a5a
63 # 64: movabsl %eax, %gs:0x5a5a5a5a
64 0x65 0x67 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
65
66 # 16: movl %eax, 0x5a5a
67 # 32: movw %ax, 0x5a5a5a5a
68 # 64: movabsw %ax, 0x5a5a5a5a5a5a5a5a
69 0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
70
71 # 16: movl %eax, 0x5a5a5a5a
72 # 32: movw %ax, 0x5a5a
73 # 64: movabsw %ax, 0x5a5a5a5a
74 0x66 0x67 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
75
76 # 16: movl %eax, 0x5a5a5a5a
77 # 32: movw %ax, 0x5a5a
78 # 64: movabsw %ax, 0x5a5a5a5a
79 0x67 0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
80
81 # 16: movl %eax, %es:0x5a5a5a5a
82 # 32: movw %ax, %es:0x5a5a
83 # 64: movabsw %ax, %es:0x5a5a5a5a
84 0x67 0x26 0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
85
9393 inheritsFrom(child, IC_64BIT_XD) ||
9494 inheritsFrom(child, IC_64BIT_XS));
9595 case IC_OPSIZE:
96 return (inheritsFrom(child, IC_64BIT_OPSIZE) ||
97 inheritsFrom(child, IC_OPSIZE_ADSIZE));
96 return inheritsFrom(child, IC_64BIT_OPSIZE);
9897 case IC_ADSIZE:
99 return inheritsFrom(child, IC_OPSIZE_ADSIZE);
100 case IC_OPSIZE_ADSIZE:
10198 case IC_64BIT_ADSIZE:
10299 return false;
103100 case IC_XD:
802799 if(newInfo.filtered)
803800 continue; // filtered instructions get lowest priority
804801
802 // Instructions such as MOV8ao8 and MOV8ao8_16 differ only in the
803 // presence of the AdSize prefix. However, the disassembler doesn't
804 // care about that difference in the instruction definition; it
805 // handles 16-bit vs. 32-bit addressing for itself based purely
806 // on the 0x67 prefix and the CPU mode. So there's no need to
807 // disambiguate between them; just let them conflict/coexist.
808 if (previousInfo.name + "_16" == newInfo.name)
809 continue;
810
805811 if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
806812 newInfo.name == "XCHG32ar" ||
807813 newInfo.name == "XCHG32ar64" ||
467467 else if (HasOpSizePrefix &&
468468 (Prefix == X86Local::XS || Prefix == X86Local::T8XS))
469469 insnContext = IC_XS_OPSIZE;
470 else if (HasOpSizePrefix && HasAdSizePrefix)
471 insnContext = IC_OPSIZE_ADSIZE;
472470 else if (HasOpSizePrefix || Prefix == X86Local::PD ||
473471 Prefix == X86Local::T8PD || Prefix == X86Local::TAPD)
474472 insnContext = IC_OPSIZE;