llvm.org GIT mirror llvm / 930193c
Add the MBBs before inserting the instructions. Doing it afterwards could lead to an infinite loop because of the def-use chains. Also use a frame load instead of store for the LD instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141263 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 8 years ago
1 changed file(s) with 10 addition(s) and 28 deletion(s). Raw diff Collapse all Expand all
56355635 MachineBasicBlock *DispContBB = MF->CreateMachineBasicBlock();
56365636 DispatchBB->addSuccessor(DispContBB);
56375637
5638 // Insert and renumber MBBs.
5639 MachineBasicBlock *Last = &MF->back();
5640 MF->insert(MF->end(), DispatchBB);
5641 MF->insert(MF->end(), DispContBB);
5642 MF->insert(MF->end(), TrapBB);
5643 MF->RenumberBlocks(Last);
5644
5645 FIMMO = MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
5646 MachineMemOperand::MOLoad, 4, 4);
5647
56385648 unsigned NewVReg1 = MRI->createVirtualRegister(TRC);
56395649 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1)
56405650 .addFrameIndex(FI)
56485658 .addImm(ARMCC::HI)
56495659 .addReg(ARM::CPSR);
56505660
5651 /*
5652
5653 BB#32: derived from LLVM BB %eh.sjlj.setjmp.catch
5654 Predecessors according to CFG: BB#0
5655 %vreg11 = t2LDRi12 , 4, pred:14, pred:%noreg; mem:Volatile LD4[%sunkaddr131] rGPR:%vreg11
5656 t2CMPri %vreg11, 6, pred:14, pred:%noreg, %CPSR; rGPR:%vreg11
5657 t2Bcc , pred:8, pred:%CPSR
5658 Successors according to CFG: BB#33 BB#35
5659
5660 BB#35: derived from LLVM BB %eh.sjlj.setjmp.catch
5661 Predecessors according to CFG: BB#32
5662 %vreg12 = t2LEApcrelJT , 0, pred:14, pred:%noreg; rGPR:%vreg12
5663 %vreg13 = t2ADDrs %vreg12, %vreg11, 18, pred:14, pred:%noreg, opt:%noreg; GPRnopc:%vreg13 rGPR:%vreg12,%vreg11
5664 t2BR_JT %vreg13, %vreg11, , 0; GPRnopc:%vreg13 rGPR:%vreg11
5665 Successors according to CFG: BB#3 BB#28 BB#26 BB#24 BB#22 BB#20 BB#31
5666
5667 */
5668
5669 FIMMO = MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
5670 MachineMemOperand::MOLoad, 4, 4);
5671
56725661 unsigned NewVReg2 = MRI->createVirtualRegister(TRC);
56735662 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT), NewVReg2)
56745663 .addJumpTableIndex(MJTI)
56925681 for (std::vector::iterator
56935682 I = LPadList.begin(), E = LPadList.end(); I != E; ++I)
56945683 DispContBB->addSuccessor(*I);
5695
5696 // Insert and renumber MBBs.
5697 MachineBasicBlock *Last = &MF->back();
5698 MF->insert(MF->end(), DispatchBB);
5699 MF->insert(MF->end(), DispContBB);
5700 MF->insert(MF->end(), TrapBB);
5701 MF->RenumberBlocks(Last);
57025684
57035685 // The instruction is gone now.
57045686 MI->eraseFromParent();