llvm.org GIT mirror llvm / 92c2ce5
[X86] Add some instruction aliases to get the assembly parser table to favor arithmetic instructions with 8-bit immediates over the forms that implicitly use the ax/eax/rax. This allows us to remove the explicit code for working around the existing priority git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250011 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 5 years ago
2 changed file(s) with 31 addition(s) and 63 deletion(s). Raw diff Collapse all Expand all
23602360 return false;
23612361 }
23622362
2363 static bool convertToSExti8(MCInst &Inst, unsigned Opcode, unsigned Reg,
2364 bool isCmp) {
2365 MCInst TmpInst;
2366 TmpInst.setOpcode(Opcode);
2367 if (!isCmp)
2368 TmpInst.addOperand(MCOperand::createReg(Reg));
2369 TmpInst.addOperand(MCOperand::createReg(Reg));
2370 TmpInst.addOperand(Inst.getOperand(0));
2371 Inst = TmpInst;
2372 return true;
2373 }
2374
2375 static bool convert16i16to16ri8(MCInst &Inst, unsigned Opcode,
2376 bool isCmp = false) {
2377 if (!Inst.getOperand(0).isImm() ||
2378 !isImmSExti16i8Value(Inst.getOperand(0).getImm()))
2379 return false;
2380
2381 return convertToSExti8(Inst, Opcode, X86::AX, isCmp);
2382 }
2383
2384 static bool convert32i32to32ri8(MCInst &Inst, unsigned Opcode,
2385 bool isCmp = false) {
2386 if (!Inst.getOperand(0).isImm() ||
2387 !isImmSExti32i8Value(Inst.getOperand(0).getImm()))
2388 return false;
2389
2390 return convertToSExti8(Inst, Opcode, X86::EAX, isCmp);
2391 }
2392
2393 static bool convert64i32to64ri8(MCInst &Inst, unsigned Opcode,
2394 bool isCmp = false) {
2395 if (!Inst.getOperand(0).isImm() ||
2396 !isImmSExti64i8Value(Inst.getOperand(0).getImm()))
2397 return false;
2398
2399 return convertToSExti8(Inst, Opcode, X86::RAX, isCmp);
2400 }
2401
24022363 bool X86AsmParser::processInstruction(MCInst &Inst, const OperandVector &Ops) {
24032364 switch (Inst.getOpcode()) {
24042365 default: return false;
2405 case X86::AND16i16: return convert16i16to16ri8(Inst, X86::AND16ri8);
2406 case X86::AND32i32: return convert32i32to32ri8(Inst, X86::AND32ri8);
2407 case X86::AND64i32: return convert64i32to64ri8(Inst, X86::AND64ri8);
2408 case X86::XOR16i16: return convert16i16to16ri8(Inst, X86::XOR16ri8);
2409 case X86::XOR32i32: return convert32i32to32ri8(Inst, X86::XOR32ri8);
2410 case X86::XOR64i32: return convert64i32to64ri8(Inst, X86::XOR64ri8);
2411 case X86::OR16i16: return convert16i16to16ri8(Inst, X86::OR16ri8);
2412 case X86::OR32i32: return convert32i32to32ri8(Inst, X86::OR32ri8);
2413 case X86::OR64i32: return convert64i32to64ri8(Inst, X86::OR64ri8);
2414 case X86::CMP16i16: return convert16i16to16ri8(Inst, X86::CMP16ri8, true);
2415 case X86::CMP32i32: return convert32i32to32ri8(Inst, X86::CMP32ri8, true);
2416 case X86::CMP64i32: return convert64i32to64ri8(Inst, X86::CMP64ri8, true);
2417 case X86::ADD16i16: return convert16i16to16ri8(Inst, X86::ADD16ri8);
2418 case X86::ADD32i32: return convert32i32to32ri8(Inst, X86::ADD32ri8);
2419 case X86::ADD64i32: return convert64i32to64ri8(Inst, X86::ADD64ri8);
2420 case X86::SUB16i16: return convert16i16to16ri8(Inst, X86::SUB16ri8);
2421 case X86::SUB32i32: return convert32i32to32ri8(Inst, X86::SUB32ri8);
2422 case X86::SUB64i32: return convert64i32to64ri8(Inst, X86::SUB64ri8);
2423 case X86::ADC16i16: return convert16i16to16ri8(Inst, X86::ADC16ri8);
2424 case X86::ADC32i32: return convert32i32to32ri8(Inst, X86::ADC32ri8);
2425 case X86::ADC64i32: return convert64i32to64ri8(Inst, X86::ADC64ri8);
2426 case X86::SBB16i16: return convert16i16to16ri8(Inst, X86::SBB16ri8);
2427 case X86::SBB32i32: return convert32i32to32ri8(Inst, X86::SBB32ri8);
2428 case X86::SBB64i32: return convert64i32to64ri8(Inst, X86::SBB64ri8);
24292366 case X86::VMOVAPDrr:
24302367 case X86::VMOVAPDYrr:
24312368 case X86::VMOVAPSrr:
29802980 def : InstAlias<"xchg{l}\t{%eax, $src|$src, eax}",
29812981 (XCHG32ar64 GR32_NOAX:$src), 0>, Requires<[In64BitMode]>;
29822982 def : InstAlias<"xchg{q}\t{%rax, $src|$src, rax}", (XCHG64ar GR64:$src), 0>;
2983
2984 // These aliases exist to get the parser to prioritize matching 8-bit
2985 // immediate encodings over matching the implicit ax/eax/rax encodings. By
2986 // explicitly mentioning the A register here, these entries will be ordered
2987 // first due to the more explicit immediate type.
2988 def : InstAlias<"adc{w}\t{$imm, %ax|ax, $imm}", (ADC16ri8 AX, i16i8imm:$imm), 0>;
2989 def : InstAlias<"add{w}\t{$imm, %ax|ax, $imm}", (ADD16ri8 AX, i16i8imm:$imm), 0>;
2990 def : InstAlias<"and{w}\t{$imm, %ax|ax, $imm}", (AND16ri8 AX, i16i8imm:$imm), 0>;
2991 def : InstAlias<"cmp{w}\t{$imm, %ax|ax, $imm}", (CMP16ri8 AX, i16i8imm:$imm), 0>;
2992 def : InstAlias<"or{w}\t{$imm, %ax|ax, $imm}", (OR16ri8 AX, i16i8imm:$imm), 0>;
2993 def : InstAlias<"sbb{w}\t{$imm, %ax|ax, $imm}", (SBB16ri8 AX, i16i8imm:$imm), 0>;
2994 def : InstAlias<"sub{w}\t{$imm, %ax|ax, $imm}", (SUB16ri8 AX, i16i8imm:$imm), 0>;
2995 def : InstAlias<"xor{w}\t{$imm, %ax|ax, $imm}", (XOR16ri8 AX, i16i8imm:$imm), 0>;
2996
2997 def : InstAlias<"adc{l}\t{$imm, %eax|eax, $imm}", (ADC32ri8 EAX, i32i8imm:$imm), 0>;
2998 def : InstAlias<"add{l}\t{$imm, %eax|eax, $imm}", (ADD32ri8 EAX, i32i8imm:$imm), 0>;
2999 def : InstAlias<"and{l}\t{$imm, %eax|eax, $imm}", (AND32ri8 EAX, i32i8imm:$imm), 0>;
3000 def : InstAlias<"cmp{l}\t{$imm, %eax|eax, $imm}", (CMP32ri8 EAX, i32i8imm:$imm), 0>;
3001 def : InstAlias<"or{l}\t{$imm, %eax|eax, $imm}", (OR32ri8 EAX, i32i8imm:$imm), 0>;
3002 def : InstAlias<"sbb{l}\t{$imm, %eax|eax, $imm}", (SBB32ri8 EAX, i32i8imm:$imm), 0>;
3003 def : InstAlias<"sub{l}\t{$imm, %eax|eax, $imm}", (SUB32ri8 EAX, i32i8imm:$imm), 0>;
3004 def : InstAlias<"xor{l}\t{$imm, %eax|eax, $imm}", (XOR32ri8 EAX, i32i8imm:$imm), 0>;
3005
3006 def : InstAlias<"adc{q}\t{$imm, %rax|rax, $imm}", (ADC64ri8 RAX, i64i8imm:$imm), 0>;
3007 def : InstAlias<"add{q}\t{$imm, %rax|rax, $imm}", (ADD64ri8 RAX, i64i8imm:$imm), 0>;
3008 def : InstAlias<"and{q}\t{$imm, %rax|rax, $imm}", (AND64ri8 RAX, i64i8imm:$imm), 0>;
3009 def : InstAlias<"cmp{q}\t{$imm, %rax|rax, $imm}", (CMP64ri8 RAX, i64i8imm:$imm), 0>;
3010 def : InstAlias<"or{q}\t{$imm, %rax|rax, $imm}", (OR64ri8 RAX, i64i8imm:$imm), 0>;
3011 def : InstAlias<"sbb{q}\t{$imm, %rax|rax, $imm}", (SBB64ri8 RAX, i64i8imm:$imm), 0>;
3012 def : InstAlias<"sub{q}\t{$imm, %rax|rax, $imm}", (SUB64ri8 RAX, i64i8imm:$imm), 0>;
3013 def : InstAlias<"xor{q}\t{$imm, %rax|rax, $imm}", (XOR64ri8 RAX, i64i8imm:$imm), 0>;