llvm.org GIT mirror llvm / 9251559
[mips][ias] Prevent double-filling of delay slots by generating '.set noreorder' regions. Summary: When clang is given -save-temps or -via-file-asm, any inline assembly in the source is parsed twice. Once by the compiler, and again by the assembler. We must take care to ensure that this doesn't lead to double-filling delay slots. Reviewers: sdardis, vkalintiris Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19166 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266608 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Sanders 4 years ago
2 changed file(s) with 18 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
19291929 }
19301930 }
19311931
1932 bool FillDelaySlot =
1933 MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder();
1934 if (FillDelaySlot)
1935 getTargetStreamer().emitDirectiveSetNoReorder();
1936
19321937 MacroExpanderResultTy ExpandResult =
19331938 tryExpandInstruction(Inst, IDLoc, Out, STI);
19341939 switch (ExpandResult) {
19431948
19441949 // If this instruction has a delay slot and .set reorder is active,
19451950 // emit a NOP after it.
1946 if (MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder())
1951 if (FillDelaySlot) {
19471952 createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Out, STI);
1953 getTargetStreamer().emitDirectiveSetReorder();
1954 }
19481955
19491956 if ((Inst.getOpcode() == Mips::JalOneReg ||
19501957 Inst.getOpcode() == Mips::JalTwoReg || ExpandedJalSym) &&
0 # RUN: llvm-mc -triple=mipsel-unknown-linux < %s | FileCheck %s
1 # RUN: llvm-mc -triple=mipsel-unknown-linux < %s | \
2 # RUN: llvm-mc -triple=mipsel-unknown-linux | FileCheck %s
3
4 # CHECK: bnez $2, foo
5 # CHECK: nop
6 # CHECK-NOT: nop
7
8 .text
9 bnez $2, foo