llvm.org GIT mirror llvm / 91d396d
[ARM] Convert more invalid NEON immediate loads Summary: Currently the LLVM MC assembler is able to convert e.g. vmov.i32 d0, #0xabababab (which is technically invalid) into a valid instruction vmov.i8 d0, #0xab this patch adds support for vmov.i64 and for cases with the resulting load types other than i8, e.g.: vmov.i32 d0, #0xab00ab00 -> vmov.i16 d0, #0xab00 Reviewers: olista01, rengolin Reviewed By: rengolin Subscribers: rengolin, javed.absar, kristof.beyls, rogfer01, llvm-commits Differential Revision: https://reviews.llvm.org/D44467 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327709 91177308-0d34-0410-b5e6-96231b3b80d8 Mikhail Maltsev 2 years ago
4 changed file(s) with 279 addition(s) and 144 deletion(s). Raw diff Collapse all Expand all
4747 let ParserMatchClass = nImmVMOVI32AsmOperand;
4848 }
4949
50 def nImmVMOVI16AsmOperandByteReplicate :
51 AsmOperandClass {
52 let Name = "NEONi16vmovByteReplicate";
53 let PredicateMethod = "isNEONi16ByteReplicate";
54 let RenderMethod = "addNEONvmovByteReplicateOperands";
55 }
56 def nImmVMOVI32AsmOperandByteReplicate :
57 AsmOperandClass {
58 let Name = "NEONi32vmovByteReplicate";
59 let PredicateMethod = "isNEONi32ByteReplicate";
60 let RenderMethod = "addNEONvmovByteReplicateOperands";
61 }
62 def nImmVMVNI16AsmOperandByteReplicate :
63 AsmOperandClass {
64 let Name = "NEONi16invByteReplicate";
65 let PredicateMethod = "isNEONi16ByteReplicate";
66 let RenderMethod = "addNEONinvByteReplicateOperands";
67 }
68 def nImmVMVNI32AsmOperandByteReplicate :
69 AsmOperandClass {
70 let Name = "NEONi32invByteReplicate";
71 let PredicateMethod = "isNEONi32ByteReplicate";
72 let RenderMethod = "addNEONinvByteReplicateOperands";
73 }
74
75 def nImmVMOVI16ByteReplicate : Operand {
50 class nImmVMOVIAsmOperandReplicate
51 : AsmOperandClass {
52 let Name = "NEONi" # To.Size # "vmovi" # From.Size # "Replicate";
53 let PredicateMethod = "isNEONmovReplicate<" # From.Size # ", " # To.Size # ">";
54 let RenderMethod = "addNEONvmovi" # From.Size # "ReplicateOperands";
55 }
56
57 class nImmVINVIAsmOperandReplicate
58 : AsmOperandClass {
59 let Name = "NEONi" # To.Size # "invi" # From.Size # "Replicate";
60 let PredicateMethod = "isNEONinvReplicate<" # From.Size # ", " # To.Size # ">";
61 let RenderMethod = "addNEONinvi" # From.Size # "ReplicateOperands";
62 }
63
64 class nImmVMOVIReplicate : Operand {
7665 let PrintMethod = "printNEONModImmOperand";
77 let ParserMatchClass = nImmVMOVI16AsmOperandByteReplicate;
78 }
79 def nImmVMOVI32ByteReplicate : Operand {
66 let ParserMatchClass = nImmVMOVIAsmOperandReplicate;
67 }
68
69 class nImmVINVIReplicate : Operand {
8070 let PrintMethod = "printNEONModImmOperand";
81 let ParserMatchClass = nImmVMOVI32AsmOperandByteReplicate;
82 }
83 def nImmVMVNI16ByteReplicate : Operand {
84 let PrintMethod = "printNEONModImmOperand";
85 let ParserMatchClass = nImmVMVNI16AsmOperandByteReplicate;
86 }
87 def nImmVMVNI32ByteReplicate : Operand {
88 let PrintMethod = "printNEONModImmOperand";
89 let ParserMatchClass = nImmVMVNI32AsmOperandByteReplicate;
71 let ParserMatchClass = nImmVINVIAsmOperandReplicate;
9072 }
9173
9274 def nImmVMOVI32NegAsmOperand : AsmOperandClass { let Name = "NEONi32vmovNeg"; }
59325914 } // isReMaterializable, isAsCheapAsAMove
59335915
59345916 // Add support for bytes replication feature, so it could be GAS compatible.
5935 // E.g. instructions below:
5936 // "vmov.i32 d0, 0xffffffff"
5937 // "vmov.i32 d0, 0xabababab"
5938 // "vmov.i16 d0, 0xabab"
5939 // are incorrect, but we could deal with such cases.
5940 // For last two instructions, for example, it should emit:
5941 // "vmov.i8 d0, 0xab"
5942 def : NEONInstAlias<"vmov${p}.i16 $Vd, $Vm",
5943 (VMOVv8i8 DPR:$Vd, nImmVMOVI16ByteReplicate:$Vm, pred:$p)>;
5944 def : NEONInstAlias<"vmov${p}.i32 $Vd, $Vm",
5945 (VMOVv8i8 DPR:$Vd, nImmVMOVI32ByteReplicate:$Vm, pred:$p)>;
5946 def : NEONInstAlias<"vmov${p}.i16 $Vd, $Vm",
5947 (VMOVv16i8 QPR:$Vd, nImmVMOVI16ByteReplicate:$Vm, pred:$p)>;
5948 def : NEONInstAlias<"vmov${p}.i32 $Vd, $Vm",
5949 (VMOVv16i8 QPR:$Vd, nImmVMOVI32ByteReplicate:$Vm, pred:$p)>;
5950
5951 // Also add same support for VMVN instructions. So instruction:
5952 // "vmvn.i32 d0, 0xabababab"
5953 // actually means:
5954 // "vmov.i8 d0, 0x54"
5955 def : NEONInstAlias<"vmvn${p}.i16 $Vd, $Vm",
5956 (VMOVv8i8 DPR:$Vd, nImmVMVNI16ByteReplicate:$Vm, pred:$p)>;
5957 def : NEONInstAlias<"vmvn${p}.i32 $Vd, $Vm",
5958 (VMOVv8i8 DPR:$Vd, nImmVMVNI32ByteReplicate:$Vm, pred:$p)>;
5959 def : NEONInstAlias<"vmvn${p}.i16 $Vd, $Vm",
5960 (VMOVv16i8 QPR:$Vd, nImmVMVNI16ByteReplicate:$Vm, pred:$p)>;
5961 def : NEONInstAlias<"vmvn${p}.i32 $Vd, $Vm",
5962 (VMOVv16i8 QPR:$Vd, nImmVMVNI32ByteReplicate:$Vm, pred:$p)>;
5917 multiclass NEONImmReplicateI8InstAlias {
5918 // E.g. instructions below:
5919 // "vmov.i32 d0, #0xffffffff"
5920 // "vmov.i32 d0, #0xabababab"
5921 // "vmov.i16 d0, #0xabab"
5922 // are incorrect, but we could deal with such cases.
5923 // For last two instructions, for example, it should emit:
5924 // "vmov.i8 d0, #0xab"
5925 def : NEONInstAlias<"vmov${p}.i" # To.Size # " $Vd, $Vm",
5926 (VMOVv8i8 DPR:$Vd, nImmVMOVIReplicate:$Vm, pred:$p)>;
5927 def : NEONInstAlias<"vmov${p}.i" # To.Size # " $Vd, $Vm",
5928 (VMOVv16i8 QPR:$Vd, nImmVMOVIReplicate:$Vm, pred:$p)>;
5929 // Also add same support for VMVN instructions. So instruction:
5930 // "vmvn.i32 d0, #0xabababab"
5931 // actually means:
5932 // "vmov.i8 d0, #0x54"
5933 def : NEONInstAlias<"vmvn${p}.i" # To.Size # " $Vd, $Vm",
5934 (VMOVv8i8 DPR:$Vd, nImmVINVIReplicate:$Vm, pred:$p)>;
5935 def : NEONInstAlias<"vmvn${p}.i" # To.Size # " $Vd, $Vm",
5936 (VMOVv16i8 QPR:$Vd, nImmVINVIReplicate:$Vm, pred:$p)>;
5937 }
5938
5939 defm : NEONImmReplicateI8InstAlias;
5940 defm : NEONImmReplicateI8InstAlias;
5941 defm : NEONImmReplicateI8InstAlias;
5942
5943 // Similar to above for types other than i8, e.g.:
5944 // "vmov.i32 d0, #0xab00ab00" -> "vmov.i16 d0, #0xab00"
5945 // "vmvn.i64 q0, #0xab000000ab000000" -> "vmvn.i32 q0, #0xab000000"
5946 // In this case we do not canonicalize VMVN to VMOV
5947 multiclass NEONImmReplicateInstAlias
5948 NeonI NV8, NeonI NV16, ValueType To> {
5949 def : NEONInstAlias<"vmov${p}.i" # To.Size # " $Vd, $Vm",
5950 (V8 DPR:$Vd, nImmVMOVIReplicate:$Vm, pred:$p)>;
5951 def : NEONInstAlias<"vmov${p}.i" # To.Size # " $Vd, $Vm",
5952 (V16 QPR:$Vd, nImmVMOVIReplicate:$Vm, pred:$p)>;
5953 def : NEONInstAlias<"vmvn${p}.i" # To.Size # " $Vd, $Vm",
5954 (NV8 DPR:$Vd, nImmVMOVIReplicate:$Vm, pred:$p)>;
5955 def : NEONInstAlias<"vmvn${p}.i" # To.Size # " $Vd, $Vm",
5956 (NV16 QPR:$Vd, nImmVMOVIReplicate:$Vm, pred:$p)>;
5957 }
5958
5959 defm : NEONImmReplicateInstAlias
5960 VMVNv4i16, VMVNv8i16, i32>;
5961 defm : NEONImmReplicateInstAlias
5962 VMVNv4i16, VMVNv8i16, i64>;
5963 defm : NEONImmReplicateInstAlias
5964 VMVNv2i32, VMVNv4i32, i64>;
5965 // TODO: add "VMOV <-> VMVN" conversion for cases like
5966 // "vmov.i32 d0, #0xffaaffaa" -> "vmvn.i16 d0, #0x55"
5967 // "vmvn.i32 d0, #0xaaffaaff" -> "vmov.i16 d0, #0xff00"
59635968
59645969 // On some CPUs the two instructions "vmov.i32 dD, #0" and "vmov.i32 qD, #0"
59655970 // require zero cycles to execute so they should be used wherever possible for
18561856 return ARM_AM::isNEONi32splat(~Value);
18571857 }
18581858
1859 bool isNEONByteReplicate(unsigned NumBytes) const {
1859 static bool isValidNEONi32vmovImm(int64_t Value) {
1860 // i32 value with set bits only in one byte X000, 0X00, 00X0, or 000X,
1861 // for VMOV/VMVN only, 00Xf or 0Xff are also accepted.
1862 return ((Value & 0xffffffffffffff00) == 0) ||
1863 ((Value & 0xffffffffffff00ff) == 0) ||
1864 ((Value & 0xffffffffff00ffff) == 0) ||
1865 ((Value & 0xffffffff00ffffff) == 0) ||
1866 ((Value & 0xffffffffffff00ff) == 0xff) ||
1867 ((Value & 0xffffffffff00ffff) == 0xffff);
1868 }
1869
1870 bool isNEONReplicate(unsigned Width, unsigned NumElems, bool Inv,
1871 bool AllowMinusOne) const {
1872 assert(Width == 8 || Width == 16 || Width == 32 && "Invalid element width");
1873 assert(NumElems * Width <= 64 && "Invalid result width");
1874
18601875 if (!isImm())
18611876 return false;
18621877 const MCConstantExpr *CE = dyn_cast(getImm());
18661881 int64_t Value = CE->getValue();
18671882 if (!Value)
18681883 return false; // Don't bother with zero.
1869
1870 unsigned char B = Value & 0xff;
1871 for (unsigned i = 1; i < NumBytes; ++i) {
1872 Value >>= 8;
1873 if ((Value & 0xff) != B)
1884 if (Inv)
1885 Value = ~Value;
1886
1887 uint64_t Mask = (1ull << Width) - 1;
1888 uint64_t Elem = Value & Mask;
1889 if (!AllowMinusOne && Elem == Mask)
1890 return false;
1891 if (Width == 16 && (Elem & 0x00ff) != 0 && (Elem & 0xff00) != 0)
1892 return false;
1893 if (Width == 32 && !isValidNEONi32vmovImm(Elem))
1894 return false;
1895
1896 for (unsigned i = 1; i < NumElems; ++i) {
1897 Value >>= Width;
1898 if ((Value & Mask) != Elem)
18741899 return false;
18751900 }
18761901 return true;
18771902 }
18781903
1879 bool isNEONi16ByteReplicate() const { return isNEONByteReplicate(2); }
1880 bool isNEONi32ByteReplicate() const { return isNEONByteReplicate(4); }
1881
1882 static bool isValidNEONi32vmovImm(int64_t Value) {
1883 // i32 value with set bits only in one byte X000, 0X00, 00X0, or 000X,
1884 // for VMOV/VMVN only, 00Xf or 0Xff are also accepted.
1885 return ((Value & 0xffffffffffffff00) == 0) ||
1886 ((Value & 0xffffffffffff00ff) == 0) ||
1887 ((Value & 0xffffffffff00ffff) == 0) ||
1888 ((Value & 0xffffffff00ffffff) == 0) ||
1889 ((Value & 0xffffffffffff00ff) == 0xff) ||
1890 ((Value & 0xffffffffff00ffff) == 0xffff);
1904 bool isNEONByteReplicate(unsigned NumBytes) const {
1905 return isNEONReplicate(8, NumBytes, false, true);
1906 }
1907
1908 static void checkNeonReplicateArgs(unsigned FromW, unsigned ToW) {
1909 assert(FromW == 8 || FromW == 16 || FromW == 32 && "Invalid source width");
1910 assert(ToW == 16 || ToW == 32 || ToW == 64 && "Invalid destination width");
1911 assert(FromW < ToW && "ToW is not less than FromW");
1912 }
1913
1914 template
1915 bool isNEONmovReplicate() const {
1916 checkNeonReplicateArgs(FromW, ToW);
1917 bool AllowMinusOne = ToW != 64;
1918 return isNEONReplicate(FromW, ToW / FromW, false, AllowMinusOne);
1919 }
1920
1921 template
1922 bool isNEONinvReplicate() const {
1923 checkNeonReplicateArgs(FromW, ToW);
1924 return isNEONReplicate(FromW, ToW / FromW, true, true);
18911925 }
18921926
18931927 bool isNEONi32vmov() const {
27252759 Inst.addOperand(MCOperand::createImm(Value));
27262760 }
27272761
2728 void addNEONinvByteReplicateOperands(MCInst &Inst, unsigned N) const {
2729 assert(N == 1 && "Invalid number of operands!");
2762 void addNEONi8ReplicateOperands(MCInst &Inst, bool Inv) const {
27302763 // The immediate encodes the type of constant as well as the value.
27312764 const MCConstantExpr *CE = dyn_cast(getImm());
2732 unsigned Value = CE->getValue();
27332765 assert((Inst.getOpcode() == ARM::VMOVv8i8 ||
27342766 Inst.getOpcode() == ARM::VMOVv16i8) &&
2735 "All vmvn instructions that wants to replicate non-zero byte "
2736 "always must be replaced with VMOVv8i8 or VMOVv16i8.");
2737 unsigned B = ((~Value) & 0xff);
2767 "All instructions that wants to replicate non-zero byte "
2768 "always must be replaced with VMOVv8i8 or VMOVv16i8.");
2769 unsigned Value = CE->getValue();
2770 if (Inv)
2771 Value = ~Value;
2772 unsigned B = Value & 0xff;
27382773 B |= 0xe00; // cmode = 0b1110
27392774 Inst.addOperand(MCOperand::createImm(B));
27402775 }
27412776
2742 void addNEONi32vmovOperands(MCInst &Inst, unsigned N) const {
2777 void addNEONinvi8ReplicateOperands(MCInst &Inst, unsigned N) const {
27432778 assert(N == 1 && "Invalid number of operands!");
2744 // The immediate encodes the type of constant as well as the value.
2745 const MCConstantExpr *CE = dyn_cast(getImm());
2746 unsigned Value = CE->getValue();
2779 addNEONi8ReplicateOperands(Inst, true);
2780 }
2781
2782 static unsigned encodeNeonVMOVImmediate(unsigned Value) {
27472783 if (Value >= 256 && Value <= 0xffff)
27482784 Value = (Value >> 8) | ((Value & 0xff) ? 0xc00 : 0x200);
27492785 else if (Value > 0xffff && Value <= 0xffffff)
27502786 Value = (Value >> 16) | ((Value & 0xff) ? 0xd00 : 0x400);
27512787 else if (Value > 0xffffff)
27522788 Value = (Value >> 24) | 0x600;
2753 Inst.addOperand(MCOperand::createImm(Value));
2754 }
2755
2756 void addNEONvmovByteReplicateOperands(MCInst &Inst, unsigned N) const {
2789 return Value;
2790 }
2791
2792 void addNEONi32vmovOperands(MCInst &Inst, unsigned N) const {
27572793 assert(N == 1 && "Invalid number of operands!");
27582794 // The immediate encodes the type of constant as well as the value.
27592795 const MCConstantExpr *CE = dyn_cast(getImm());
2760 unsigned Value = CE->getValue();
2761 assert((Inst.getOpcode() == ARM::VMOVv8i8 ||
2762 Inst.getOpcode() == ARM::VMOVv16i8) &&
2763 "All instructions that wants to replicate non-zero byte "
2764 "always must be replaced with VMOVv8i8 or VMOVv16i8.");
2765 unsigned B = Value & 0xff;
2766 B |= 0xe00; // cmode = 0b1110
2767 Inst.addOperand(MCOperand::createImm(B));
2796 unsigned Value = encodeNeonVMOVImmediate(CE->getValue());
2797 Inst.addOperand(MCOperand::createImm(Value));
2798 }
2799
2800 void addNEONvmovi8ReplicateOperands(MCInst &Inst, unsigned N) const {
2801 assert(N == 1 && "Invalid number of operands!");
2802 addNEONi8ReplicateOperands(Inst, false);
2803 }
2804
2805 void addNEONvmovi16ReplicateOperands(MCInst &Inst, unsigned N) const {
2806 assert(N == 1 && "Invalid number of operands!");
2807 const MCConstantExpr *CE = dyn_cast(getImm());
2808 assert((Inst.getOpcode() == ARM::VMOVv4i16 ||
2809 Inst.getOpcode() == ARM::VMOVv8i16 ||
2810 Inst.getOpcode() == ARM::VMVNv4i16 ||
2811 Inst.getOpcode() == ARM::VMVNv8i16) &&
2812 "All instructions that want to replicate non-zero half-word "
2813 "always must be replaced with V{MOV,MVN}v{4,8}i16.");
2814 uint64_t Value = CE->getValue();
2815 unsigned Elem = Value & 0xffff;
2816 if (Elem >= 256)
2817 Elem = (Elem >> 8) | 0x200;
2818 Inst.addOperand(MCOperand::createImm(Elem));
27682819 }
27692820
27702821 void addNEONi32vmovNegOperands(MCInst &Inst, unsigned N) const {
27712822 assert(N == 1 && "Invalid number of operands!");
27722823 // The immediate encodes the type of constant as well as the value.
27732824 const MCConstantExpr *CE = dyn_cast(getImm());
2774 unsigned Value = ~CE->getValue();
2775 if (Value >= 256 && Value <= 0xffff)
2776 Value = (Value >> 8) | ((Value & 0xff) ? 0xc00 : 0x200);
2777 else if (Value > 0xffff && Value <= 0xffffff)
2778 Value = (Value >> 16) | ((Value & 0xff) ? 0xd00 : 0x400);
2779 else if (Value > 0xffffff)
2780 Value = (Value >> 24) | 0x600;
2825 unsigned Value = encodeNeonVMOVImmediate(~CE->getValue());
27812826 Inst.addOperand(MCOperand::createImm(Value));
2827 }
2828
2829 void addNEONvmovi32ReplicateOperands(MCInst &Inst, unsigned N) const {
2830 assert(N == 1 && "Invalid number of operands!");
2831 const MCConstantExpr *CE = dyn_cast(getImm());
2832 assert((Inst.getOpcode() == ARM::VMOVv2i32 ||
2833 Inst.getOpcode() == ARM::VMOVv4i32 ||
2834 Inst.getOpcode() == ARM::VMVNv2i32 ||
2835 Inst.getOpcode() == ARM::VMVNv4i32) &&
2836 "All instructions that want to replicate non-zero word "
2837 "always must be replaced with V{MOV,MVN}v{2,4}i32.");
2838 uint64_t Value = CE->getValue();
2839 unsigned Elem = encodeNeonVMOVImmediate(Value & 0xffffffff);
2840 Inst.addOperand(MCOperand::createImm(Elem));
27822841 }
27832842
27842843 void addNEONi64splatOperands(MCInst &Inst, unsigned N) const {
+0
-31
test/MC/ARM/vmov-vmvn-byte-replicate.s less more
None @ PR18921, "vmov" part.
1 @ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s
2 .text
3
4 @ CHECK: vmov.i8 d2, #0xff @ encoding: [0x1f,0x2e,0x87,0xf3]
5 @ CHECK: vmov.i8 q2, #0xff @ encoding: [0x5f,0x4e,0x87,0xf3]
6 @ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
7 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
8 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
9 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
10
11 @ CHECK: vmov.i8 d2, #0x0 @ encoding: [0x10,0x2e,0x80,0xf2]
12 @ CHECK: vmov.i8 q2, #0x0 @ encoding: [0x50,0x4e,0x80,0xf2]
13 @ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
14 @ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
15 @ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
16 @ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
17
18 vmov.i32 d2, #0xffffffff
19 vmov.i32 q2, #0xffffffff
20 vmov.i32 d2, #0xabababab
21 vmov.i32 q2, #0xabababab
22 vmov.i16 q2, #0xabab
23 vmov.i16 q2, #0xabab
24
25 vmvn.i32 d2, #0xffffffff
26 vmvn.i32 q2, #0xffffffff
27 vmvn.i32 d2, #0xabababab
28 vmvn.i32 q2, #0xabababab
29 vmvn.i16 d2, #0xabab
30 vmvn.i16 q2, #0xabab
0 @ PR18921, "vmov" part.
1 @ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s
2 .text
3 vmov.i64 d2, #0xffffffffffffffff
4 vmov.i64 q2, #0xffffffffffffffff
5 vmov.i32 d2, #0xffffffff
6 vmov.i32 q2, #0xffffffff
7 vmov.i64 d2, #0xabababababababab
8 vmov.i64 q2, #0xabababababababab
9 vmov.i32 d2, #0xabababab
10 vmov.i32 q2, #0xabababab
11 vmov.i16 q2, #0xabab
12 vmov.i16 q2, #0xabab
13
14 @ CHECK: vmov.i64 d2, #0xffffffffffffffff @ encoding: [0x3f,0x2e,0x87,0xf3]
15 @ CHECK: vmov.i64 q2, #0xffffffffffffffff @ encoding: [0x7f,0x4e,0x87,0xf3]
16 @ CHECK: vmov.i8 d2, #0xff @ encoding: [0x1f,0x2e,0x87,0xf3]
17 @ CHECK: vmov.i8 q2, #0xff @ encoding: [0x5f,0x4e,0x87,0xf3]
18 @ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
19 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
20 @ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
21 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
22 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
23 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
24
25 vmov.i64 d2, #0x00a500a500a500a5
26 vmov.i64 q2, #0x00a500a500a500a5
27 vmov.i32 d2, #0x00a500a5
28 vmov.i32 q2, #0x00a500a5
29 vmov.i64 d2, #0xa500a500a500a500
30 vmov.i64 q2, #0xa500a500a500a500
31 vmov.i32 d2, #0xa500a500
32 vmov.i32 q2, #0xa500a500
33
34 @ CHECK: vmov.i16 d2, #0xa5 @ encoding: [0x15,0x28,0x82,0xf3]
35 @ CHECK: vmov.i16 q2, #0xa5 @ encoding: [0x55,0x48,0x82,0xf3]
36 @ CHECK: vmov.i16 d2, #0xa5 @ encoding: [0x15,0x28,0x82,0xf3]
37 @ CHECK: vmov.i16 q2, #0xa5 @ encoding: [0x55,0x48,0x82,0xf3]
38 @ CHECK: vmov.i16 d2, #0xa500 @ encoding: [0x15,0x2a,0x82,0xf3]
39 @ CHECK: vmov.i16 q2, #0xa500 @ encoding: [0x55,0x4a,0x82,0xf3]
40 @ CHECK: vmov.i16 d2, #0xa500 @ encoding: [0x15,0x2a,0x82,0xf3]
41 @ CHECK: vmov.i16 q2, #0xa500 @ encoding: [0x55,0x4a,0x82,0xf3]
42
43 vmov.i64 d2, #0x000000a5000000a5
44 vmov.i64 q2, #0x000000a5000000a5
45 vmov.i64 d2, #0x00a5ffff00a5ffff
46 vmov.i64 q2, #0x00a5ffff00a5ffff
47
48 @ CHECK: vmov.i32 d2, #0xa5 @ encoding: [0x15,0x20,0x82,0xf3]
49 @ CHECK: vmov.i32 q2, #0xa5 @ encoding: [0x55,0x40,0x82,0xf3]
50 @ CHECK: vmov.i32 d2, #0xa5ffff @ encoding: [0x15,0x2d,0x82,0xf3]
51 @ CHECK: vmov.i32 q2, #0xa5ffff @ encoding: [0x55,0x4d,0x82,0xf3]
52
53 vmvn.i64 d2, #0xffffffffffffffff
54 vmvn.i64 q2, #0xffffffffffffffff
55 vmvn.i32 d2, #0xffffffff
56 vmvn.i32 q2, #0xffffffff
57 vmvn.i64 d2, #0xabababababababab
58 vmvn.i64 q2, #0xabababababababab
59 vmvn.i32 d2, #0xabababab
60 vmvn.i32 q2, #0xabababab
61 vmvn.i16 d2, #0xabab
62 vmvn.i16 q2, #0xabab
63
64 @ CHECK: vmov.i8 d2, #0x0 @ encoding: [0x10,0x2e,0x80,0xf2]
65 @ CHECK: vmov.i8 q2, #0x0 @ encoding: [0x50,0x4e,0x80,0xf2]
66 @ CHECK: vmov.i8 d2, #0x0 @ encoding: [0x10,0x2e,0x80,0xf2]
67 @ CHECK: vmov.i8 q2, #0x0 @ encoding: [0x50,0x4e,0x80,0xf2]
68 @ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
69 @ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
70 @ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
71 @ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
72 @ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
73 @ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
74
75 vmvn.i64 d2, #0x00a500a500a500a5
76 vmvn.i64 q2, #0x00a500a500a500a5
77 vmvn.i32 d2, #0x00a500a5
78 vmvn.i32 q2, #0x00a500a5
79 vmvn.i64 d2, #0xa500a500a500a500
80 vmvn.i64 q2, #0xa500a500a500a500
81 vmvn.i32 d2, #0xa500a500
82 vmvn.i32 q2, #0xa500a500
83
84 @ CHECK: vmvn.i16 d2, #0xa5 @ encoding: [0x35,0x28,0x82,0xf3]
85 @ CHECK: vmvn.i16 q2, #0xa5 @ encoding: [0x75,0x48,0x82,0xf3]
86 @ CHECK: vmvn.i16 d2, #0xa5 @ encoding: [0x35,0x28,0x82,0xf3]
87 @ CHECK: vmvn.i16 q2, #0xa5 @ encoding: [0x75,0x48,0x82,0xf3]
88 @ CHECK: vmvn.i16 d2, #0xa500 @ encoding: [0x35,0x2a,0x82,0xf3]
89 @ CHECK: vmvn.i16 q2, #0xa500 @ encoding: [0x75,0x4a,0x82,0xf3]
90 @ CHECK: vmvn.i16 d2, #0xa500 @ encoding: [0x35,0x2a,0x82,0xf3]
91 @ CHECK: vmvn.i16 q2, #0xa500 @ encoding: [0x75,0x4a,0x82,0xf3]
92
93 vmvn.i64 d2, #0x000000a5000000a5
94 vmvn.i64 q2, #0x000000a5000000a5
95 vmvn.i64 d2, #0x00a5ffff00a5ffff
96 vmvn.i64 q2, #0x00a5ffff00a5ffff
97
98 @ CHECK: vmvn.i32 d2, #0xa5 @ encoding: [0x35,0x20,0x82,0xf3]
99 @ CHECK: vmvn.i32 q2, #0xa5 @ encoding: [0x75,0x40,0x82,0xf3]
100 @ CHECK: vmvn.i32 d2, #0xa5ffff @ encoding: [0x35,0x2d,0x82,0xf3]
101 @ CHECK: vmvn.i32 q2, #0xa5ffff @ encoding: [0x75,0x4d,0x82,0xf3]