llvm.org GIT mirror llvm / 910139f
Targets sometimes assign fixed stack object to spill certain callee-saved registers based on dynamic conditions. For example, X86 EBP/RBP, when used as frame register has to be spilled in the first fixed object. It should inform PEI this so it doesn't get allocated another stack object. Also, it should not be spilled as other callee-saved registers but rather its spilling and restoring are being handled by emitPrologue and emitEpilogue. Avoid spilling it twice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75116 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 11 years ago
8 changed file(s) with 53 addition(s) and 19 deletion(s). Raw diff Collapse all Expand all
566566 /// has variable sized allocas or if frame pointer elimination is disabled.
567567 virtual bool hasFP(const MachineFunction &MF) const = 0;
568568
569 // hasReservedCallFrame - Under normal circumstances, when a frame pointer is
570 // not required, we reserve argument space for call sites in the function
571 // immediately on entry to the current function. This eliminates the need for
572 // add/sub sp brackets around call sites. Returns true if the call frame is
573 // included as part of the stack frame.
569 /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
570 /// not required, we reserve argument space for call sites in the function
571 /// immediately on entry to the current function. This eliminates the need for
572 /// add/sub sp brackets around call sites. Returns true if the call frame is
573 /// included as part of the stack frame.
574574 virtual bool hasReservedCallFrame(MachineFunction &MF) const {
575575 return !hasFP(MF);
576576 }
577577
578 // needsStackRealignment - true if storage within the function requires the
579 // stack pointer to be aligned more than the normal calling convention calls
580 // for.
578 /// hasReservedSpillSlot - Return true if target has reserved a spill slot in
579 /// the stack frame of the given function for the specified register. e.g. On
580 /// x86, if the frame register is required, the first fixed stack object is
581 /// reserved as its spill slot. This tells PEI not to create a new stack frame
582 /// object for the given register. It should be called only after
583 /// processFunctionBeforeCalleeSavedScan().
584 virtual bool hasReservedSpillSlot(MachineFunction &MF, unsigned Reg,
585 int &FrameIdx) const {
586 return false;
587 }
588
589 /// needsStackRealignment - true if storage within the function requires the
590 /// stack pointer to be aligned more than the normal calling convention calls
591 /// for.
581592 virtual bool needsStackRealignment(const MachineFunction &MF) const {
582593 return false;
583594 }
209209 unsigned Reg = I->getReg();
210210 const TargetRegisterClass *RC = I->getRegClass();
211211
212 int FrameIdx;
213 if (RegInfo->hasReservedSpillSlot(Fn, Reg, FrameIdx)) {
214 I->setFrameIdx(FrameIdx);
215 continue;
216 }
217
212218 // Check to see if this physreg must be spilled to a particular stack slot
213219 // on this target.
214220 const std::pair *FixedSlot = FixedSpillSlots;
216222 FixedSlot->first != Reg)
217223 ++FixedSlot;
218224
219 int FrameIdx;
220225 if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
221226 // Nope, just spill it anywhere convenient.
222227 unsigned Align = RC->getAlignment();
20282028 unsigned SlotSize = is64Bit ? 8 : 4;
20292029
20302030 MachineFunction &MF = *MBB.getParent();
2031 unsigned FPReg = RI.getFrameRegister(MF);
20312032 X86MachineFunctionInfo *X86FI = MF.getInfo();
20322033 unsigned CalleeFrameSize = 0;
20332034
20372038 const TargetRegisterClass *RegClass = CSI[i-1].getRegClass();
20382039 // Add the callee-saved register as live-in. It's killed at the spill.
20392040 MBB.addLiveIn(Reg);
2041 if (Reg == FPReg)
2042 // X86RegisterInfo::emitPrologue will handle spilling of frame register.
2043 continue;
20402044 if (RegClass != &X86::VR128RegClass) {
20412045 CalleeFrameSize += SlotSize;
2042 BuildMI(MBB, MI, DL, get(Opc))
2043 .addReg(Reg, RegState::Kill);
2046 BuildMI(MBB, MI, DL, get(Opc)).addReg(Reg, RegState::Kill);
20442047 } else {
20452048 storeRegToStackSlot(MBB, MI, Reg, true, CSI[i-1].getFrameIdx(), RegClass);
20462049 }
20592062 DebugLoc DL = DebugLoc::getUnknownLoc();
20602063 if (MI != MBB.end()) DL = MI->getDebugLoc();
20612064
2065 MachineFunction &MF = *MBB.getParent();
2066 unsigned FPReg = RI.getFrameRegister(MF);
20622067 bool is64Bit = TM.getSubtarget().is64Bit();
2063
20642068 unsigned Opc = is64Bit ? X86::POP64r : X86::POP32r;
20652069 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
20662070 unsigned Reg = CSI[i].getReg();
2071 if (Reg == FPReg)
2072 // X86RegisterInfo::emitEpilogue will handle restoring of frame register.
2073 continue;
20672074 const TargetRegisterClass *RegClass = CSI[i].getRegClass();
20682075 if (RegClass != &X86::VR128RegClass) {
20692076 BuildMI(MBB, MI, DL, get(Opc), Reg);
344344 return !MF.getFrameInfo()->hasVarSizedObjects();
345345 }
346346
347 bool X86RegisterInfo::hasReservedSpillSlot(MachineFunction &MF, unsigned Reg,
348 int &FrameIdx) const {
349 if (Reg == FramePtr && hasFP(MF)) {
350 FrameIdx = MF.getFrameInfo()->getObjectIndexBegin();
351 return true;
352 }
353 return false;
354 }
355
356
347357 int
348358 X86RegisterInfo::getFrameIndexOffset(MachineFunction &MF, int FI) const {
349359 int Offset = MF.getFrameInfo()->getObjectOffset(FI) + SlotSize;
492502 calculateMaxStackAlignment(FFI));
493503
494504 FFI->setMaxAlignment(MaxAlign);
495 }
496
497 void
498 X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF) const{
505
499506 X86MachineFunctionInfo *X86FI = MF.getInfo();
500507 int32_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
501508 if (TailCallReturnAddrDelta < 0) {
124124
125125 bool hasReservedCallFrame(MachineFunction &MF) const;
126126
127 bool hasReservedSpillSlot(MachineFunction &MF, unsigned Reg,
128 int &FrameIdx) const;
129
127130 void eliminateCallFramePseudoInstr(MachineFunction &MF,
128131 MachineBasicBlock &MBB,
129132 MachineBasicBlock::iterator MI) const;
131134 void eliminateFrameIndex(MachineBasicBlock::iterator MI,
132135 int SPAdj, RegScavenger *RS = NULL) const;
133136
134 void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
135137 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
136138 RegScavenger *RS = NULL) const;
137139
0 ; RUN: llvm-as < %s | llc -march=x86 | grep {(%esp}
1 ; RUN: llvm-as < %s | llc -march=x86 | grep {pushl %ebp} | count 1
2 ; RUN: llvm-as < %s | llc -march=x86 | grep {popl %ebp} | count 1
13
24 declare i8* @llvm.returnaddress(i32)
35
0 ; Check that eh_return & unwind_init were properly lowered
1 ; RUN: llvm-as < %s | llc | grep %ebp | count 9
1 ; RUN: llvm-as < %s | llc | grep %ebp | count 7
22 ; RUN: llvm-as < %s | llc | grep %ecx | count 5
33
44 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
0 ; Check that eh_return & unwind_init were properly lowered
1 ; RUN: llvm-as < %s | llc | grep %rbp | count 7
1 ; RUN: llvm-as < %s | llc | grep %rbp | count 5
22 ; RUN: llvm-as < %s | llc | grep %rcx | count 3
33
44 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"