llvm.org GIT mirror llvm / 90ae81a
[Power9] Enable the Out-of-Order scheduling model for P9 hw When switched to the MI scheduler for P9, the hardware is modeled as out of order. However, inside the MI Scheduler algorithm, we still use the in-order scheduling model as the MicroOpBufferSize isn't set. The MI scheduler take it as the hw cannot buffer the op. So, only when all the available instructions issued, the pending instruction could be scheduled. That is not true for our P9 hw in fact. This patch is trying to enable the Out-of-Order scheduling model. The buffer size 44 is picked from the P9 hw spec, and the perf test indicate that, its value won't hurt the cpu2017. With this patch, there are 3 specs improved over 3% and 1 spec deg over 3%. The detail is as follows: x264_r: +6.95% cactuBSSN_r: +6.94% lbm_r: +4.11% xz_r: -3.85% And the GEOMEAN for all the C/C++ spec in spec2017 is about 0.18% improved. Reviewer: Nemanjai Differential Revision: https://reviews.llvm.org/D55810 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350285 91177308-0d34-0410-b5e6-96231b3b80d8 QingShan Zhang 8 months ago
36 changed file(s) with 4900 addition(s) and 5064 deletion(s). Raw diff Collapse all Expand all
3131 // Try to make sure we have at least 10 dispatch groups in a loop.
3232 // A dispatch group is 6 instructions.
3333 let LoopMicroOpBufferSize = 60;
34
35 // As iops are dispatched to a slice, they are held in an independent slice
36 // issue queue until all register sources and other dependencies have been
37 // resolved and they can be issued. Each of four execution slices has an
38 // 11-entry iop issue queue.
39 let MicroOpBufferSize = 44;
3440
3541 let CompleteModel = 1;
3642
2626 ; CHECK-LABEL: test2
2727 ; CHECK: addi 3, 3, 8
2828 ; CHECK: lxvx [[LD:[0-9]+]], 0, 3
29 ; CHECK: addi 3, 4, 4
30 ; CHECK: stxvx [[LD]], 0, 3
29 ; CHECK: addi [[REG:[0-9]+]], 4, 4
30 ; CHECK: stxvx [[LD]], 0, [[REG]]
3131 }
3232 ; CHECK-P9: xxpermdi vs0, f0, f0, 2
3333 ; CHECK-P9: xxspltw vs0, vs0, 3
3434 ; CHECK-P9: stxvx vs0, 0, r4
35 ; CHECK-P9: lis r4, 1024
3635 ; CHECK-P9: lfiwax f0, 0, r3
3736 ; CHECK-P9: addis r3, r2, .LC1@toc@ha
3837 ; CHECK-P9: ld r3, .LC1@toc@l(r3)
3938 ; CHECK-P9: xscvsxdsp f0, f0
4039 ; CHECK-P9: ld r3, 0(r3)
40 ; CHECK-P9: lis r4, 1024
4141 ; CHECK-P9: stfsx f0, r3, r4
4242 ; CHECK-P9: blr
4343 entry:
12431243 ; P9LE-LABEL: fromRegsConvftoi
12441244 ; P8BE-LABEL: fromRegsConvftoi
12451245 ; P8LE-LABEL: fromRegsConvftoi
1246 ; P9BE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
1247 ; P9BE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
1248 ; P9BE-DAG: xvcvdpsxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
1249 ; P9BE-DAG: xvcvdpsxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
1246 ; P9BE: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
1247 ; P9BE: xvcvdpsxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
1248 ; P9BE: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
1249 ; P9BE: xvcvdpsxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
12501250 ; P9BE: vmrgew v2, [[REG3]], [[REG4]]
1251 ; P9LE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs3, vs1
1252 ; P9LE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs4, vs2
1253 ; P9LE-DAG: xvcvdpsxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
1254 ; P9LE-DAG: xvcvdpsxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
1251 ; P9LE: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs3, vs1
1252 ; P9LE: xvcvdpsxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
1253 ; P9LE: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs4, vs2
1254 ; P9LE: xvcvdpsxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
12551255 ; P9LE: vmrgew v2, [[REG4]], [[REG3]]
12561256 ; P8BE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
12571257 ; P8BE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
15151515 ; P9LE-LABEL: fromRegsConvdtoi
15161516 ; P8BE-LABEL: fromRegsConvdtoi
15171517 ; P8LE-LABEL: fromRegsConvdtoi
1518 ; P9BE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
1519 ; P9BE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
1520 ; P9BE-DAG: xvcvdpsxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
1521 ; P9BE-DAG: xvcvdpsxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
1518 ; P9BE: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
1519 ; P9BE: xvcvdpsxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
1520 ; P9BE: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
1521 ; P9BE: xvcvdpsxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
15221522 ; P9BE: vmrgew v2, [[REG3]], [[REG4]]
1523 ; P9LE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs3, vs1
1524 ; P9LE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs4, vs2
1525 ; P9LE-DAG: xvcvdpsxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
1526 ; P9LE-DAG: xvcvdpsxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
1523 ; P9LE: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs3, vs1
1524 ; P9LE: xvcvdpsxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
1525 ; P9LE: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs4, vs2
1526 ; P9LE: xvcvdpsxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
15271527 ; P9LE: vmrgew v2, [[REG4]], [[REG3]]
15281528 ; P8BE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
15291529 ; P8BE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
16411641 ; P9LE: lfd
16421642 ; P9LE: lfd
16431643 ; P9LE: xxmrghd
1644 ; P9LE: xvcvdpsxws
16441645 ; P9LE: xxmrghd
1645 ; P9LE: xvcvdpsxws
16461646 ; P9LE: xvcvdpsxws
16471647 ; P9LE: vmrgew v2
16481648 ; P8BE: lfdx
17101710 ; P9LE: lfd
17111711 ; P9LE: lfd
17121712 ; P9LE: xxmrghd
1713 ; P9LE: xvcvdpsxws
17131714 ; P9LE: xxmrghd
1714 ; P9LE: xvcvdpsxws
17151715 ; P9LE: xvcvdpsxws
17161716 ; P9LE: vmrgew v2
17171717 ; P8BE: lfdux
17791779 ; P9LE: lfd
17801780 ; P9LE: lfd
17811781 ; P9LE: xxmrghd
1782 ; P9LE: xvcvdpsxws
17821783 ; P9LE: xxmrghd
1783 ; P9LE: xvcvdpsxws
17841784 ; P9LE: xvcvdpsxws
17851785 ; P9LE: vmrgew v2
17861786 ; P8BE: lfdux
23752375 ; P9LE-LABEL: fromRegsConvftoui
23762376 ; P8BE-LABEL: fromRegsConvftoui
23772377 ; P8LE-LABEL: fromRegsConvftoui
2378 ; P9BE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
2379 ; P9BE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
2380 ; P9BE-DAG: xvcvdpuxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
2381 ; P9BE-DAG: xvcvdpuxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
2378 ; P9BE: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
2379 ; P9BE: xvcvdpuxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
2380 ; P9BE: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
2381 ; P9BE: xvcvdpuxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
23822382 ; P9BE: vmrgew v2, [[REG3]], [[REG4]]
2383 ; P9LE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs3, vs1
2384 ; P9LE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs4, vs2
2385 ; P9LE-DAG: xvcvdpuxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
2386 ; P9LE-DAG: xvcvdpuxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
2383 ; P9LE: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs3, vs1
2384 ; P9LE: xvcvdpuxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
2385 ; P9LE: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs4, vs2
2386 ; P9LE: xvcvdpuxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
23872387 ; P9LE: vmrgew v2, [[REG4]], [[REG3]]
23882388 ; P8BE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
23892389 ; P8BE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
26472647 ; P9LE-LABEL: fromRegsConvdtoui
26482648 ; P8BE-LABEL: fromRegsConvdtoui
26492649 ; P8LE-LABEL: fromRegsConvdtoui
2650 ; P9BE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
2651 ; P9BE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
2652 ; P9BE-DAG: xvcvdpuxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
2653 ; P9BE-DAG: xvcvdpuxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
2650 ; P9BE: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
2651 ; P9BE: xvcvdpuxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
2652 ; P9BE: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
2653 ; P9BE: xvcvdpuxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
26542654 ; P9BE: vmrgew v2, [[REG3]], [[REG4]]
2655 ; P9LE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs3, vs1
2656 ; P9LE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs4, vs2
2657 ; P9LE-DAG: xvcvdpuxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
2658 ; P9LE-DAG: xvcvdpuxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
2655 ; P9LE: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs3, vs1
2656 ; P9LE: xvcvdpuxws [[REG3:v[0-9]+]], {{[vs]+}}[[REG1]]
2657 ; P9LE: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs4, vs2
2658 ; P9LE: xvcvdpuxws [[REG4:v[0-9]+]], {{[vs]+}}[[REG2]]
26592659 ; P9LE: vmrgew v2, [[REG4]], [[REG3]]
26602660 ; P8BE-DAG: xxmrghd {{[vs]+}}[[REG1:[0-9]+]], vs1, vs3
26612661 ; P8BE-DAG: xxmrghd {{[vs]+}}[[REG2:[0-9]+]], vs2, vs4
27732773 ; P9LE: lfd
27742774 ; P9LE: lfd
27752775 ; P9LE: xxmrghd
2776 ; P9LE: xvcvdpuxws
27762777 ; P9LE: xxmrghd
2777 ; P9LE: xvcvdpuxws
27782778 ; P9LE: xvcvdpuxws
27792779 ; P9LE: vmrgew v2
27802780 ; P8BE: lfdx
28422842 ; P9LE: lfd
28432843 ; P9LE: lfd
28442844 ; P9LE: xxmrghd
2845 ; P9LE: xvcvdpuxws
28452846 ; P9LE: xxmrghd
2846 ; P9LE: xvcvdpuxws
28472847 ; P9LE: xvcvdpuxws
28482848 ; P9LE: vmrgew v2
28492849 ; P8BE: lfdux
29112911 ; P9LE: lfd
29122912 ; P9LE: lfd
29132913 ; P9LE: xxmrghd
2914 ; P9LE: xvcvdpuxws
29142915 ; P9LE: xxmrghd
2915 ; P9LE: xvcvdpuxws
29162916 ; P9LE: xvcvdpuxws
29172917 ; P9LE: vmrgew v2
29182918 ; P8BE: lfdux
111111 %2 = call fp128 @llvm.ppc.scalar.insert.exp.qp(fp128 %0, i64 %1)
112112 ret fp128 %2
113113 ; CHECK-LABEL: insert_exp_qp
114 ; CHECK: mtvsrd [[FPREG:f[0-9]+]], r3
115 ; CHECK: lxvx [[VECREG:v[0-9]+]]
114 ; CHECK-DAG: mtvsrd [[FPREG:f[0-9]+]], r3
115 ; CHECK-DAG: lxvx [[VECREG:v[0-9]+]]
116116 ; CHECK: xsiexpqp v2, [[VECREG]], [[FPREG]]
117117 ; CHECK: blr
118118 }
8181 align 16 %a) {
8282 ; CHECK-LABEL: testStruct_03:
8383 ; CHECK: # %bb.0: # %entry
84 ; CHECK-NEXT: lxv v2, 128(r1)
8584 ; CHECK-NEXT: std r10, 88(r1)
8685 ; CHECK-NEXT: std r9, 80(r1)
8786 ; CHECK-NEXT: std r8, 72(r1)
9089 ; CHECK-NEXT: std r5, 48(r1)
9190 ; CHECK-NEXT: std r4, 40(r1)
9291 ; CHECK-NEXT: std r3, 32(r1)
92 ; CHECK-NEXT: lxv v2, 128(r1)
9393 ; CHECK-NEXT: blr
9494
9595 ; CHECK-BE-LABEL: testStruct_03:
9696 ; CHECK-BE: # %bb.0: # %entry
97 ; CHECK-BE-NEXT: lxv v2, 144(r1)
9897 ; CHECK-BE-NEXT: std r10, 104(r1)
9998 ; CHECK-BE-NEXT: std r9, 96(r1)
10099 ; CHECK-BE-NEXT: std r8, 88(r1)
103102 ; CHECK-BE-NEXT: std r5, 64(r1)
104103 ; CHECK-BE-NEXT: std r4, 56(r1)
105104 ; CHECK-BE-NEXT: std r3, 48(r1)
105 ; CHECK-BE-NEXT: lxv v2, 144(r1)
106106 ; CHECK-BE-NEXT: blr
107107 entry:
108108 %a7 = getelementptr inbounds %struct.With9fp128params,
227227 define fp128 @testMixedAggregate_03([4 x i128] %sa.coerce) {
228228 ; CHECK-LABEL: testMixedAggregate_03:
229229 ; CHECK: # %bb.0: # %entry
230 ; CHECK-DAG: mtvsrwa v2, r3
231 ; CHECK-DAG: mtvsrdd v3, r6, r5
232 ; CHECK: mtvsrd v4, r10
230 ; CHECK: mtvsrwa v2, r3
233231 ; CHECK: xscvsdqp v2, v2
234 ; CHECK-DAG: xscvsdqp v[[REG:[0-9]+]], v4
235 ; CHECK-DAG: xsaddqp v2, v3, v2
232 ; CHECK: mtvsrdd v3, r6, r5
233 ; CHECK: xsaddqp v2, v3, v2
234 ; CHECK: mtvsrd v[[REG1:[0-9]+]], r10
235 ; CHECK: xscvsdqp v[[REG:[0-9]+]], v[[REG1]]
236236 ; CHECK: xsaddqp v2, v2, v[[REG]]
237237 ; CHECK-NEXT: blr
238238 entry:
259259 ; CHECK-NEXT: std r7, 64(r1)
260260 ; CHECK-NEXT: std r10, 88(r1)
261261 ; CHECK-NEXT: std r9, 80(r1)
262 ; CHECK-NEXT: lxv v2, 64(r1)
263262 ; CHECK-NEXT: std r6, 56(r1)
264263 ; CHECK-NEXT: std r5, 48(r1)
265264 ; CHECK-NEXT: std r4, 40(r1)
266265 ; CHECK-NEXT: std r3, 32(r1)
266 ; CHECK-NEXT: lxv v2, 64(r1)
267267 ; CHECK-NEXT: blr
268268
269269 ; CHECK-BE-LABEL: testNestedAggregate:
272272 ; CHECK-BE-NEXT: std r7, 80(r1)
273273 ; CHECK-BE-NEXT: std r10, 104(r1)
274274 ; CHECK-BE-NEXT: std r9, 96(r1)
275 ; CHECK-BE-NEXT: lxv v2, 80(r1)
276275 ; CHECK-BE-NEXT: std r6, 72(r1)
277276 ; CHECK-BE-NEXT: std r5, 64(r1)
278277 ; CHECK-BE-NEXT: std r4, 56(r1)
279278 ; CHECK-BE-NEXT: std r3, 48(r1)
279 ; CHECK-BE-NEXT: lxv v2, 80(r1)
280280 ; CHECK-BE-NEXT: blr
281281 entry:
282282 %c = getelementptr inbounds %struct.MixedC, %struct.MixedC* %a, i64 0, i32 1, i32 1
336336 define fp128 @sum_float128(i32 signext %count, ...) {
337337 ; CHECK-LABEL: sum_float128:
338338 ; CHECK: # %bb.0: # %entry
339 ; CHECK-NEXT: addis r11, r2, .LCPI17_0@toc@ha
340 ; CHECK-NEXT: cmpwi cr0, r3, 1
341339 ; CHECK-NEXT: std r10, 88(r1)
342340 ; CHECK-NEXT: std r9, 80(r1)
343341 ; CHECK-NEXT: std r8, 72(r1)
344342 ; CHECK-NEXT: std r7, 64(r1)
345343 ; CHECK-NEXT: std r6, 56(r1)
344 ; CHECK-NEXT: cmpwi cr0, r3, 1
345 ; CHECK-NEXT: std r4, 40(r1)
346 ; CHECK-NEXT: addis [[REG:r[0-9]+]], r2, .LCPI17_0@toc@ha
347 ; CHECK-NEXT: addi [[REG1:r[0-9]+]], [[REG]], .LCPI17_0@toc@l
348 ; CHECK-NEXT: lxvx v2, 0, [[REG1]]
346349 ; CHECK-NEXT: std r5, 48(r1)
347 ; CHECK-NEXT: std r4, 40(r1)
348 ; CHECK-NEXT: addi r11, r11, .LCPI17_0@toc@l
349 ; CHECK-NEXT: lxvx v2, 0, r11
350350 ; CHECK-NEXT: bltlr cr0
351351 ; CHECK-NEXT: # %bb.1: # %if.end
352352 ; CHECK-NEXT: addi r3, r1, 40
353353 ; CHECK-NEXT: lxvx v3, 0, r3
354354 ; CHECK-NEXT: xsaddqp v2, v3, v2
355 ; CHECK-NEXT: addi [[REG2:r[0-9]+]], r1, 72
356 ; CHECK-NEXT: std [[REG2]], -8(r1)
355357 ; CHECK-NEXT: lxv v3, 16(r3)
356 ; CHECK-NEXT: addi r3, r1, 72
357 ; CHECK-NEXT: std r3, -8(r1)
358358 ; CHECK-NEXT: xsaddqp v2, v2, v3
359359 ; CHECK-NEXT: blr
360360 entry:
282282 fp128* nocapture %res) {
283283 ; CHECK-LABEL: qp_powi:
284284 ; CHECK: lxv v2, 0(r3)
285 ; CHECK: lwz r3, 0(r4)
285 ; CHECK: lwz r5, 0(r4)
286286 ; CHECK: bl __powikf2
287287 ; CHECK: blr
288288 entry:
443443 ; CHECK-LABEL: qpConv2dp_03:
444444 ; CHECK: # %bb.0: # %entry
445445 ; CHECK-NEXT: addis r5, r2, .LC7@toc@ha
446 ; CHECK-NEXT: sldi r4, r4, 3
447446 ; CHECK-NEXT: ld r5, .LC7@toc@l(r5)
448447 ; CHECK-NEXT: lxvx v2, 0, r5
449448 ; CHECK-NEXT: xscvqpdp v2, v2
449 ; CHECK-NEXT: sldi r4, r4, 3
450450 ; CHECK-NEXT: stxsdx v2, r3, r4
451451 ; CHECK-NEXT: blr
452452 entry:
516516 ; CHECK-LABEL: qpConv2sp_03:
517517 ; CHECK: # %bb.0: # %entry
518518 ; CHECK-NEXT: addis r5, r2, .LC7@toc@ha
519 ; CHECK-NEXT: sldi r4, r4, 2
520519 ; CHECK-NEXT: ld r5, .LC7@toc@l(r5)
521520 ; CHECK-NEXT: lxv v2, 48(r5)
522521 ; CHECK-NEXT: xscvqpdpo v2, v2
523522 ; CHECK-NEXT: xsrsp f0, v2
523 ; CHECK-NEXT: sldi r4, r4, 2
524524 ; CHECK-NEXT: stfsx f0, r3, r4
525525 ; CHECK-NEXT: blr
526526 entry:
608608 ; CHECK-LABEL: dpConv2qp_03:
609609 ; CHECK: # %bb.0: # %entry
610610 ; CHECK-NEXT: xscpsgndp v2, f1, f1
611 ; CHECK-NEXT: sldi r4, r4, 4
612 ; CHECK-NEXT: xscvdpqp v2, v2
611 ; CHECK-DAG: sldi r4, r4, 4
612 ; CHECK-DAG: xscvdpqp v2, v2
613613 ; CHECK-NEXT: stxvx v2, r3, r4
614614 ; CHECK-NEXT: blr
615615 entry:
688688 ; CHECK-LABEL: spConv2qp_03:
689689 ; CHECK: # %bb.0: # %entry
690690 ; CHECK-NEXT: xscpsgndp v2, f1, f1
691 ; CHECK-NEXT: sldi r4, r4, 4
692 ; CHECK-NEXT: xscvdpqp v2, v2
691 ; CHECK-DAG: sldi r4, r4, 4
692 ; CHECK-DAG: xscvdpqp v2, v2
693693 ; CHECK-NEXT: stxvx v2, r3, r4
694694 ; CHECK-NEXT: blr
695695 entry:
6262 ; CHECK: # %bb.0: # %entry
6363 ; CHECK-NEXT: sldi r4, r4, 4
6464 ; CHECK-NEXT: lxv v2, 0(r3)
65 ; CHECK-NEXT: add r4, r3, r4
66 ; CHECK-NEXT: lxv v3, -16(r4)
65 ; CHECK-NEXT: add [[REG:r[0-9]+]], r3, r4
66 ; CHECK-NEXT: lxv v3, -16([[REG]])
6767 ; CHECK-NEXT: xsaddqp v2, v2, v3
6868 ; CHECK-NEXT: blr
6969 i32 signext %loopcnt, fp128* nocapture readnone %sum) {
8484 ; CHECK-LABEL: maxVecParam:
8585 ; CHECK: # %bb.0: # %entry
8686 ; CHECK-NEXT: xsaddqp v2, v2, v3
87 ; CHECK-NEXT: lxv v[[REG0:[0-9]+]], 224(r1)
8887 ; CHECK-NEXT: xsaddqp v2, v2, v4
8988 ; CHECK-NEXT: xsaddqp v2, v2, v5
9089 ; CHECK-NEXT: xsaddqp v2, v2, v6
9594 ; CHECK-NEXT: xsaddqp v2, v2, v11
9695 ; CHECK-NEXT: xsaddqp v2, v2, v12
9796 ; CHECK-NEXT: xsaddqp v2, v2, v13
97 ; CHECK-NEXT: lxv v[[REG0:[0-9]+]], 224(r1)
9898 ; CHECK-NEXT: xssubqp v2, v2, v[[REG0]]
9999 ; CHECK-NEXT: blr
100100 fp128 %p6, fp128 %p7, fp128 %p8, fp128 %p9, fp128 %p10,
120120 define fp128 @mixParam_01(fp128 %a, i32 signext %i, fp128 %b) {
121121 ; CHECK-LABEL: mixParam_01:
122122 ; CHECK: # %bb.0: # %entry
123 ; CHECK-NEXT: mtvsrwa v4, r5
124 ; CHECK-NEXT: xsaddqp v2, v2, v3
125 ; CHECK-NEXT: xscvsdqp v[[REG0:[0-9]+]], v4
123 ; CHECK-DAG: mtvsrwa [[REG1:v[0-9]+]], r5
124 ; CHECK-DAG: xsaddqp v2, v2, v3
125 ; CHECK-NEXT: xscvsdqp v[[REG0:[0-9]+]], [[REG1]]
126126 ; CHECK-NEXT: xsaddqp v2, v2, v[[REG0]]
127127 ; CHECK-NEXT: blr
128128 entry:
135135 define fastcc fp128 @mixParam_01f(fp128 %a, i32 signext %i, fp128 %b) {
136136 ; CHECK-LABEL: mixParam_01f:
137137 ; CHECK: # %bb.0: # %entry
138 ; CHECK-NEXT: mtvsrwa v[[REG0:[0-9]+]], r3
139 ; CHECK-NEXT: xsaddqp v2, v2, v3
138 ; CHECK-DAG: mtvsrwa v[[REG0:[0-9]+]], r3
139 ; CHECK-DAG: xsaddqp v2, v2, v3
140140 ; CHECK-NEXT: xscvsdqp v[[REG1:[0-9]+]], v[[REG0]]
141141 ; CHECK-NEXT: xsaddqp v2, v2, v[[REG1]]
142142 ; CHECK-NEXT: blr
151151 define fp128 @mixParam_02(fp128 %p1, double %p2, i64* nocapture %p3,
152152 ; CHECK-LABEL: mixParam_02:
153153 ; CHECK: # %bb.0: # %entry
154 ; CHECK-DAG: lwz r3, 96(r1)
154 ; CHECK: lwz r3, 96(r1)
155155 ; CHECK: add r4, r7, r9
156 ; CHECK-NEXT: xscpsgndp v[[REG0:[0-9]+]], f1, f1
157 ; CHECK-DAG: add r4, r4, r10
156 ; CHECK: add r4, r4, r10
157 ; CHECK: add r3, r4, r3
158 ; CHECK: clrldi r3, r3, 32
159 ; CHECK: std r3, 0(r6)
160 ; CHECK: lxv v[[REG1:[0-9]+]], 0(r8)
161 ; CHECK: xscpsgndp v[[REG0:[0-9]+]], f1, f1
158162 ; CHECK: xscvdpqp v[[REG0]], v[[REG0]]
159 ; CHECK-NEXT: add r3, r4, r3
160 ; CHECK-NEXT: clrldi r3, r3, 32
161 ; CHECK-NEXT: std r3, 0(r6)
162 ; CHECK-NEXT: lxv v[[REG1:[0-9]+]], 0(r8)
163 ; CHECK-NEXT: xsaddqp v2, v[[REG1]], v2
164 ; CHECK-NEXT: xsaddqp v2, v2, v3
163 ; CHECK: xsaddqp v2, v[[REG1]], v2
164 ; CHECK: xsaddqp v2, v2, v3
165165 ; CHECK-NEXT: blr
166166 i16 signext %p4, fp128* nocapture readonly %p5,
167167 i32 signext %p6, i8 zeroext %p7, i32 zeroext %p8) {
185185 ; CHECK-LABEL: mixParam_02f:
186186 ; CHECK: # %bb.0: # %entry
187187 ; CHECK-NEXT: add r4, r4, r6
188 ; CHECK-NEXT: xscpsgndp v[[REG0:[0-9]+]], f1, f1
189188 ; CHECK-NEXT: add r4, r4, r7
190 ; CHECK-NEXT: xscvdpqp v[[REG0]], v[[REG0]]
191189 ; CHECK-NEXT: add r4, r4, r8
192190 ; CHECK-NEXT: clrldi r4, r4, 32
193 ; CHECK-NEXT: std r4, 0(r3)
194 ; CHECK-NEXT: lxv v[[REG1:[0-9]+]], 0(r5)
191 ; CHECK-DAG: std r4, 0(r3)
192 ; CHECK-DAG: lxv v[[REG1:[0-9]+]], 0(r5)
193 ; CHECK-NEXT: xscpsgndp v[[REG0:[0-9]+]], f1, f1
194 ; CHECK-NEXT: xscvdpqp v[[REG0]], v[[REG0]]
195195 ; CHECK-NEXT: xsaddqp v2, v[[REG1]], v2
196196 ; CHECK-NEXT: xsaddqp v2, v2, v[[REG0]]
197197 ; CHECK-NEXT: blr
218218 ; CHECK-LABEL: mixParam_03:
219219 ; CHECK: # %bb.0: # %entry
220220 ; CHECK-DAG: ld r3, 104(r1)
221 ; CHECK-DAG: mtvsrwa v[[REG2:[0-9]+]], r10
222221 ; CHECK-DAG: stxv v2, 0(r9)
222 ; CHECK: stxvx v3, 0, r3
223 ; CHECK: mtvsrwa v[[REG2:[0-9]+]], r10
223224 ; CHECK-DAG: xscvsdqp v[[REG1:[0-9]+]], v[[REG2]]
224 ; CHECK: stxvx v3, 0, r3
225 ; CHECK-NEXT: lxv v2, 0(r9)
225 ; CHECK-DAG: lxv v2, 0(r9)
226226 ; CHECK-NEXT: xsaddqp v2, v2, v[[REG1]]
227227 ; CHECK-NEXT: xscvqpdp v2, v2
228228 ; CHECK-NEXT: stxsd v2, 0(r5)
244244 define fastcc void @mixParam_03f(fp128 %f1, double* nocapture %d1, <4 x i32> %vec1,
245245 ; CHECK-LABEL: mixParam_03f:
246246 ; CHECK: # %bb.0: # %entry
247 ; CHECK-NEXT: mtvsrwa v[[REG0:[0-9]+]], r5
248 ; CHECK-NEXT: stxv v[[REG1:[0-9]+]], 0(r4)
249 ; CHECK-NEXT: stxv v[[REG2:[0-9]+]], 0(r7)
250 ; CHECK-NEXT: lxv v[[REG1]], 0(r4)
247 ; CHECK-DAG: mtvsrwa v[[REG0:[0-9]+]], r5
248 ; CHECK-DAG: stxv v[[REG1:[0-9]+]], 0(r4)
249 ; CHECK-DAG: stxv v[[REG2:[0-9]+]], 0(r7)
250 ; CHECK-DAG: lxv v[[REG1]], 0(r4)
251251 ; CHECK-NEXT: xscvsdqp v[[REG3:[0-9]+]], v[[REG0]]
252252 ; CHECK-NEXT: xsaddqp v[[REG4:[0-9]+]], v[[REG1]], v[[REG3]]
253253 ; CHECK-NEXT: xscvqpdp v2, v[[REG4]]
5252 ret i64 %conv
5353
5454 ; CHECK-LABEL: qpConv2sdw_03
55 ; CHECK: addis r[[REG0:[0-9]+]], r2, .LC0@toc@ha
56 ; CHECK-DAG: ld r[[REG0]], .LC0@toc@l(r[[REG0]])
57 ; CHECK-DAG: lxv v[[REG1:[0-9]+]], 16(r[[REG0]])
58 ; CHECK-DAG: lxv v[[REG:[0-9]+]], 0(r3)
55 ; CHECK: lxv v[[REG:[0-9]+]], 0(r3)
56 ; CHECK: addis r[[REG0:[0-9]+]], r2, .LC0@toc@ha
57 ; CHECK: ld r[[REG0]], .LC0@toc@l(r[[REG0]])
58 ; CHECK: lxv v[[REG1:[0-9]+]], 16(r[[REG0]])
5959 ; CHECK: xsaddqp v[[REG]], v[[REG]], v[[REG1]]
6060 ; CHECK-NEXT: xscvqpsdz v[[CONV:[0-9]+]], v[[REG]]
6161 ; CHECK-NEXT: mfvsrd r3, v[[CONV]]
9696
9797 ; CHECK-LABEL: qpConv2sdw_testXForm
9898 ; CHECK: xscvqpsdz v[[CONV:[0-9]+]],
99 ; CHECK-NEXT: stxsdx v[[CONV]], r3, r4
99 ; CHECK: stxsdx v[[CONV]], r3, r4
100100 ; CHECK-NEXT: blr
101101 }
102102
145145 ret i64 %conv
146146
147147 ; CHECK-LABEL: qpConv2udw_03
148 ; CHECK: lxv v[[REG:[0-9]+]], 0(r3)
148149 ; CHECK: addis r[[REG0:[0-9]+]], r2, .LC0@toc@ha
149150 ; CHECK-DAG: ld r[[REG0]], .LC0@toc@l(r[[REG0]])
150151 ; CHECK-DAG: lxv v[[REG1:[0-9]+]], 16(r[[REG0]])
151 ; CHECK-DAG: lxv v[[REG:[0-9]+]], 0(r3)
152152 ; CHECK: xsaddqp v[[REG]], v[[REG]], v[[REG1]]
153153 ; CHECK-NEXT: xscvqpudz v[[CONV:[0-9]+]], v[[REG]]
154154 ; CHECK-NEXT: mfvsrd r3, v[[CONV]]
189189
190190 ; CHECK-LABEL: qpConv2udw_testXForm
191191 ; CHECK: xscvqpudz v[[CONV:[0-9]+]],
192 ; CHECK-NEXT: stxsdx v[[CONV]], r3, r4
192 ; CHECK: stxsdx v[[CONV]], r3, r4
193193 ; CHECK-NEXT: blr
194194 }
195195
239239 ret i32 %conv
240240
241241 ; CHECK-LABEL: qpConv2sw_03
242 ; CHECK: lxv v[[REG:[0-9]+]], 0(r3)
242243 ; CHECK: addis r[[REG0:[0-9]+]], r2, .LC0@toc@ha
243244 ; CHECK-DAG: ld r[[REG0]], .LC0@toc@l(r[[REG0]])
244245 ; CHECK-DAG: lxv v[[REG1:[0-9]+]], 16(r[[REG0]])
245 ; CHECK-DAG: lxv v[[REG:[0-9]+]], 0(r3)
246246 ; CHECK-NEXT: xsaddqp v[[ADD:[0-9]+]], v[[REG]], v[[REG1]]
247247 ; CHECK-NEXT: xscvqpswz v[[CONV:[0-9]+]], v[[ADD]]
248248 ; CHECK-NEXT: mfvsrwz r[[REG2:[0-9]+]], v[[CONV]]
315315 ret i32 %conv
316316
317317 ; CHECK-LABEL: qpConv2uw_03
318 ; CHECK: lxv v[[REG:[0-9]+]], 0(r3)
318319 ; CHECK: addis r[[REG0:[0-9]+]], r2, .LC0@toc@ha
319320 ; CHECK-DAG: ld r[[REG0]], .LC0@toc@l(r[[REG0]])
320321 ; CHECK-DAG: lxv v[[REG1:[0-9]+]], 16(r[[REG0]])
321 ; CHECK-DAG: lxv v[[REG:[0-9]+]], 0(r3)
322322 ; CHECK-NEXT: xsaddqp v[[ADD:[0-9]+]], v[[REG]], v[[REG1]]
323323 ; CHECK-NEXT: xscvqpuwz v[[CONV:[0-9]+]], v[[ADD]]
324324 ; CHECK-NEXT: mfvsrwz r3, v[[CONV]]
385385 define signext i16 @qpConv2shw_03(fp128* nocapture readonly %a) {
386386 ; CHECK-LABEL: qpConv2shw_03:
387387 ; CHECK: # %bb.0: # %entry
388 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
389 ; CHECK-NEXT: lxv v2, 0(r3)
390 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
391 ; CHECK-NEXT: lxv v3, 16(r4)
388 ; CHECK-NEXT: lxv v2, 0(r3)
389 ; CHECK-NEXT: addis [[REG:r[0-9]+]], r2, .LC0@toc@ha
390 ; CHECK-NEXT: ld [[REG1:r[0-9]+]], .LC0@toc@l([[REG]])
391 ; CHECK-NEXT: lxv v3, 16([[REG1]])
392392 ; CHECK-NEXT: xsaddqp v2, v2, v3
393393 ; CHECK-NEXT: xscvqpswz v2, v2
394394 ; CHECK-NEXT: mfvsrwz r3, v2
462462 define zeroext i16 @qpConv2uhw_03(fp128* nocapture readonly %a) {
463463 ; CHECK-LABEL: qpConv2uhw_03:
464464 ; CHECK: # %bb.0: # %entry
465 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
466 ; CHECK-NEXT: lxv v2, 0(r3)
467 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
468 ; CHECK-NEXT: lxv v3, 16(r4)
465 ; CHECK-NEXT: lxv v2, 0(r3)
466 ; CHECK-NEXT: addis [[REG:r[0-9]+]], r2, .LC0@toc@ha
467 ; CHECK-NEXT: ld [[REG1:r[0-9]+]], .LC0@toc@l([[REG]])
468 ; CHECK-NEXT: lxv v3, 16([[REG1]])
469469 ; CHECK-NEXT: xsaddqp v2, v2, v3
470470 ; CHECK-NEXT: xscvqpswz v2, v2
471471 ; CHECK-NEXT: mfvsrwz r3, v2
539539 define signext i8 @qpConv2sb_03(fp128* nocapture readonly %a) {
540540 ; CHECK-LABEL: qpConv2sb_03:
541541 ; CHECK: # %bb.0: # %entry
542 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
543 ; CHECK-NEXT: lxv v2, 0(r3)
544 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
545 ; CHECK-NEXT: lxv v3, 16(r4)
542 ; CHECK-NEXT: lxv v2, 0(r3)
543 ; CHECK-NEXT: addis [[REG:r[0-9]+]], r2, .LC0@toc@ha
544 ; CHECK-NEXT: ld [[REG1:r[0-9]+]], .LC0@toc@l([[REG]])
545 ; CHECK-NEXT: lxv v3, 16([[REG1]])
546546 ; CHECK-NEXT: xsaddqp v2, v2, v3
547547 ; CHECK-NEXT: xscvqpswz v2, v2
548548 ; CHECK-NEXT: mfvsrwz r3, v2
616616 define zeroext i8 @qpConv2ub_03(fp128* nocapture readonly %a) {
617617 ; CHECK-LABEL: qpConv2ub_03:
618618 ; CHECK: # %bb.0: # %entry
619 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
620 ; CHECK-NEXT: lxv v2, 0(r3)
621 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
622 ; CHECK-NEXT: lxv v3, 16(r4)
619 ; CHECK-NEXT: lxv v2, 0(r3)
620 ; CHECK-NEXT: addis [[REG:r[0-9]+]], r2, .LC0@toc@ha
621 ; CHECK-NEXT: ld [[REG1:r[0-9]+]], .LC0@toc@l([[REG]])
622 ; CHECK-NEXT: lxv v3, 16([[REG1]])
623623 ; CHECK-NEXT: xsaddqp v2, v2, v3
624624 ; CHECK-NEXT: xscvqpswz v2, v2
625625 ; CHECK-NEXT: mfvsrwz r3, v2
3939 ; CHECK: li [[REG4:[0-9]+]], 5
4040 ; CHECK: [[LAB:[a-z0-9A-Z_.]+]]:
4141 ; CHECK: ld [[REG2:[0-9]+]], a@toc@l([[REG1]])
42 ; CHECK: stw [[REG4]], 8([[REG2]])
4243 ; CHECK: ld [[REG3:[0-9]+]], 0([[REG2]])
43 ; CHECK: stw [[REG4]], 8([[REG2]])
4444 ; CHECK: stw [[REG4]], 8([[REG3]])
4545 ; CHECK: std [[REG3]], 0([[REG3]])
4646 ; CHECK: bdnz [[LAB]]
1010 ; CHECK-LABEL: bn_mul_comba8:
1111 ; CHECK: mulhdu
1212 ; CHECK-NEXT: mulld
13 ; CHECK-NEXT: mulhdu
14 ; CHECK-NEXT: mulld
13 ; CHECK: mulhdu
14 ; CHECK: mulld
1515 ; CHECK-NEXT: mulhdu
1616
1717
99 define signext i32 @test_pre_inc_disable_1(i8* nocapture readonly %pix1, i32 signext %i_stride_pix1, i8* nocapture readonly %pix2) {
1010 ; CHECK-LABEL: test_pre_inc_disable_1:
1111 ; CHECK: # %bb.0: # %entry
12 ; CHECK: addis r6, r2
13 ; CHECK: addis r7, r2,
1412 ; CHECK: lfd f0, 0(r5)
15 ; CHECK: xxlxor v4, v4, v4
16 ; CHECK: addi r5, r6,
17 ; CHECK: addi r6, r7,
13 ; CHECK: addis r5, r2
14 ; CHECK: addi r5, r5,
1815 ; CHECK: lxvx v2, 0, r5
19 ; CHECK: lxvx v3, 0, r6
16 ; CHECK: addis r5, r2,
17 ; CHECK: addi r5, r5,
18 ; CHECK: lxvx v4, 0, r5
2019 ; CHECK: xxpermdi v5, f0, f0, 2
21 ; CHECK-DAG: vperm v[[VR1:[0-9]+]], v4, v5, v2
22 ; CHECK-DAG: vperm v[[VR2:[0-9]+]], v5, v4, v3
20 ; CHECK: xxlxor v3, v3, v3
21 ; CHECK-DAG: vperm v[[VR1:[0-9]+]], v5, v3, v4
22 ; CHECK-DAG: vperm v[[VR2:[0-9]+]], v3, v5, v2
2323 ; CHECK-DAG: xvnegsp v[[VR3:[0-9]+]], v[[VR1]]
2424 ; CHECK-DAG: xvnegsp v[[VR4:[0-9]+]], v[[VR2]]
2525
2626 ; CHECK: .LBB0_1: # %for.cond1.preheader
2727 ; CHECK: lfd f0, 0(r3)
2828 ; CHECK: xxpermdi v1, f0, f0, 2
29 ; CHECK: vperm v6, v1, v4, v3
30 ; CHECK: vperm v1, v4, v1, v2
29 ; CHECK: vperm v6, v3, v1, v2
30 ; CHECK: vperm v1, v1, v3, v4
3131 ; CHECK-DAG: xvnegsp v6, v6
3232 ; CHECK-DAG: xvnegsp v1, v1
3333 ; CHECK-DAG: vabsduw v1, v1, v[[VR3]]
3434 ; CHECK-DAG: vabsduw v6, v6, v[[VR4]]
35 ; CHECK: vadduwm v1, v6, v1
35 ; CHECK: vadduwm v1, v1, v6
3636 ; CHECK: xxswapd v6, v1
3737 ; CHECK: vadduwm v1, v1, v6
3838 ; CHECK: xxspltw v6, v1, 2
3939 ; CHECK: vadduwm v1, v1, v6
40 ; CHECK: vextuwrx r7, r6, v1
40 ; CHECK: vextuwrx r7, r5, v1
4141 ; CHECK: ldux r8, r3, r4
4242 ; CHECK: add r3, r3, r4
43 ; CHECK: add r5, r7, r5
43 ; CHECK: add r6, r7, r6
4444 ; CHECK: mtvsrd f0, r8
4545 ; CHECK: xxswapd v1, vs0
46 ; CHECK: vperm v6, v1, v4, v3
47 ; CHECK: vperm v1, v4, v1, v2
46 ; CHECK: vperm v6, v3, v1, v2
47 ; CHECK: vperm v1, v1, v3, v4
4848 ; CHECK-DAG: xvnegsp v6, v6
4949 ; CHECK-DAG: xvnegsp v1, v1
5050 ; CHECK-DAG: vabsduw v1, v1, v[[VR3]]
5151 ; CHECK-DAG: vabsduw v6, v6, v[[VR4]]
52 ; CHECK: vadduwm v1, v6, v1
52 ; CHECK: vadduwm v1, v1, v6
5353 ; CHECK: xxswapd v6, v1
5454 ; CHECK: vadduwm v1, v1, v6
5555 ; CHECK: xxspltw v6, v1, 2
5656 ; CHECK: vadduwm v1, v1, v6
57 ; CHECK: vextuwrx r8, r6, v1
58 ; CHECK: add r5, r8, r5
57 ; CHECK: vextuwrx r7, r5, v1
58 ; CHECK: add r6, r7, r6
5959 ; CHECK: bdnz .LBB0_1
60 ; CHECK: extsw r3, r5
60 ; CHECK: extsw r3, r6
6161 ; CHECK: blr
6262
6363 ; P9BE-LABEL: test_pre_inc_disable_1:
64 ; P9BE: addis r6, r2,
65 ; P9BE: addis r7, r2,
6664 ; P9BE: lfd f0, 0(r5)
67 ; P9BE: xxlxor v4, v4, v4
68 ; P9BE: addi r5, r6,
69 ; P9BE: addi r6, r7,
65 ; P9BE: addis r5, r2,
66 ; P9BE: addi r5, r5,
7067 ; P9BE: lxvx v2, 0, r5
71 ; P9BE: lxvx v3, 0, r6
68 ; P9BE: addis r5, r2,
69 ; P9BE: addi r5, r5,
70 ; P9BE: lxvx v4, 0, r5
7271 ; P9BE: xxlor v5, vs0, vs0
73 ; P9BE: li r6, 0
74 ; P9BE-DAG: vperm v[[VR1:[0-9]+]], v4, v5, v2
75 ; P9BE-DAG: vperm v[[VR2:[0-9]+]], v4, v5, v3
72 ; P9BE: xxlxor v3, v3, v3
73 ; P9BE-DAG: li r5, 0
74 ; P9BE-DAG: vperm v[[VR1:[0-9]+]], v3, v5, v2
75 ; P9BE-DAG: vperm v[[VR2:[0-9]+]], v3, v5, v4
7676 ; P9BE-DAG: xvnegsp v[[VR3:[0-9]+]], v[[VR1]]
7777 ; P9BE-DAG: xvnegsp v[[VR4:[0-9]+]], v[[VR2]]
7878
7979 ; P9BE: .LBB0_1: # %for.cond1.preheader
8080 ; P9BE: lfd f0, 0(r3)
8181 ; P9BE: xxlor v1, vs0, vs0
82 ; P9BE: vperm v6, v4, v1, v3
83 ; P9BE: vperm v1, v4, v1, v2
82 ; P9BE: vperm v6, v3, v1, v4
83 ; P9BE: vperm v1, v3, v1, v2
8484 ; P9BE-DAG: xvnegsp v6, v6
8585 ; P9BE-DAG: xvnegsp v1, v1
8686 ; P9BE-DAG: vabsduw v1, v1, v[[VR3]]
9090 ; P9BE: vadduwm v1, v1, v6
9191 ; P9BE: xxspltw v6, v1, 1
9292 ; P9BE: vadduwm v1, v1, v6
93 ; P9BE: vextuwlx r[[GR1:[0-9]+]], r6, v1
93 ; P9BE: vextuwlx r[[GR1:[0-9]+]], r5, v1
94 ; P9BE: add r6, r[[GR1]], r6
9495 ; P9BE: ldux r[[GR2:[0-9]+]], r3, r4
9596 ; P9BE: add r3, r3, r4
96 ; P9BE: add r5, r[[GR1]], r5
9797 ; P9BE: mtvsrd v1, r[[GR2]]
98 ; P9BE: vperm v6, v4, v1, v3
99 ; P9BE: vperm v1, v4, v1, v2
98 ; P9BE: vperm v6, v3, v1, v2
99 ; P9BE: vperm v1, v3, v1, v4
100100 ; P9BE-DAG: xvnegsp v6, v6
101101 ; P9BE-DAG: xvnegsp v1, v1
102 ; P9BE-DAG: vabsduw v1, v1, v[[VR3]]
103 ; P9BE-DAG: vabsduw v6, v6, v[[VR4]]
104 ; P9BE: vadduwm v1, v6, v1
102 ; P9BE-DAG: vabsduw v1, v1, v[[VR4]]
103 ; P9BE-DAG: vabsduw v6, v6, v[[VR3]]
104 ; P9BE: vadduwm v1, v1, v6
105105 ; P9BE: xxswapd v6, v1
106106 ; P9BE: vadduwm v1, v1, v6
107107 ; P9BE: xxspltw v6, v1, 1
108108 ; P9BE: vadduwm v1, v1, v6
109 ; P9BE: vextuwlx r8, r6, v1
110 ; P9BE: add r5, r8, r5
109 ; P9BE: vextuwlx r7, r5, v1
110 ; P9BE: add r6, r7, r6
111111 ; P9BE: bdnz .LBB0_1
112 ; P9BE: extsw r3, r5
112 ; P9BE: extsw r3, r6
113113 ; P9BE: blr
114114 entry:
115115 %idx.ext = sext i32 %i_stride_pix1 to i64
165165 ; Function Attrs: norecurse nounwind readonly
166166 define signext i32 @test_pre_inc_disable_2(i8* nocapture readonly %pix1, i8* nocapture readonly %pix2) {
167167 ; CHECK-LABEL: test_pre_inc_disable_2:
168 ; CHECK: addis r5, r2,
169 ; CHECK: addis r6, r2,
170168 ; CHECK: lfd f0, 0(r3)
171 ; CHECK: lfd f1, 0(r4)
172 ; CHECK: xxlxor v0, v0, v0
173 ; CHECK: addi r3, r5, .LCPI1_0@toc@l
174 ; CHECK: addi r4, r6, .LCPI1_1@toc@l
175 ; CHECK: lxvx v2, 0, r3
176 ; CHECK: lxvx v3, 0, r4
177 ; CHECK: xxpermdi v4, f0, f0, 2
178 ; CHECK: xxpermdi v5, f1, f1, 2
179 ; CHECK: vperm v1, v4, v0, v2
180 ; CHECK: vperm v4, v0, v4, v3
181 ; CHECK: vperm v2, v5, v0, v2
182 ; CHECK: vperm v3, v0, v5, v3
183 ; CHECK: vabsduw v3, v4, v3
184 ; CHECK: vabsduw v2, v1, v2
185 ; CHECK: vadduwm v2, v2, v3
169 ; CHECK: addis r3, r2,
170 ; CHECK: addi r3, r3, .LCPI1_0@toc@l
171 ; CHECK: lxvx v4, 0, r3
172 ; CHECK: addis r3, r2,
173 ; CHECK: xxpermdi v2, f0, f0, 2
174 ; CHECK: lfd f0, 0(r4)
175 ; CHECK: addi r3, r3, .LCPI1_1@toc@l
176 ; CHECK: xxlxor v3, v3, v3
177 ; CHECK: lxvx v0, 0, r3
178 ; CHECK: xxpermdi v1, f0, f0, 2
179 ; CHECK: vperm v5, v2, v3, v4
180 ; CHECK: vperm v2, v3, v2, v0
181 ; CHECK: vperm v0, v3, v1, v0
182 ; CHECK: vperm v3, v1, v3, v4
183 ; CHECK: vabsduw v2, v2, v0
184 ; CHECK: vabsduw v3, v5, v3
185 ; CHECK: vadduwm v2, v3, v2
186186 ; CHECK: xxswapd v3, v2
187187 ; CHECK: vadduwm v2, v2, v3
188188 ; CHECK: xxspltw v3, v2, 2
192192 ; CHECK: blr
193193
194194 ; P9BE-LABEL: test_pre_inc_disable_2:
195 ; P9BE: addis r5, r2,
196 ; P9BE: addis r6, r2,
197195 ; P9BE: lfd f0, 0(r3)
198 ; P9BE: lfd f1, 0(r4)
199 ; P9BE: xxlxor v5, v5, v5
200 ; P9BE: addi r3, r5,
201 ; P9BE: addi r4, r6,
202 ; P9BE: lxvx v2, 0, r3
203 ; P9BE: lxvx v3, 0, r4
204 ; P9BE: xxlor v4, vs0, vs0
205 ; P9BE: xxlor v0, vs1, vs1
206 ; P9BE: vperm v1, v5, v4, v2
207 ; P9BE: vperm v4, v5, v4, v3
208 ; P9BE: vperm v2, v5, v0, v2
209 ; P9BE: vperm v3, v5, v0, v3
210 ; P9BE: vabsduw v3, v4, v3
211 ; P9BE: vabsduw v2, v1, v2
212 ; P9BE: vadduwm v2, v2, v3
196 ; P9BE: addis r3, r2,
197 ; P9BE: addi r3, r3,
198 ; P9BE: lxvx v4, 0, r3
199 ; P9BE: addis r3, r2,
200 ; P9BE: addi r3, r3,
201 ; P9BE: xxlor v2, vs0, vs0
202 ; P9BE: lfd f0, 0(r4)
203 ; P9BE: lxvx v0, 0, r3
204 ; P9BE: xxlxor v3, v3, v3
205 ; P9BE: xxlor v1, vs0, vs0
206 ; P9BE: vperm v5, v3, v2, v4
207 ; P9BE: vperm v2, v3, v2, v0
208 ; P9BE: vperm v0, v3, v1, v0
209 ; P9BE: vperm v3, v3, v1, v4
210 ; P9BE: vabsduw v2, v2, v0
211 ; P9BE: vabsduw v3, v5, v3
212 ; P9BE: vadduwm v2, v3, v2
213213 ; P9BE: xxswapd v3, v2
214214 ; P9BE: vadduwm v2, v2, v3
215215 ; P9BE: xxspltw v3, v2, 1
6464 ; P9LE: # %bb.0:
6565 ; P9LE-NEXT: lfiwzx f0, 0, r3
6666 ; P9LE-NEXT: lfiwzx f1, 0, r4
67 ; P9LE-NEXT: mr r3, r5
6867 ; P9LE-NEXT: xxpermdi vs0, f0, f0, 2
6968 ; P9LE-NEXT: xxpermdi vs1, f1, f1, 2
7069 ; P9LE-NEXT: xvsubsp vs0, vs0, vs1
7170 ; P9LE-NEXT: xxsldwi vs0, vs0, vs0, 3
7271 ; P9LE-NEXT: xscvspdpn f0, vs0
72 ; P9LE-NEXT: mr r3, r5
7373 ; P9LE-NEXT: stfs f0, 0(r5)
7474 ; P9LE-NEXT: blr
7575
7777 ; P9BE: # %bb.0:
7878 ; P9BE-NEXT: lfiwzx f0, 0, r3
7979 ; P9BE-NEXT: lfiwzx f1, 0, r4
80 ; P9BE-NEXT: mr r3, r5
8180 ; P9BE-NEXT: xxsldwi vs0, f0, f0, 1
8281 ; P9BE-NEXT: xxsldwi vs1, f1, f1, 1
8382 ; P9BE-NEXT: xvsubsp vs0, vs0, vs1
8483 ; P9BE-NEXT: xscvspdpn f0, vs0
84 ; P9BE-NEXT: mr r3, r5
8585 ; P9BE-NEXT: stfs f0, 0(r5)
8686 ; P9BE-NEXT: blr
8787
171171 ; P9LE-LABEL: s2v_test_f2:
172172 ; P9LE: # %bb.0: # %entry
173173 ; P9LE-NEXT: addi r3, r3, 4
174 ; P9LE-NEXT: xxspltw v2, v2, 2
175 ; P9LE-NEXT: lfiwzx f0, 0, r3
174 ; P9LE-DAG: xxspltw v2, v2, 2
175 ; P9LE-DAG: lfiwzx f0, 0, r3
176176 ; P9LE-NEXT: xxpermdi v3, f0, f0, 2
177177 ; P9LE-NEXT: vmrglw v2, v2, v3
178178 ; P9LE-NEXT: blr
180180 ; P9BE-LABEL: s2v_test_f2:
181181 ; P9BE: # %bb.0: # %entry
182182 ; P9BE: addi r3, r3, 4
183 ; P9BE: xxspltw v2, v2, 1
184 ; P9BE: lfiwzx f0, 0, r3
183 ; P9BE-DAG: xxspltw v2, v2, 1
184 ; P9BE-DAG: lfiwzx f0, 0, r3
185185 ; P9BE-NEXT: xxsldwi v3, f0, f0, 1
186186 ; P9BE: vmrghw v2, v3, v2
187187 ; P9BE-NEXT: blr
215215 ; P9LE-LABEL: s2v_test_f3:
216216 ; P9LE: # %bb.0: # %entry
217217 ; P9LE-NEXT: sldi r4, r7, 2
218 ; P9LE-NEXT: xxspltw v2, v2, 2
219218 ; P9LE-NEXT: lfiwzx f0, r3, r4
220 ; P9LE-NEXT: xxpermdi v3, f0, f0, 2
219 ; P9LE-DAG: xxspltw v2, v2, 2
220 ; P9LE-DAG: xxpermdi v3, f0, f0, 2
221221 ; P9LE-NEXT: vmrglw v2, v2, v3
222222 ; P9LE-NEXT: blr
223223
224224 ; P9BE-LABEL: s2v_test_f3:
225225 ; P9BE: # %bb.0: # %entry
226226 ; P9BE: sldi r4, r7, 2
227 ; P9BE: xxspltw v2, v2, 1
228227 ; P9BE: lfiwzx f0, r3, r4
229 ; P9BE-NEXT: xxsldwi v3, f0, f0, 1
228 ; P9BE-DAG: xxspltw v2, v2, 1
229 ; P9BE-DAG: xxsldwi v3, f0, f0, 1
230230 ; P9BE: vmrghw v2, v3, v2
231231 ; P9BE-NEXT: blr
232232
260260 ; P9LE-LABEL: s2v_test_f4:
261261 ; P9LE: # %bb.0: # %entry
262262 ; P9LE-NEXT: addi r3, r3, 4
263 ; P9LE-NEXT: xxspltw v2, v2, 2
264263 ; P9LE-NEXT: lfiwzx f0, 0, r3
265 ; P9LE-NEXT: xxpermdi v3, f0, f0, 2
264 ; P9LE-DAG: xxspltw v2, v2, 2
265 ; P9LE-DAG: xxpermdi v3, f0, f0, 2
266266 ; P9LE-NEXT: vmrglw v2, v2, v3
267267 ; P9LE-NEXT: blr
268268
269269 ; P9BE-LABEL: s2v_test_f4:
270270 ; P9BE: # %bb.0: # %entry
271271 ; P9BE: addi r3, r3, 4
272 ; P9BE: xxspltw v2, v2, 1
273272 ; P9BE: lfiwzx f0, 0, r3
274 ; P9BE-NEXT: xxsldwi v3, f0, f0, 1
273 ; P9BE-DAG: xxspltw v2, v2, 1
274 ; P9BE-DAG: xxsldwi v3, f0, f0, 1
275275 ; P9BE: vmrghw v2, v3, v2
276276 ; P9BE-NEXT: blr
277277
295295
296296 ; CHECK-LABEL: spConv2sdw_x
297297 ; CHECK: lfs [[LD:[0-9]+]], 0(3)
298 ; CHECK-NEXT: sldi [[REG:[0-9]+]], 5, 3
299 ; CHECK-NEXT: xscvdpsxds [[CONV:[0-9]+]], [[LD]]
298 ; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 3
299 ; CHECK-DAG: xscvdpsxds [[CONV:[0-9]+]], [[LD]]
300300 ; CHECK-NEXT: stxsdx [[CONV]], 4, [[REG]]
301301 ; CHECK-NEXT: blr
302302
321321
322322 ; CHECK-LABEL: spConv2sw_x
323323 ; CHECK: lfs [[LD:[0-9]+]], 0(3)
324 ; CHECK-NEXT: sldi [[REG:[0-9]+]], 5, 2
325 ; CHECK-NEXT: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
324 ; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 2
325 ; CHECK-DAG: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
326326 ; CHECK-NEXT: stfiwx [[CONV]], 4, [[REG]]
327327 ; CHECK-NEXT: blr
328328
347347
348348 ; CHECK-LABEL: spConv2shw_x
349349 ; CHECK: lfs [[LD:[0-9]+]], 0(3)
350 ; CHECK: sldi [[REG:[0-9]+]], 5, 1
351 ; CHECK: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
350 ; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 1
351 ; CHECK-DAG: xscvdpsxws [[CONV:[0-9]+]], [[LD]]
352352 ; CHECK-NEXT: stxsihx [[CONV]], 4, [[REG]]
353353 ; CHECK-NEXT: blr
354354
679679
680680 ; CHECK-LABEL: spConv2udw_x
681681 ; CHECK: lfs [[LD:[0-9]+]], 0(3)
682 ; CHECK-NEXT: sldi [[REG:[0-9]+]], 5, 3
683 ; CHECK-NEXT: xscvdpuxds [[CONV:[0-9]+]], [[LD]]
682 ; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 3
683 ; CHECK-DAG: xscvdpuxds [[CONV:[0-9]+]], [[LD]]
684684 ; CHECK-NEXT: stxsdx [[CONV]], 4, [[REG]]
685685 ; CHECK-NEXT: blr
686686
705705
706706 ; CHECK-LABEL: spConv2uw_x
707707 ; CHECK: lfs [[LD:[0-9]+]], 0(3)
708 ; CHECK-NEXT: sldi [[REG:[0-9]+]], 5, 2
709 ; CHECK-NEXT: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
708 ; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 2
709 ; CHECK-DAG: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
710710 ; CHECK-NEXT: stfiwx [[CONV]], 4, [[REG]]
711711 ; CHECK-NEXT: blr
712712
731731
732732 ; CHECK-LABEL: spConv2uhw_x
733733 ; CHECK: lfs [[LD:[0-9]+]], 0(3)
734 ; CHECK: sldi [[REG:[0-9]+]], 5, 1
735 ; CHECK: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
734 ; CHECK-DAG: sldi [[REG:[0-9]+]], 5, 1
735 ; CHECK-DAG: xscvdpuxws [[CONV:[0-9]+]], [[LD]]
736736 ; CHECK-NEXT: stxsihx [[CONV]], 4, [[REG]]
737737 ; CHECK-NEXT: blr
738738
1010 ; Function Attrs: norecurse nounwind writeonly
1111 define void @initCombList(%0* nocapture, i32 signext) local_unnamed_addr #0 {
1212 ; CHECK-LABEL: initCombList:
13 ; CHECK: addi 3, 3, -8
14 ; CHECK-NEXT: stwu 5, 64(4)
13 ; CHECK: addi 4, 4, -8
14 ; CHECK: stwu 5, 64(3)
1515
1616 ; CHECK-ITIN-LABEL: initCombList:
1717 ; CHECK-ITIN: stwu 5, 64(4)
88
99 ; RUN: llc -relocation-model=pic -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu -O3 \
1010 ; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names -verify-machineinstrs \
11 ; RUN: -mattr=-power9-vector < %s | FileCheck %s
11 ; RUN: -mattr=-power9-vector < %s | FileCheck %s --check-prefix=CHECK-P9-NOVECTOR
1212
1313 ; These tests verify that VSX swap optimization works when loading a scalar
1414 ; into a vector register.
3030 ; CHECK: stxvd2x vs0, 0, r3
3131 ; CHECK: blr
3232 ;
33 ; CHECK-P9-NOVECTOR-LABEL: bar0:
34 ; CHECK-P9-NOVECTOR: # %bb.0: # %entry
35 ; CHECK-P9-NOVECTOR: addis r3, r2, .LC0@toc@ha
36 ; CHECK-P9-NOVECTOR: ld r3, .LC0@toc@l(r3)
37 ; CHECK-P9-NOVECTOR: addis r3, r2, .LC1@toc@ha
38 ; CHECK-P9-NOVECTOR: addis r3, r2, .LC2@toc@ha
39 ; CHECK-P9-NOVECTOR: ld r3, .LC2@toc@l(r3)
40 ; CHECK-P9-NOVECTOR: xxpermdi vs0, vs1, vs0, 1
41 ; CHECK-P9-NOVECTOR: stxvd2x vs0, 0, r3
42 ; CHECK-P9-NOVECTOR: blr
43 ;
3344 ; CHECK-P9-LABEL: bar0:
3445 ; CHECK-P9: # %bb.0: # %entry
3546 ; CHECK-P9: addis r3, r2, .LC0@toc@ha
36 ; CHECK-P9: addis r4, r2, .LC1@toc@ha
3747 ; CHECK-P9: ld r3, .LC0@toc@l(r3)
38 ; CHECK-P9: ld r4, .LC1@toc@l(r4)
39 ; CHECK-P9: lfd f0, 0(r3)
40 ; CHECK-P9: lxvx vs1, 0, r4
48 ; CHECK-P9: lxvx vs0, 0, r3
49 ; CHECK-P9: addis r3, r2, .LC1@toc@ha
50 ; CHECK-P9: ld r3, .LC1@toc@l(r3)
51 ; CHECK-P9: lfd f1, 0(r3)
4152 ; CHECK-P9: addis r3, r2, .LC2@toc@ha
4253 ; CHECK-P9: ld r3, .LC2@toc@l(r3)
43 ; CHECK-P9: xxpermdi vs0, f0, f0, 2
44 ; CHECK-P9: xxpermdi vs0, vs1, vs0, 1
54 ; CHECK-P9: xxpermdi vs1, f1, f1, 2
55 ; CHECK-P9: xxpermdi vs0, vs0, vs1, 1
4556 ; CHECK-P9: stxvx vs0, 0, r3
4657 ; CHECK-P9: blr
4758 entry:
6475 ; CHECK: stxvd2x vs0, 0, r3
6576 ; CHECK: blr
6677 ;
78 ; CHECK-P9-NOVECTOR-LABEL: bar1:
79 ; CHECK-P9-NOVECTOR: # %bb.0: # %entry
80 ; CHECK-P9-NOVECTOR: addis r3, r2, .LC0@toc@ha
81 ; CHECK-P9-NOVECTOR: ld r3, .LC0@toc@l(r3)
82 ; CHECK-P9-NOVECTOR: addis r3, r2, .LC1@toc@ha
83 ; CHECK-P9-NOVECTOR: addis r3, r2, .LC2@toc@ha
84 ; CHECK-P9-NOVECTOR: ld r3, .LC2@toc@l(r3)
85 ; CHECK-P9-NOVECTOR: xxmrghd vs0, vs0, vs1
86 ; CHECK-P9-NOVECTOR: stxvd2x vs0, 0, r3
87 ; CHECK-P9-NOVECTOR: blr
88 ;
6789 ; CHECK-P9-LABEL: bar1:
6890 ; CHECK-P9: # %bb.0: # %entry
6991 ; CHECK-P9: addis r3, r2, .LC0@toc@ha
70 ; CHECK-P9: addis r4, r2, .LC1@toc@ha
7192 ; CHECK-P9: ld r3, .LC0@toc@l(r3)
72 ; CHECK-P9: ld r4, .LC1@toc@l(r4)
73 ; CHECK-P9: lfd f0, 0(r3)
74 ; CHECK-P9: lxvx vs1, 0, r4
93 ; CHECK-P9: lxvx vs0, 0, r3
94 ; CHECK-P9: addis r3, r2, .LC1@toc@ha
95 ; CHECK-P9: ld r3, .LC1@toc@l(r3)
96 ; CHECK-P9: lfd f1, 0(r3)
7597 ; CHECK-P9: addis r3, r2, .LC2@toc@ha
7698 ; CHECK-P9: ld r3, .LC2@toc@l(r3)
77 ; CHECK-P9: xxpermdi vs0, f0, f0, 2
78 ; CHECK-P9: xxmrgld vs0, vs0, vs1
99 ; CHECK-P9: xxpermdi vs1, f1, f1, 2
100 ; CHECK-P9: xxmrgld vs0, vs1, vs0
79101 ; CHECK-P9: stxvx vs0, 0, r3
80102 ; CHECK-P9: blr
81103 entry:
1515 ret void
1616 ; CHECK-P9-LABEL: @test8
1717 ; CHECK-P9: vperm
18 ; CHECK-P9: vperm
19 ; CHECK-P9: vperm
18 ; CHECK-P9: xvcvuxddp
2019 ; CHECK-P9: vperm
2120 ; CHECK-P9: xvcvuxddp
21 ; CHECK-P9: vperm
2222 ; CHECK-P9: xvcvuxddp
23 ; CHECK-P9: xvcvuxddp
23 ; CHECK-P9: vperm
2424 ; CHECK-P9: xvcvuxddp
2525 ; CHECK-P8-LABEL: @test8
2626 ; CHECK-P8: vperm
4141 ret void
4242 ; CHECK-P9-LABEL: @test4
4343 ; CHECK-P9: vperm
44 ; CHECK-P9: xvcvuxddp
4445 ; CHECK-P9: vperm
45 ; CHECK-P9: xvcvuxddp
4646 ; CHECK-P9: xvcvuxddp
4747 ; CHECK-P8-LABEL: @test4
4848 ; CHECK-P8: vperm
112112 ret void
113113 ; CHECK-P9-LABEL: @stest8
114114 ; CHECK-P9: vperm
115 ; CHECK-P9: vperm
116 ; CHECK-P9: vperm
115 ; CHECK-P9: vextsh2d
116 ; CHECK-P9: xvcvsxddp
117117 ; CHECK-P9: vperm
118118 ; CHECK-P9: vextsh2d
119 ; CHECK-P9: vextsh2d
120 ; CHECK-P9: vextsh2d
119 ; CHECK-P9: xvcvsxddp
120 ; CHECK-P9: vperm
121121 ; CHECK-P9: vextsh2d
122122 ; CHECK-P9: xvcvsxddp
123 ; CHECK-P9: xvcvsxddp
124 ; CHECK-P9: xvcvsxddp
123 ; CHECK-P9: vperm
124 ; CHECK-P9: vextsh2d
125125 ; CHECK-P9: xvcvsxddp
126126 }
127127
133133 ret void
134134 ; CHECK-P9-LABEL: @stest4
135135 ; CHECK-P9: vperm
136 ; CHECK-P9: vextsh2d
137 ; CHECK-P9: xvcvsxddp
136138 ; CHECK-P9: vperm
137139 ; CHECK-P9: vextsh2d
138 ; CHECK-P9: vextsh2d
139 ; CHECK-P9: xvcvsxddp
140140 ; CHECK-P9: xvcvsxddp
141141 }
142142
3535 ; CHECK-P9-NEXT: xxswapd v2, vs0
3636 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
3737 ; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
38 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
3938 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
4039 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
41 ; CHECK-P9-NEXT: mfvsrwz r4, f0
40 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
4241 ; CHECK-P9-NEXT: mfvsrwz r3, f1
43 ; CHECK-P9-NEXT: mtvsrd f1, r4
42 ; CHECK-P9-NEXT: mtvsrd f1, r3
43 ; CHECK-P9-NEXT: mfvsrwz r3, f0
4444 ; CHECK-P9-NEXT: mtvsrd f0, r3
45 ; CHECK-P9-NEXT: xxswapd v3, vs1
45 ; CHECK-P9-NEXT: xxswapd v2, vs1
46 ; CHECK-P9-NEXT: xxswapd v3, vs0
47 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
4648 ; CHECK-P9-NEXT: li r3, 0
47 ; CHECK-P9-NEXT: xxswapd v2, vs0
48 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
4949 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
5050 ; CHECK-P9-NEXT: blr
5151 ;
5252 ; CHECK-BE-LABEL: test2elt:
5353 ; CHECK-BE: # %bb.0: # %entry
5454 ; CHECK-BE-NEXT: mtvsrd f0, r3
55 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 1
55 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
56 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
57 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
5658 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
57 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
58 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
59 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
59 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
60 ; CHECK-BE-NEXT: mfvsrwz r3, f1
61 ; CHECK-BE-NEXT: sldi r3, r3, 48
62 ; CHECK-BE-NEXT: mtvsrd v2, r3
6063 ; CHECK-BE-NEXT: mfvsrwz r3, f0
6164 ; CHECK-BE-NEXT: sldi r3, r3, 48
62 ; CHECK-BE-NEXT: mfvsrwz r4, f1
63 ; CHECK-BE-NEXT: mtvsrd v2, r3
65 ; CHECK-BE-NEXT: mtvsrd v3, r3
6466 ; CHECK-BE-NEXT: li r3, 0
65 ; CHECK-BE-NEXT: sldi r4, r4, 48
66 ; CHECK-BE-NEXT: mtvsrd v3, r4
6767 ; CHECK-BE-NEXT: vmrghh v2, v2, v3
6868 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
6969 ; CHECK-BE-NEXT: blr
110110 ; CHECK-P9-LABEL: test4elt:
111111 ; CHECK-P9: # %bb.0: # %entry
112112 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
113 ; CHECK-P9-NEXT: xxswapd vs1, v2
114 ; CHECK-P9-NEXT: xxsldwi vs2, v2, v2, 1
115 ; CHECK-P9-NEXT: xscvspdpn f3, v2
116 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
117 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
118 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
119 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
120 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
121 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
122 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
123 ; CHECK-P9-NEXT: mfvsrwz r5, f3
113 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
114 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
124115 ; CHECK-P9-NEXT: mfvsrwz r3, f0
125 ; CHECK-P9-NEXT: mfvsrwz r4, f1
126 ; CHECK-P9-NEXT: mfvsrwz r6, f2
127 ; CHECK-P9-NEXT: mtvsrd f2, r5
128116 ; CHECK-P9-NEXT: mtvsrd f0, r3
129 ; CHECK-P9-NEXT: mtvsrd f1, r4
130 ; CHECK-P9-NEXT: mtvsrd f3, r6
131 ; CHECK-P9-NEXT: xxswapd v4, vs2
117 ; CHECK-P9-NEXT: xxswapd v3, vs0
118 ; CHECK-P9-NEXT: xxswapd vs0, v2
119 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
120 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
121 ; CHECK-P9-NEXT: mfvsrwz r3, f0
122 ; CHECK-P9-NEXT: mtvsrd f0, r3
123 ; CHECK-P9-NEXT: xxswapd v4, vs0
124 ; CHECK-P9-NEXT: xscvspdpn f0, v2
125 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
126 ; CHECK-P9-NEXT: mfvsrwz r3, f0
127 ; CHECK-P9-NEXT: mtvsrd f0, r3
128 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
129 ; CHECK-P9-NEXT: xxswapd v4, vs0
130 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1
131 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
132 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
133 ; CHECK-P9-NEXT: mfvsrwz r3, f0
134 ; CHECK-P9-NEXT: mtvsrd f0, r3
132135 ; CHECK-P9-NEXT: xxswapd v2, vs0
133 ; CHECK-P9-NEXT: xxswapd v3, vs1
134 ; CHECK-P9-NEXT: xxswapd v5, vs3
135 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
136 ; CHECK-P9-NEXT: vmrglh v3, v4, v5
137 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
136 ; CHECK-P9-NEXT: vmrglh v2, v4, v2
137 ; CHECK-P9-NEXT: vmrglw v2, v2, v3
138138 ; CHECK-P9-NEXT: mfvsrld r3, v2
139139 ; CHECK-P9-NEXT: blr
140140 ;
141141 ; CHECK-BE-LABEL: test4elt:
142142 ; CHECK-BE: # %bb.0: # %entry
143143 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3
144 ; CHECK-BE-NEXT: xxswapd vs1, v2
145 ; CHECK-BE-NEXT: xxsldwi vs2, v2, v2, 1
146 ; CHECK-BE-NEXT: xscvspdpn f3, v2
147144 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
148 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
149 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
150 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
151 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
152 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
153 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
154 ; CHECK-BE-NEXT: mfvsrwz r5, f3
155 ; CHECK-BE-NEXT: sldi r5, r5, 48
145 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
156146 ; CHECK-BE-NEXT: mfvsrwz r3, f0
157 ; CHECK-BE-NEXT: mfvsrwz r4, f1
158 ; CHECK-BE-NEXT: mfvsrwz r6, f2
159 ; CHECK-BE-NEXT: mtvsrd v4, r5
160 ; CHECK-BE-NEXT: sldi r3, r3, 48
161 ; CHECK-BE-NEXT: sldi r4, r4, 48
162 ; CHECK-BE-NEXT: sldi r6, r6, 48
147 ; CHECK-BE-NEXT: xxswapd vs0, v2
148 ; CHECK-BE-NEXT: sldi r3, r3, 48
149 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
150 ; CHECK-BE-NEXT: mtvsrd v3, r3
151 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
152 ; CHECK-BE-NEXT: mfvsrwz r3, f0
153 ; CHECK-BE-NEXT: xscvspdpn f0, v2
154 ; CHECK-BE-NEXT: sldi r3, r3, 48
155 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
156 ; CHECK-BE-NEXT: mtvsrd v4, r3
157 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
158 ; CHECK-BE-NEXT: mfvsrwz r3, f0
159 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1
160 ; CHECK-BE-NEXT: sldi r3, r3, 48
161 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
162 ; CHECK-BE-NEXT: mtvsrd v4, r3
163 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
164 ; CHECK-BE-NEXT: mfvsrwz r3, f0
165 ; CHECK-BE-NEXT: sldi r3, r3, 48
163166 ; CHECK-BE-NEXT: mtvsrd v2, r3
164 ; CHECK-BE-NEXT: mtvsrd v3, r4
165 ; CHECK-BE-NEXT: mtvsrd v5, r6
166 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
167 ; CHECK-BE-NEXT: vmrghh v3, v4, v5
168 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
167 ; CHECK-BE-NEXT: vmrghh v2, v4, v2
168 ; CHECK-BE-NEXT: vmrghw v2, v2, v3
169169 ; CHECK-BE-NEXT: mfvsrd r3, v2
170170 ; CHECK-BE-NEXT: blr
171171 entry:
237237 ;
238238 ; CHECK-P9-LABEL: test8elt:
239239 ; CHECK-P9: # %bb.0: # %entry
240 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
241240 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
242241 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
243 ; CHECK-P9-NEXT: xxswapd vs3, vs1
244 ; CHECK-P9-NEXT: xxsldwi vs4, vs1, vs1, 1
245 ; CHECK-P9-NEXT: xxsldwi vs5, vs0, vs0, 3
246 ; CHECK-P9-NEXT: xxswapd vs6, vs0
247 ; CHECK-P9-NEXT: xxsldwi vs7, vs0, vs0, 1
242 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
243 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
244 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
245 ; CHECK-P9-NEXT: mfvsrwz r3, f2
246 ; CHECK-P9-NEXT: mtvsrd f2, r3
247 ; CHECK-P9-NEXT: xxswapd v2, vs2
248 ; CHECK-P9-NEXT: xxswapd vs2, vs1
249 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
250 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
251 ; CHECK-P9-NEXT: mfvsrwz r3, f2
252 ; CHECK-P9-NEXT: mtvsrd f2, r3
253 ; CHECK-P9-NEXT: xxswapd v3, vs2
254 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
255 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
248256 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
249 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
250 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
251 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
252 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
253 ; CHECK-P9-NEXT: xscvspdpn f5, vs5
254 ; CHECK-P9-NEXT: xscvspdpn f6, vs6
255 ; CHECK-P9-NEXT: xscvspdpn f7, vs7
257 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
256258 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
257 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
258 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
259 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
260 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
261 ; CHECK-P9-NEXT: xscvdpsxws f5, f5
262 ; CHECK-P9-NEXT: xscvdpsxws f6, f6
263 ; CHECK-P9-NEXT: xscvdpsxws f7, f7
264 ; CHECK-P9-NEXT: mfvsrwz r5, f1
265 ; CHECK-P9-NEXT: mfvsrwz r9, f0
266259 ; CHECK-P9-NEXT: mfvsrwz r3, f2
267 ; CHECK-P9-NEXT: mfvsrwz r4, f3
268 ; CHECK-P9-NEXT: mfvsrwz r6, f4
269 ; CHECK-P9-NEXT: mfvsrwz r7, f5
270 ; CHECK-P9-NEXT: mfvsrwz r8, f6
271 ; CHECK-P9-NEXT: mfvsrwz r10, f7
272 ; CHECK-P9-NEXT: mtvsrd f2, r5
273 ; CHECK-P9-NEXT: mtvsrd f6, r9
260 ; CHECK-P9-NEXT: mtvsrd f2, r3
261 ; CHECK-P9-NEXT: mfvsrwz r3, f1
262 ; CHECK-P9-NEXT: mtvsrd f1, r3
263 ; CHECK-P9-NEXT: xxswapd v4, vs1
264 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
265 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
266 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
267 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
268 ; CHECK-P9-NEXT: xxswapd v3, vs2
269 ; CHECK-P9-NEXT: vmrglh v3, v3, v4
270 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
271 ; CHECK-P9-NEXT: mfvsrwz r3, f1
272 ; CHECK-P9-NEXT: mtvsrd f1, r3
273 ; CHECK-P9-NEXT: xxswapd v3, vs1
274 ; CHECK-P9-NEXT: xxswapd vs1, vs0
275 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
276 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
277 ; CHECK-P9-NEXT: mfvsrwz r3, f1
278 ; CHECK-P9-NEXT: mtvsrd f1, r3
279 ; CHECK-P9-NEXT: xxswapd v4, vs1
280 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
281 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
282 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
283 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
284 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
285 ; CHECK-P9-NEXT: mfvsrwz r3, f1
286 ; CHECK-P9-NEXT: mtvsrd f1, r3
287 ; CHECK-P9-NEXT: mfvsrwz r3, f0
274288 ; CHECK-P9-NEXT: mtvsrd f0, r3
275 ; CHECK-P9-NEXT: mtvsrd f1, r4
276 ; CHECK-P9-NEXT: mtvsrd f3, r6
277 ; CHECK-P9-NEXT: mtvsrd f4, r7
278 ; CHECK-P9-NEXT: mtvsrd f5, r8
279 ; CHECK-P9-NEXT: mtvsrd f7, r10
280 ; CHECK-P9-NEXT: xxswapd v4, vs2
281 ; CHECK-P9-NEXT: xxswapd v6, vs6
282 ; CHECK-P9-NEXT: xxswapd v2, vs0
283 ; CHECK-P9-NEXT: xxswapd v3, vs1
284 ; CHECK-P9-NEXT: xxswapd v5, vs3
285 ; CHECK-P9-NEXT: xxswapd v0, vs4
286 ; CHECK-P9-NEXT: xxswapd v1, vs5
287 ; CHECK-P9-NEXT: xxswapd v7, vs7
288 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
289 ; CHECK-P9-NEXT: vmrglh v3, v4, v5
290 ; CHECK-P9-NEXT: vmrglh v4, v1, v0
291 ; CHECK-P9-NEXT: vmrglh v5, v6, v7
292 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
293 ; CHECK-P9-NEXT: vmrglw v3, v5, v4
289 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
290 ; CHECK-P9-NEXT: xxswapd v4, vs1
291 ; CHECK-P9-NEXT: xxswapd v5, vs0
292 ; CHECK-P9-NEXT: vmrglh v4, v4, v5
293 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
294294 ; CHECK-P9-NEXT: xxmrgld v2, v3, v2
295295 ; CHECK-P9-NEXT: blr
296296 ;
297297 ; CHECK-BE-LABEL: test8elt:
298298 ; CHECK-BE: # %bb.0: # %entry
299 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
300299 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
301300 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
302 ; CHECK-BE-NEXT: xxswapd vs3, vs1
303 ; CHECK-BE-NEXT: xxsldwi vs4, vs1, vs1, 1
304 ; CHECK-BE-NEXT: xxsldwi vs5, vs0, vs0, 3
305 ; CHECK-BE-NEXT: xxswapd vs6, vs0
306 ; CHECK-BE-NEXT: xxsldwi vs7, vs0, vs0, 1
307 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
301 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
302 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
303 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
304 ; CHECK-BE-NEXT: mfvsrwz r3, f2
305 ; CHECK-BE-NEXT: xxswapd vs2, vs1
306 ; CHECK-BE-NEXT: sldi r3, r3, 48
307 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
308 ; CHECK-BE-NEXT: mtvsrd v2, r3
309 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
310 ; CHECK-BE-NEXT: mfvsrwz r3, f2
311 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
312 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
313 ; CHECK-BE-NEXT: sldi r3, r3, 48
314 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
315 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
316 ; CHECK-BE-NEXT: mtvsrd v3, r3
317 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
318 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
319 ; CHECK-BE-NEXT: mfvsrwz r3, f2
320 ; CHECK-BE-NEXT: sldi r3, r3, 48
321 ; CHECK-BE-NEXT: mtvsrd v3, r3
322 ; CHECK-BE-NEXT: mfvsrwz r3, f1
323 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
324 ; CHECK-BE-NEXT: sldi r3, r3, 48
325 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
326 ; CHECK-BE-NEXT: mtvsrd v4, r3
327 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
328 ; CHECK-BE-NEXT: mfvsrwz r3, f1
329 ; CHECK-BE-NEXT: xxswapd vs1, vs0
330 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
331 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
332 ; CHECK-BE-NEXT: vmrghh v3, v3, v4
333 ; CHECK-BE-NEXT: sldi r3, r3, 48
334 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
335 ; CHECK-BE-NEXT: mtvsrd v3, r3
336 ; CHECK-BE-NEXT: mfvsrwz r3, f1
337 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
338 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
339 ; CHECK-BE-NEXT: sldi r3, r3, 48
340 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
308341 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
309 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
310 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
311 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
312 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
313 ; CHECK-BE-NEXT: xscvspdpn f6, vs6
314 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
315 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
316 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
317 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
318 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
319 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
320 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
321 ; CHECK-BE-NEXT: xscvdpsxws f6, f6
322 ; CHECK-BE-NEXT: xscvdpsxws f7, f7
323 ; CHECK-BE-NEXT: mfvsrwz r5, f1
324 ; CHECK-BE-NEXT: mfvsrwz r9, f0
325 ; CHECK-BE-NEXT: sldi r5, r5, 48
326 ; CHECK-BE-NEXT: sldi r9, r9, 48
327 ; CHECK-BE-NEXT: mfvsrwz r3, f2
328 ; CHECK-BE-NEXT: mfvsrwz r4, f3
329 ; CHECK-BE-NEXT: mfvsrwz r6, f4
330 ; CHECK-BE-NEXT: mfvsrwz r7, f5
331 ; CHECK-BE-NEXT: mfvsrwz r8, f6
332 ; CHECK-BE-NEXT: mfvsrwz r10, f7
333 ; CHECK-BE-NEXT: mtvsrd v4, r5
334 ; CHECK-BE-NEXT: mtvsrd v6, r9
335 ; CHECK-BE-NEXT: sldi r3, r3, 48
336 ; CHECK-BE-NEXT: sldi r4, r4, 48
337 ; CHECK-BE-NEXT: sldi r6, r6, 48
338 ; CHECK-BE-NEXT: sldi r7, r7, 48
339 ; CHECK-BE-NEXT: sldi r8, r8, 48
340 ; CHECK-BE-NEXT: sldi r10, r10, 48
341 ; CHECK-BE-NEXT: mtvsrd v2, r3
342 ; CHECK-BE-NEXT: mtvsrd v3, r4
343 ; CHECK-BE-NEXT: mtvsrd v5, r6
344 ; CHECK-BE-NEXT: mtvsrd v0, r7
345 ; CHECK-BE-NEXT: mtvsrd v1, r8
346 ; CHECK-BE-NEXT: mtvsrd v7, r10
347 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
348 ; CHECK-BE-NEXT: vmrghh v3, v4, v5
349 ; CHECK-BE-NEXT: vmrghh v4, v1, v0
350 ; CHECK-BE-NEXT: vmrghh v5, v6, v7
351 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
352 ; CHECK-BE-NEXT: vmrghw v3, v5, v4
342 ; CHECK-BE-NEXT: mtvsrd v4, r3
343 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
344 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
345 ; CHECK-BE-NEXT: mfvsrwz r3, f1
346 ; CHECK-BE-NEXT: sldi r3, r3, 48
347 ; CHECK-BE-NEXT: mtvsrd v4, r3
348 ; CHECK-BE-NEXT: mfvsrwz r3, f0
349 ; CHECK-BE-NEXT: sldi r3, r3, 48
350 ; CHECK-BE-NEXT: mtvsrd v5, r3
351 ; CHECK-BE-NEXT: vmrghh v4, v4, v5
352 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
353353 ; CHECK-BE-NEXT: xxmrghd v2, v3, v2
354354 ; CHECK-BE-NEXT: blr
355355 entry:
480480 ;
481481 ; CHECK-P9-LABEL: test16elt:
482482 ; CHECK-P9: # %bb.0: # %entry
483 ; CHECK-P9-NEXT: lxv vs2, 16(r4)
484 ; CHECK-P9-NEXT: lxv vs3, 0(r4)
485 ; CHECK-P9-NEXT: lxv vs0, 48(r4)
486 ; CHECK-P9-NEXT: lxv vs1, 32(r4)
487 ; CHECK-P9-NEXT: std r25, -56(r1) # 8-byte Folded Spill
488 ; CHECK-P9-NEXT: std r26, -48(r1) # 8-byte Folded Spill
489 ; CHECK-P9-NEXT: std r27, -40(r1) # 8-byte Folded Spill
490 ; CHECK-P9-NEXT: std r28, -32(r1) # 8-byte Folded Spill
491 ; CHECK-P9-NEXT: std r29, -24(r1) # 8-byte Folded Spill
492 ; CHECK-P9-NEXT: std r30, -16(r1) # 8-byte Folded Spill
493 ; CHECK-P9-NEXT: xxsldwi vs4, vs3, vs3, 3
494 ; CHECK-P9-NEXT: xxswapd vs5, vs3
495 ; CHECK-P9-NEXT: xxsldwi vs6, vs3, vs3, 1
496 ; CHECK-P9-NEXT: xxsldwi vs7, vs2, vs2, 3
497 ; CHECK-P9-NEXT: xxswapd vs8, vs2
498 ; CHECK-P9-NEXT: xxsldwi vs9, vs2, vs2, 1
499 ; CHECK-P9-NEXT: xxsldwi vs10, vs1, vs1, 3
500 ; CHECK-P9-NEXT: xxswapd vs11, vs1
501 ; CHECK-P9-NEXT: xxsldwi vs12, vs1, vs1, 1
502 ; CHECK-P9-NEXT: xxsldwi vs13, vs0, vs0, 3
503 ; CHECK-P9-NEXT: xxswapd v2, vs0
504 ; CHECK-P9-NEXT: xxsldwi v3, vs0, vs0, 1
483 ; CHECK-P9-NEXT: lxv vs1, 0(r4)
484 ; CHECK-P9-NEXT: lxv vs3, 16(r4)
485 ; CHECK-P9-NEXT: xscvspdpn f5, vs1
486 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
487 ; CHECK-P9-NEXT: xscvspdpn f8, vs3
488 ; CHECK-P9-NEXT: xxswapd vs4, vs1
489 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
490 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
491 ; CHECK-P9-NEXT: xscvdpsxws f5, f5
492 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
493 ; CHECK-P9-NEXT: xscvdpsxws f8, f8
494 ; CHECK-P9-NEXT: xxsldwi vs6, vs3, vs3, 3
495 ; CHECK-P9-NEXT: xxswapd vs7, vs3
496 ; CHECK-P9-NEXT: xscvspdpn f6, vs6
497 ; CHECK-P9-NEXT: xxsldwi vs3, vs3, vs3, 1
498 ; CHECK-P9-NEXT: xscvspdpn f7, vs7
505499 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
506 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
500 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
507501 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
508 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
509 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
510 ; CHECK-P9-NEXT: xscvspdpn f5, vs5
511 ; CHECK-P9-NEXT: xscvspdpn f6, vs6
512 ; CHECK-P9-NEXT: xscvspdpn f7, vs7
513 ; CHECK-P9-NEXT: xscvspdpn f8, vs8
502 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
503 ; CHECK-P9-NEXT: xscvdpsxws f6, f6
504 ; CHECK-P9-NEXT: mfvsrwz r5, f5
505 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
506 ; CHECK-P9-NEXT: xscvdpsxws f7, f7
507 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
508 ; CHECK-P9-NEXT: mtvsrd f5, r5
509 ; CHECK-P9-NEXT: mfvsrwz r5, f8
510 ; CHECK-P9-NEXT: mtvsrd f8, r5
511 ; CHECK-P9-NEXT: mfvsrwz r5, f2
512 ; CHECK-P9-NEXT: lxv vs0, 32(r4)
513 ; CHECK-P9-NEXT: xxsldwi vs9, vs0, vs0, 3
514 ; CHECK-P9-NEXT: xxswapd vs10, vs0
514515 ; CHECK-P9-NEXT: xscvspdpn f9, vs9
515516 ; CHECK-P9-NEXT: xscvspdpn f10, vs10
516 ; CHECK-P9-NEXT: xscvspdpn f11, vs11
517 ; CHECK-P9-NEXT: xscvspdpn f12, vs12
518 ; CHECK-P9-NEXT: xscvspdpn f13, vs13
519 ; CHECK-P9-NEXT: xscvspdpn v2, v2
520 ; CHECK-P9-NEXT: xscvspdpn v3, v3
521 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
522 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
523 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
524 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
525 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
526 ; CHECK-P9-NEXT: xscvdpsxws f5, f5
527 ; CHECK-P9-NEXT: xscvdpsxws f6, f6
528 ; CHECK-P9-NEXT: xscvdpsxws f7, f7
529 ; CHECK-P9-NEXT: xscvdpsxws f8, f8
530517 ; CHECK-P9-NEXT: xscvdpsxws f9, f9
531518 ; CHECK-P9-NEXT: xscvdpsxws f10, f10
532 ; CHECK-P9-NEXT: xscvdpsxws f11, f11
533 ; CHECK-P9-NEXT: xscvdpsxws f12, f12
534 ; CHECK-P9-NEXT: xscvdpsxws f13, f13
535 ; CHECK-P9-NEXT: xscvdpsxws v2, v2
536 ; CHECK-P9-NEXT: xscvdpsxws v3, v3
537 ; CHECK-P9-NEXT: mfvsrwz r4, f3
538 ; CHECK-P9-NEXT: mfvsrwz r5, f2
539 ; CHECK-P9-NEXT: mfvsrwz r12, f1
540 ; CHECK-P9-NEXT: mfvsrwz r0, f0
541 ; CHECK-P9-NEXT: mfvsrwz r6, f4
542 ; CHECK-P9-NEXT: mfvsrwz r7, f5
543 ; CHECK-P9-NEXT: mfvsrwz r8, f6
544 ; CHECK-P9-NEXT: mfvsrwz r9, f7
545 ; CHECK-P9-NEXT: mfvsrwz r10, f8
546 ; CHECK-P9-NEXT: mfvsrwz r11, f9
547 ; CHECK-P9-NEXT: mfvsrwz r30, f10
548 ; CHECK-P9-NEXT: mfvsrwz r29, f11
549 ; CHECK-P9-NEXT: mfvsrwz r28, f12
550 ; CHECK-P9-NEXT: mfvsrwz r27, f13
551 ; CHECK-P9-NEXT: mfvsrwz r26, v2
552 ; CHECK-P9-NEXT: mfvsrwz r25, v3
519 ; CHECK-P9-NEXT: mtvsrd f2, r5
520 ; CHECK-P9-NEXT: mfvsrwz r5, f4
521 ; CHECK-P9-NEXT: mtvsrd f4, r5
522 ; CHECK-P9-NEXT: mfvsrwz r5, f1
523 ; CHECK-P9-NEXT: mtvsrd f1, r5
524 ; CHECK-P9-NEXT: mfvsrwz r5, f6
525 ; CHECK-P9-NEXT: xxswapd v2, vs2
526 ; CHECK-P9-NEXT: xxswapd v3, vs4
527 ; CHECK-P9-NEXT: xscvspdpn f2, vs0
528 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
529 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
530 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
531 ; CHECK-P9-NEXT: mtvsrd f6, r5
532 ; CHECK-P9-NEXT: mfvsrwz r5, f7
533 ; CHECK-P9-NEXT: xxswapd v4, vs1
534 ; CHECK-P9-NEXT: lxv vs1, 48(r4)
535 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
536 ; CHECK-P9-NEXT: xxswapd v3, vs5
537 ; CHECK-P9-NEXT: mtvsrd f7, r5
538 ; CHECK-P9-NEXT: mfvsrwz r5, f3
539 ; CHECK-P9-NEXT: vmrglh v3, v3, v4
540 ; CHECK-P9-NEXT: xxswapd v4, vs6
541 ; CHECK-P9-NEXT: xxswapd v5, vs7
542 ; CHECK-P9-NEXT: mtvsrd f3, r5
543 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
544 ; CHECK-P9-NEXT: xxswapd v0, vs3
545 ; CHECK-P9-NEXT: vmrglh v4, v5, v4
546 ; CHECK-P9-NEXT: xxswapd v5, vs8
547 ; CHECK-P9-NEXT: vmrglh v5, v5, v0
548 ; CHECK-P9-NEXT: mfvsrwz r4, f2
549 ; CHECK-P9-NEXT: mtvsrd f2, r4
550 ; CHECK-P9-NEXT: mfvsrwz r4, f0
551 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
553552 ; CHECK-P9-NEXT: mtvsrd f0, r4
554 ; CHECK-P9-NEXT: mtvsrd f1, r5
555 ; CHECK-P9-NEXT: mtvsrd f8, r12
556 ; CHECK-P9-NEXT: mtvsrd f9, r0
557 ; CHECK-P9-NEXT: mtvsrd f2, r6
558 ; CHECK-P9-NEXT: mtvsrd f3, r7
559 ; CHECK-P9-NEXT: mtvsrd f4, r8
560 ; CHECK-P9-NEXT: mtvsrd f5, r9
561 ; CHECK-P9-NEXT: mtvsrd f6, r10
562 ; CHECK-P9-NEXT: mtvsrd f7, r11
563 ; CHECK-P9-NEXT: mtvsrd f10, r30
564 ; CHECK-P9-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
565 ; CHECK-P9-NEXT: mtvsrd f11, r29
566 ; CHECK-P9-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
567 ; CHECK-P9-NEXT: mtvsrd f12, r28
568 ; CHECK-P9-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
569 ; CHECK-P9-NEXT: mtvsrd f13, r27
570 ; CHECK-P9-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
571 ; CHECK-P9-NEXT: mtvsrd v2, r26
572 ; CHECK-P9-NEXT: ld r26, -48(r1) # 8-byte Folded Reload
573 ; CHECK-P9-NEXT: mtvsrd v3, r25
574 ; CHECK-P9-NEXT: ld r25, -56(r1) # 8-byte Folded Reload
553 ; CHECK-P9-NEXT: vmrglw v3, v5, v4
554 ; CHECK-P9-NEXT: xxswapd v4, vs2
555 ; CHECK-P9-NEXT: xxmrgld vs2, v3, v2
556 ; CHECK-P9-NEXT: xxswapd v2, vs0
557 ; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 3
558 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
559 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
560 ; CHECK-P9-NEXT: mfvsrwz r4, f0
561 ; CHECK-P9-NEXT: mtvsrd f0, r4
562 ; CHECK-P9-NEXT: xxswapd v3, vs0
563 ; CHECK-P9-NEXT: xxswapd vs0, vs1
564 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
565 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
566 ; CHECK-P9-NEXT: mfvsrwz r4, f0
567 ; CHECK-P9-NEXT: mtvsrd f0, r4
568 ; CHECK-P9-NEXT: vmrglh v2, v4, v2
575569 ; CHECK-P9-NEXT: xxswapd v4, vs0
576 ; CHECK-P9-NEXT: xxswapd v5, vs2
577 ; CHECK-P9-NEXT: xxswapd v0, vs3
578 ; CHECK-P9-NEXT: xxswapd v1, vs4
579 ; CHECK-P9-NEXT: xxswapd v6, vs5
580 ; CHECK-P9-NEXT: xxswapd v7, vs6
581 ; CHECK-P9-NEXT: xxswapd v8, vs1
582 ; CHECK-P9-NEXT: xxswapd v9, vs7
583 ; CHECK-P9-NEXT: xxswapd v10, vs10
584 ; CHECK-P9-NEXT: xxswapd v11, vs11
585 ; CHECK-P9-NEXT: xxswapd v12, vs8
586 ; CHECK-P9-NEXT: xxswapd v13, vs12
587 ; CHECK-P9-NEXT: xxswapd v14, vs13
588 ; CHECK-P9-NEXT: xxswapd v2, v2
589 ; CHECK-P9-NEXT: xxswapd v15, vs9
590 ; CHECK-P9-NEXT: xxswapd v3, v3
591 ; CHECK-P9-NEXT: vmrglh v5, v0, v5
592 ; CHECK-P9-NEXT: vmrglh v4, v4, v1
593 ; CHECK-P9-NEXT: vmrglh v0, v7, v6
594 ; CHECK-P9-NEXT: vmrglh v1, v8, v9
595 ; CHECK-P9-NEXT: vmrglh v6, v11, v10
596 ; CHECK-P9-NEXT: vmrglh v7, v12, v13
597 ; CHECK-P9-NEXT: vmrglh v2, v2, v14
598 ; CHECK-P9-NEXT: vmrglh v3, v15, v3
599 ; CHECK-P9-NEXT: vmrglw v4, v4, v5
600 ; CHECK-P9-NEXT: vmrglw v5, v1, v0
601 ; CHECK-P9-NEXT: vmrglw v0, v7, v6
602 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
603 ; CHECK-P9-NEXT: xxmrgld vs0, v5, v4
604 ; CHECK-P9-NEXT: xxmrgld vs1, v2, v0
605 ; CHECK-P9-NEXT: stxv vs0, 0(r3)
606 ; CHECK-P9-NEXT: stxv vs1, 16(r3)
570 ; CHECK-P9-NEXT: xscvspdpn f0, vs1
571 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
572 ; CHECK-P9-NEXT: mfvsrwz r4, f0
573 ; CHECK-P9-NEXT: mtvsrd f0, r4
574 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
575 ; CHECK-P9-NEXT: xxswapd v4, vs0
576 ; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 1
577 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
578 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
579 ; CHECK-P9-NEXT: mfvsrwz r5, f9
580 ; CHECK-P9-NEXT: mtvsrd f9, r5
581 ; CHECK-P9-NEXT: mfvsrwz r5, f10
582 ; CHECK-P9-NEXT: mtvsrd f10, r5
583 ; CHECK-P9-NEXT: xxswapd v0, vs9
584 ; CHECK-P9-NEXT: xxswapd v1, vs10
585 ; CHECK-P9-NEXT: vmrglh v0, v1, v0
586 ; CHECK-P9-NEXT: vmrglw v2, v2, v0
587 ; CHECK-P9-NEXT: stxv vs2, 0(r3)
588 ; CHECK-P9-NEXT: mfvsrwz r4, f0
589 ; CHECK-P9-NEXT: mtvsrd f0, r4
590 ; CHECK-P9-NEXT: xxswapd v5, vs0
591 ; CHECK-P9-NEXT: vmrglh v4, v4, v5
592 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
593 ; CHECK-P9-NEXT: xxmrgld vs0, v3, v2
594 ; CHECK-P9-NEXT: stxv vs0, 16(r3)
607595 ; CHECK-P9-NEXT: blr
608596 ;
609597 ; CHECK-BE-LABEL: test16elt:
610598 ; CHECK-BE: # %bb.0: # %entry
611 ; CHECK-BE-NEXT: lxv vs2, 0(r4)
612 ; CHECK-BE-NEXT: lxv vs3, 16(r4)
599 ; CHECK-BE-NEXT: lxv vs1, 16(r4)
600 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
601 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
602 ; CHECK-BE-NEXT: xxswapd vs3, vs1
603 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
604 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
605 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
606 ; CHECK-BE-NEXT: mfvsrwz r5, f2
607 ; CHECK-BE-NEXT: xscvspdpn f4, vs1
608 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
609 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
610 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
611 ; CHECK-BE-NEXT: sldi r5, r5, 48
612 ; CHECK-BE-NEXT: mtvsrd v2, r5
613 ; CHECK-BE-NEXT: mfvsrwz r5, f3
614 ; CHECK-BE-NEXT: xscvdpsxws f3, f4
615 ; CHECK-BE-NEXT: lxv vs0, 0(r4)
616 ; CHECK-BE-NEXT: xxsldwi vs2, vs0, vs0, 3
617 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
618 ; CHECK-BE-NEXT: sldi r5, r5, 48
619 ; CHECK-BE-NEXT: mtvsrd v3, r5
620 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
621 ; CHECK-BE-NEXT: mfvsrwz r5, f3
622 ; CHECK-BE-NEXT: sldi r5, r5, 48
623 ; CHECK-BE-NEXT: mtvsrd v3, r5
624 ; CHECK-BE-NEXT: mfvsrwz r5, f1
625 ; CHECK-BE-NEXT: xxswapd vs1, vs0
626 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
627 ; CHECK-BE-NEXT: sldi r5, r5, 48
628 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
629 ; CHECK-BE-NEXT: mtvsrd v4, r5
630 ; CHECK-BE-NEXT: mfvsrwz r5, f2
631 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
632 ; CHECK-BE-NEXT: sldi r5, r5, 48
633 ; CHECK-BE-NEXT: vmrghh v3, v3, v4
634 ; CHECK-BE-NEXT: mtvsrd v4, r5
635 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
636 ; CHECK-BE-NEXT: mfvsrwz r5, f1
637 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
638 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
639 ; CHECK-BE-NEXT: sldi r5, r5, 48
640 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
641 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
642 ; CHECK-BE-NEXT: mtvsrd v5, r5
643 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
644 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
645 ; CHECK-BE-NEXT: mfvsrwz r5, f1
646 ; CHECK-BE-NEXT: lxv vs1, 48(r4)
647 ; CHECK-BE-NEXT: sldi r5, r5, 48
648 ; CHECK-BE-NEXT: mtvsrd v5, r5
649 ; CHECK-BE-NEXT: mfvsrwz r5, f0
613650 ; CHECK-BE-NEXT: lxv vs0, 32(r4)
614 ; CHECK-BE-NEXT: lxv vs1, 48(r4)
615 ; CHECK-BE-NEXT: std r25, -56(r1) # 8-byte Folded Spill
616 ; CHECK-BE-NEXT: std r26, -48(r1) # 8-byte Folded Spill
617 ; CHECK-BE-NEXT: std r27, -40(r1) # 8-byte Folded Spill
618 ; CHECK-BE-NEXT: std r28, -32(r1) # 8-byte Folded Spill
619 ; CHECK-BE-NEXT: std r29, -24(r1) # 8-byte Folded Spill
620 ; CHECK-BE-NEXT: std r30, -16(r1) # 8-byte Folded Spill
621 ; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
622 ; CHECK-BE-NEXT: xxswapd vs5, vs3
623 ; CHECK-BE-NEXT: xxsldwi vs6, vs3, vs3, 1
624 ; CHECK-BE-NEXT: xxsldwi vs7, vs2, vs2, 3
625 ; CHECK-BE-NEXT: xxswapd vs8, vs2
626 ; CHECK-BE-NEXT: xxsldwi vs9, vs2, vs2, 1
627 ; CHECK-BE-NEXT: xxsldwi vs10, vs1, vs1, 3
628 ; CHECK-BE-NEXT: xxswapd vs11, vs1
629 ; CHECK-BE-NEXT: xxsldwi vs12, vs1, vs1, 1
630 ; CHECK-BE-NEXT: xxsldwi vs13, vs0, vs0, 3
631 ; CHECK-BE-NEXT: xxswapd v2, vs0
632 ; CHECK-BE-NEXT: xxsldwi v3, vs0, vs0, 1
651 ; CHECK-BE-NEXT: xscvspdpn f5, vs1
652 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
653 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
654 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
655 ; CHECK-BE-NEXT: sldi r5, r5, 48
656 ; CHECK-BE-NEXT: xxswapd vs3, vs1
657 ; CHECK-BE-NEXT: mtvsrd v0, r5
658 ; CHECK-BE-NEXT: vmrghh v5, v5, v0
633659 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
634 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
635 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
660 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
661 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
662 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
663 ; CHECK-BE-NEXT: vmrghw v3, v5, v4
664 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
665 ; CHECK-BE-NEXT: mfvsrwz r4, f5
666 ; CHECK-BE-NEXT: xxmrghd vs4, v3, v2
667 ; CHECK-BE-NEXT: sldi r4, r4, 48
668 ; CHECK-BE-NEXT: mtvsrd v2, r4
669 ; CHECK-BE-NEXT: mfvsrwz r4, f2
670 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
671 ; CHECK-BE-NEXT: stxv vs4, 0(r3)
672 ; CHECK-BE-NEXT: sldi r4, r4, 48
673 ; CHECK-BE-NEXT: mtvsrd v3, r4
674 ; CHECK-BE-NEXT: mfvsrwz r4, f3
675 ; CHECK-BE-NEXT: sldi r4, r4, 48
676 ; CHECK-BE-NEXT: mtvsrd v4, r4
677 ; CHECK-BE-NEXT: mfvsrwz r4, f1
678 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
679 ; CHECK-BE-NEXT: sldi r4, r4, 48
680 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
681 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
682 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
683 ; CHECK-BE-NEXT: mtvsrd v4, r4
684 ; CHECK-BE-NEXT: mfvsrwz r4, f1
685 ; CHECK-BE-NEXT: xxswapd vs1, vs0
686 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
687 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
688 ; CHECK-BE-NEXT: vmrghh v2, v2, v4
689 ; CHECK-BE-NEXT: sldi r4, r4, 48
690 ; CHECK-BE-NEXT: vmrghw v2, v2, v3
691 ; CHECK-BE-NEXT: mtvsrd v3, r4
692 ; CHECK-BE-NEXT: mfvsrwz r4, f1
693 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
694 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
695 ; CHECK-BE-NEXT: sldi r4, r4, 48
696 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
636697 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
637 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
638 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
639 ; CHECK-BE-NEXT: xscvspdpn f6, vs6
640 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
641 ; CHECK-BE-NEXT: xscvspdpn f8, vs8
642 ; CHECK-BE-NEXT: xscvspdpn f9, vs9
643 ; CHECK-BE-NEXT: xscvspdpn f10, vs10
644 ; CHECK-BE-NEXT: xscvspdpn f11, vs11
645 ; CHECK-BE-NEXT: xscvspdpn f12, vs12
646 ; CHECK-BE-NEXT: xscvspdpn f13, vs13
647 ; CHECK-BE-NEXT: xscvspdpn v2, v2
648 ; CHECK-BE-NEXT: xscvspdpn v3, v3
649 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
650 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
651 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
652 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
653 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
654 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
655 ; CHECK-BE-NEXT: xscvdpsxws f6, f6
656 ; CHECK-BE-NEXT: xscvdpsxws f7, f7
657 ; CHECK-BE-NEXT: xscvdpsxws f8, f8
658 ; CHECK-BE-NEXT: xscvdpsxws f9, f9
659 ; CHECK-BE-NEXT: xscvdpsxws f10, f10
660 ; CHECK-BE-NEXT: xscvdpsxws f11, f11
661 ; CHECK-BE-NEXT: xscvdpsxws f12, f12
662 ; CHECK-BE-NEXT: xscvdpsxws f13, f13
663 ; CHECK-BE-NEXT: xscvdpsxws v2, v2
664 ; CHECK-BE-NEXT: xscvdpsxws v3, v3
665 ; CHECK-BE-NEXT: mfvsrwz r4, f3
666 ; CHECK-BE-NEXT: mfvsrwz r5, f2
667 ; CHECK-BE-NEXT: mfvsrwz r12, f1
668 ; CHECK-BE-NEXT: mfvsrwz r0, f0
669 ; CHECK-BE-NEXT: mfvsrwz r6, f4
670 ; CHECK-BE-NEXT: mfvsrwz r7, f5
671 ; CHECK-BE-NEXT: mfvsrwz r8, f6
672 ; CHECK-BE-NEXT: mfvsrwz r9, f7
673 ; CHECK-BE-NEXT: mfvsrwz r10, f8
674 ; CHECK-BE-NEXT: mfvsrwz r11, f9
675 ; CHECK-BE-NEXT: mfvsrwz r30, f10
676 ; CHECK-BE-NEXT: mfvsrwz r29, f11
677 ; CHECK-BE-NEXT: mfvsrwz r28, f12
678 ; CHECK-BE-NEXT: mfvsrwz r27, f13
679 ; CHECK-BE-NEXT: mfvsrwz r26, v2
680 ; CHECK-BE-NEXT: mfvsrwz r25, v3
681 ; CHECK-BE-NEXT: sldi r4, r4, 48
682 ; CHECK-BE-NEXT: sldi r5, r5, 48
683 ; CHECK-BE-NEXT: sldi r12, r12, 48
684 ; CHECK-BE-NEXT: sldi r0, r0, 48
685 ; CHECK-BE-NEXT: sldi r6, r6, 48
686 ; CHECK-BE-NEXT: sldi r7, r7, 48
687 ; CHECK-BE-NEXT: sldi r8, r8, 48
688 ; CHECK-BE-NEXT: sldi r9, r9, 48
689 ; CHECK-BE-NEXT: sldi r10, r10, 48
690 ; CHECK-BE-NEXT: sldi r11, r11, 48
691 ; CHECK-BE-NEXT: sldi r30, r30, 48
692 ; CHECK-BE-NEXT: sldi r29, r29, 48
693 ; CHECK-BE-NEXT: sldi r28, r28, 48
694 ; CHECK-BE-NEXT: sldi r27, r27, 48
695 ; CHECK-BE-NEXT: sldi r26, r26, 48
696 ; CHECK-BE-NEXT: sldi r25, r25, 48
697 ; CHECK-BE-NEXT: mtvsrd v2, r4
698 ; CHECK-BE-NEXT: mtvsrd v3, r5
699 ; CHECK-BE-NEXT: mtvsrd v10, r12
700 ; CHECK-BE-NEXT: mtvsrd v14, r0
701 ; CHECK-BE-NEXT: mtvsrd v4, r6
702 ; CHECK-BE-NEXT: mtvsrd v5, r7
703 ; CHECK-BE-NEXT: mtvsrd v0, r8
704 ; CHECK-BE-NEXT: mtvsrd v1, r9
705 ; CHECK-BE-NEXT: mtvsrd v6, r10
706 ; CHECK-BE-NEXT: mtvsrd v7, r11
707 ; CHECK-BE-NEXT: mtvsrd v8, r30
708 ; CHECK-BE-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
709 ; CHECK-BE-NEXT: mtvsrd v9, r29
710 ; CHECK-BE-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
711 ; CHECK-BE-NEXT: mtvsrd v11, r28
712 ; CHECK-BE-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
713 ; CHECK-BE-NEXT: mtvsrd v12, r27
714 ; CHECK-BE-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
715 ; CHECK-BE-NEXT: mtvsrd v13, r26
716 ; CHECK-BE-NEXT: ld r26, -48(r1) # 8-byte Folded Reload
717 ; CHECK-BE-NEXT: mtvsrd v15, r25
718 ; CHECK-BE-NEXT: ld r25, -56(r1) # 8-byte Folded Reload
719 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
720 ; CHECK-BE-NEXT: vmrghh v2, v2, v0
721 ; CHECK-BE-NEXT: vmrghh v5, v6, v1
722 ; CHECK-BE-NEXT: vmrghh v3, v3, v7
723 ; CHECK-BE-NEXT: vmrghh v0, v9, v8
724 ; CHECK-BE-NEXT: vmrghh v1, v10, v11
725 ; CHECK-BE-NEXT: vmrghh v6, v13, v12
726 ; CHECK-BE-NEXT: vmrghh v7, v14, v15
727 ; CHECK-BE-NEXT: vmrghw v2, v2, v4
728 ; CHECK-BE-NEXT: vmrghw v3, v3, v5
729 ; CHECK-BE-NEXT: vmrghw v4, v1, v0
730 ; CHECK-BE-NEXT: vmrghw v5, v7, v6
698 ; CHECK-BE-NEXT: mtvsrd v4, r4
699 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
700 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
701 ; CHECK-BE-NEXT: mfvsrwz r4, f1
702 ; CHECK-BE-NEXT: sldi r4, r4, 48
703 ; CHECK-BE-NEXT: mtvsrd v4, r4
704 ; CHECK-BE-NEXT: mfvsrwz r4, f0
705 ; CHECK-BE-NEXT: sldi r4, r4, 48
706 ; CHECK-BE-NEXT: mtvsrd v5, r4
707 ; CHECK-BE-NEXT: vmrghh v4, v4, v5
708 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
731709 ; CHECK-BE-NEXT: xxmrghd vs0, v3, v2
732 ; CHECK-BE-NEXT: xxmrghd vs1, v5, v4
733 ; CHECK-BE-NEXT: stxv vs0, 0(r3)
734 ; CHECK-BE-NEXT: stxv vs1, 16(r3)
710 ; CHECK-BE-NEXT: stxv vs0, 16(r3)
735711 ; CHECK-BE-NEXT: blr
736712 entry:
737713 %a = load <16 x float>, <16 x float>* %0, align 64
767743 ; CHECK-P9-NEXT: xxswapd v2, vs0
768744 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
769745 ; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
770 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
771746 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
772747 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
773 ; CHECK-P9-NEXT: mfvsrwz r4, f0
748 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
774749 ; CHECK-P9-NEXT: mfvsrwz r3, f1
775 ; CHECK-P9-NEXT: mtvsrd f1, r4
750 ; CHECK-P9-NEXT: mtvsrd f1, r3
751 ; CHECK-P9-NEXT: mfvsrwz r3, f0
776752 ; CHECK-P9-NEXT: mtvsrd f0, r3
777 ; CHECK-P9-NEXT: xxswapd v3, vs1
753 ; CHECK-P9-NEXT: xxswapd v2, vs1
754 ; CHECK-P9-NEXT: xxswapd v3, vs0
755 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
778756 ; CHECK-P9-NEXT: li r3, 0
779 ; CHECK-P9-NEXT: xxswapd v2, vs0
780 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
781757 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
782758 ; CHECK-P9-NEXT: blr
783759 ;
784760 ; CHECK-BE-LABEL: test2elt_signed:
785761 ; CHECK-BE: # %bb.0: # %entry
786762 ; CHECK-BE-NEXT: mtvsrd f0, r3
787 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 1
763 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
764 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
765 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
788766 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
789 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
790 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
791 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
767 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
768 ; CHECK-BE-NEXT: mfvsrwz r3, f1
769 ; CHECK-BE-NEXT: sldi r3, r3, 48
770 ; CHECK-BE-NEXT: mtvsrd v2, r3
792771 ; CHECK-BE-NEXT: mfvsrwz r3, f0
793772 ; CHECK-BE-NEXT: sldi r3, r3, 48
794 ; CHECK-BE-NEXT: mfvsrwz r4, f1
795 ; CHECK-BE-NEXT: mtvsrd v2, r3
773 ; CHECK-BE-NEXT: mtvsrd v3, r3
796774 ; CHECK-BE-NEXT: li r3, 0
797 ; CHECK-BE-NEXT: sldi r4, r4, 48
798 ; CHECK-BE-NEXT: mtvsrd v3, r4
799775 ; CHECK-BE-NEXT: vmrghh v2, v2, v3
800776 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
801777 ; CHECK-BE-NEXT: blr
842818 ; CHECK-P9-LABEL: test4elt_signed:
843819 ; CHECK-P9: # %bb.0: # %entry
844820 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
845 ; CHECK-P9-NEXT: xxswapd vs1, v2
846 ; CHECK-P9-NEXT: xxsldwi vs2, v2, v2, 1
847 ; CHECK-P9-NEXT: xscvspdpn f3, v2
848 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
849 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
850 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
851 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
852 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
853 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
854 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
855 ; CHECK-P9-NEXT: mfvsrwz r5, f3
821 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
822 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
856823 ; CHECK-P9-NEXT: mfvsrwz r3, f0
857 ; CHECK-P9-NEXT: mfvsrwz r4, f1
858 ; CHECK-P9-NEXT: mfvsrwz r6, f2
859 ; CHECK-P9-NEXT: mtvsrd f2, r5
860824 ; CHECK-P9-NEXT: mtvsrd f0, r3
861 ; CHECK-P9-NEXT: mtvsrd f1, r4
862 ; CHECK-P9-NEXT: mtvsrd f3, r6
863 ; CHECK-P9-NEXT: xxswapd v4, vs2
825 ; CHECK-P9-NEXT: xxswapd v3, vs0
826 ; CHECK-P9-NEXT: xxswapd vs0, v2
827 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
828 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
829 ; CHECK-P9-NEXT: mfvsrwz r3, f0
830 ; CHECK-P9-NEXT: mtvsrd f0, r3
831 ; CHECK-P9-NEXT: xxswapd v4, vs0
832 ; CHECK-P9-NEXT: xscvspdpn f0, v2
833 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
834 ; CHECK-P9-NEXT: mfvsrwz r3, f0
835 ; CHECK-P9-NEXT: mtvsrd f0, r3
836 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
837 ; CHECK-P9-NEXT: xxswapd v4, vs0
838 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1
839 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
840 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
841 ; CHECK-P9-NEXT: mfvsrwz r3, f0
842 ; CHECK-P9-NEXT: mtvsrd f0, r3
864843 ; CHECK-P9-NEXT: xxswapd v2, vs0
865 ; CHECK-P9-NEXT: xxswapd v3, vs1
866 ; CHECK-P9-NEXT: xxswapd v5, vs3
867 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
868 ; CHECK-P9-NEXT: vmrglh v3, v4, v5
869 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
844 ; CHECK-P9-NEXT: vmrglh v2, v4, v2
845 ; CHECK-P9-NEXT: vmrglw v2, v2, v3
870846 ; CHECK-P9-NEXT: mfvsrld r3, v2
871847 ; CHECK-P9-NEXT: blr
872848 ;
873849 ; CHECK-BE-LABEL: test4elt_signed:
874850 ; CHECK-BE: # %bb.0: # %entry
875851 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3
876 ; CHECK-BE-NEXT: xxswapd vs1, v2
877 ; CHECK-BE-NEXT: xxsldwi vs2, v2, v2, 1
878 ; CHECK-BE-NEXT: xscvspdpn f3, v2
879852 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
880 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
881 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
882 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
883 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
884 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
885 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
886 ; CHECK-BE-NEXT: mfvsrwz r5, f3
887 ; CHECK-BE-NEXT: sldi r5, r5, 48
853 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
888854 ; CHECK-BE-NEXT: mfvsrwz r3, f0
889 ; CHECK-BE-NEXT: mfvsrwz r4, f1
890 ; CHECK-BE-NEXT: mfvsrwz r6, f2
891 ; CHECK-BE-NEXT: mtvsrd v4, r5
892 ; CHECK-BE-NEXT: sldi r3, r3, 48
893 ; CHECK-BE-NEXT: sldi r4, r4, 48
894 ; CHECK-BE-NEXT: sldi r6, r6, 48
855 ; CHECK-BE-NEXT: xxswapd vs0, v2
856 ; CHECK-BE-NEXT: sldi r3, r3, 48
857 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
858 ; CHECK-BE-NEXT: mtvsrd v3, r3
859 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
860 ; CHECK-BE-NEXT: mfvsrwz r3, f0
861 ; CHECK-BE-NEXT: xscvspdpn f0, v2
862 ; CHECK-BE-NEXT: sldi r3, r3, 48
863 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
864 ; CHECK-BE-NEXT: mtvsrd v4, r3
865 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
866 ; CHECK-BE-NEXT: mfvsrwz r3, f0
867 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1
868 ; CHECK-BE-NEXT: sldi r3, r3, 48
869 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
870 ; CHECK-BE-NEXT: mtvsrd v4, r3
871 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
872 ; CHECK-BE-NEXT: mfvsrwz r3, f0
873 ; CHECK-BE-NEXT: sldi r3, r3, 48
895874 ; CHECK-BE-NEXT: mtvsrd v2, r3
896 ; CHECK-BE-NEXT: mtvsrd v3, r4
897 ; CHECK-BE-NEXT: mtvsrd v5, r6
898 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
899 ; CHECK-BE-NEXT: vmrghh v3, v4, v5
900 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
875 ; CHECK-BE-NEXT: vmrghh v2, v4, v2
876 ; CHECK-BE-NEXT: vmrghw v2, v2, v3
901877 ; CHECK-BE-NEXT: mfvsrd r3, v2
902878 ; CHECK-BE-NEXT: blr
903879 entry:
969945 ;
970946 ; CHECK-P9-LABEL: test8elt_signed:
971947 ; CHECK-P9: # %bb.0: # %entry
972 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
973948 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
974949 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
975 ; CHECK-P9-NEXT: xxswapd vs3, vs1
976 ; CHECK-P9-NEXT: xxsldwi vs4, vs1, vs1, 1
977 ; CHECK-P9-NEXT: xxsldwi vs5, vs0, vs0, 3
978 ; CHECK-P9-NEXT: xxswapd vs6, vs0
979 ; CHECK-P9-NEXT: xxsldwi vs7, vs0, vs0, 1
950 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
951 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
952 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
953 ; CHECK-P9-NEXT: mfvsrwz r3, f2
954 ; CHECK-P9-NEXT: mtvsrd f2, r3
955 ; CHECK-P9-NEXT: xxswapd v2, vs2
956 ; CHECK-P9-NEXT: xxswapd vs2, vs1
957 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
958 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
959 ; CHECK-P9-NEXT: mfvsrwz r3, f2
960 ; CHECK-P9-NEXT: mtvsrd f2, r3
961 ; CHECK-P9-NEXT: xxswapd v3, vs2
962 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
963 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
980964 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
981 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
982 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
983 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
984 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
985 ; CHECK-P9-NEXT: xscvspdpn f5, vs5
986 ; CHECK-P9-NEXT: xscvspdpn f6, vs6
987 ; CHECK-P9-NEXT: xscvspdpn f7, vs7
965 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
988966 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
989 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
990 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
991 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
992 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
993 ; CHECK-P9-NEXT: xscvdpsxws f5, f5
994 ; CHECK-P9-NEXT: xscvdpsxws f6, f6
995 ; CHECK-P9-NEXT: xscvdpsxws f7, f7
996 ; CHECK-P9-NEXT: mfvsrwz r5, f1
997 ; CHECK-P9-NEXT: mfvsrwz r9, f0
998967 ; CHECK-P9-NEXT: mfvsrwz r3, f2
999 ; CHECK-P9-NEXT: mfvsrwz r4, f3
1000 ; CHECK-P9-NEXT: mfvsrwz r6, f4
1001 ; CHECK-P9-NEXT: mfvsrwz r7, f5
1002 ; CHECK-P9-NEXT: mfvsrwz r8, f6
1003 ; CHECK-P9-NEXT: mfvsrwz r10, f7
1004 ; CHECK-P9-NEXT: mtvsrd f2, r5
1005 ; CHECK-P9-NEXT: mtvsrd f6, r9
968 ; CHECK-P9-NEXT: mtvsrd f2, r3
969 ; CHECK-P9-NEXT: mfvsrwz r3, f1
970 ; CHECK-P9-NEXT: mtvsrd f1, r3
971 ; CHECK-P9-NEXT: xxswapd v4, vs1
972 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
973 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
974 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
975 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
976 ; CHECK-P9-NEXT: xxswapd v3, vs2
977 ; CHECK-P9-NEXT: vmrglh v3, v3, v4
978 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
979 ; CHECK-P9-NEXT: mfvsrwz r3, f1
980 ; CHECK-P9-NEXT: mtvsrd f1, r3
981 ; CHECK-P9-NEXT: xxswapd v3, vs1
982 ; CHECK-P9-NEXT: xxswapd vs1, vs0
983 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
984 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
985 ; CHECK-P9-NEXT: mfvsrwz r3, f1
986 ; CHECK-P9-NEXT: mtvsrd f1, r3
987 ; CHECK-P9-NEXT: xxswapd v4, vs1
988 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
989 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
990 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
991 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
992 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
993 ; CHECK-P9-NEXT: mfvsrwz r3, f1
994 ; CHECK-P9-NEXT: mtvsrd f1, r3
995 ; CHECK-P9-NEXT: mfvsrwz r3, f0
1006996 ; CHECK-P9-NEXT: mtvsrd f0, r3
1007 ; CHECK-P9-NEXT: mtvsrd f1, r4
1008 ; CHECK-P9-NEXT: mtvsrd f3, r6
1009 ; CHECK-P9-NEXT: mtvsrd f4, r7
1010 ; CHECK-P9-NEXT: mtvsrd f5, r8
1011 ; CHECK-P9-NEXT: mtvsrd f7, r10
1012 ; CHECK-P9-NEXT: xxswapd v4, vs2
1013 ; CHECK-P9-NEXT: xxswapd v6, vs6
1014 ; CHECK-P9-NEXT: xxswapd v2, vs0
1015 ; CHECK-P9-NEXT: xxswapd v3, vs1
1016 ; CHECK-P9-NEXT: xxswapd v5, vs3
1017 ; CHECK-P9-NEXT: xxswapd v0, vs4
1018 ; CHECK-P9-NEXT: xxswapd v1, vs5
1019 ; CHECK-P9-NEXT: xxswapd v7, vs7
1020 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
1021 ; CHECK-P9-NEXT: vmrglh v3, v4, v5
1022 ; CHECK-P9-NEXT: vmrglh v4, v1, v0
1023 ; CHECK-P9-NEXT: vmrglh v5, v6, v7
1024 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
1025 ; CHECK-P9-NEXT: vmrglw v3, v5, v4
997 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
998 ; CHECK-P9-NEXT: xxswapd v4, vs1
999 ; CHECK-P9-NEXT: xxswapd v5, vs0
1000 ; CHECK-P9-NEXT: vmrglh v4, v4, v5
1001 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
10261002 ; CHECK-P9-NEXT: xxmrgld v2, v3, v2
10271003 ; CHECK-P9-NEXT: blr
10281004 ;
10291005 ; CHECK-BE-LABEL: test8elt_signed:
10301006 ; CHECK-BE: # %bb.0: # %entry
1031 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
10321007 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
10331008 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
1034 ; CHECK-BE-NEXT: xxswapd vs3, vs1
1035 ; CHECK-BE-NEXT: xxsldwi vs4, vs1, vs1, 1
1036 ; CHECK-BE-NEXT: xxsldwi vs5, vs0, vs0, 3
1037 ; CHECK-BE-NEXT: xxswapd vs6, vs0
1038 ; CHECK-BE-NEXT: xxsldwi vs7, vs0, vs0, 1
1039 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1009 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1010 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1011 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
1012 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1013 ; CHECK-BE-NEXT: xxswapd vs2, vs1
1014 ; CHECK-BE-NEXT: sldi r3, r3, 48
1015 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1016 ; CHECK-BE-NEXT: mtvsrd v2, r3
1017 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1018 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1019 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
1020 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
1021 ; CHECK-BE-NEXT: sldi r3, r3, 48
1022 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1023 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1024 ; CHECK-BE-NEXT: mtvsrd v3, r3
1025 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1026 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
1027 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1028 ; CHECK-BE-NEXT: sldi r3, r3, 48
1029 ; CHECK-BE-NEXT: mtvsrd v3, r3
1030 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1031 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
1032 ; CHECK-BE-NEXT: sldi r3, r3, 48
1033 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1034 ; CHECK-BE-NEXT: mtvsrd v4, r3
1035 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1036 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1037 ; CHECK-BE-NEXT: xxswapd vs1, vs0
1038 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1039 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1040 ; CHECK-BE-NEXT: vmrghh v3, v3, v4
1041 ; CHECK-BE-NEXT: sldi r3, r3, 48
1042 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
1043 ; CHECK-BE-NEXT: mtvsrd v3, r3
1044 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1045 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
1046 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
1047 ; CHECK-BE-NEXT: sldi r3, r3, 48
1048 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
10401049 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1041 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1042 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1043 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
1044 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
1045 ; CHECK-BE-NEXT: xscvspdpn f6, vs6
1046 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
1047 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1048 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1049 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1050 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1051 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1052 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
1053 ; CHECK-BE-NEXT: xscvdpsxws f6, f6
1054 ; CHECK-BE-NEXT: xscvdpsxws f7, f7
1055 ; CHECK-BE-NEXT: mfvsrwz r5, f1
1056 ; CHECK-BE-NEXT: mfvsrwz r9, f0
1057 ; CHECK-BE-NEXT: sldi r5, r5, 48
1058 ; CHECK-BE-NEXT: sldi r9, r9, 48
1059 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1060 ; CHECK-BE-NEXT: mfvsrwz r4, f3
1061 ; CHECK-BE-NEXT: mfvsrwz r6, f4
1062 ; CHECK-BE-NEXT: mfvsrwz r7, f5
1063 ; CHECK-BE-NEXT: mfvsrwz r8, f6
1064 ; CHECK-BE-NEXT: mfvsrwz r10, f7
1065 ; CHECK-BE-NEXT: mtvsrd v4, r5
1066 ; CHECK-BE-NEXT: mtvsrd v6, r9
1067 ; CHECK-BE-NEXT: sldi r3, r3, 48
1068 ; CHECK-BE-NEXT: sldi r4, r4, 48
1069 ; CHECK-BE-NEXT: sldi r6, r6, 48
1070 ; CHECK-BE-NEXT: sldi r7, r7, 48
1071 ; CHECK-BE-NEXT: sldi r8, r8, 48
1072 ; CHECK-BE-NEXT: sldi r10, r10, 48
1073 ; CHECK-BE-NEXT: mtvsrd v2, r3
1074 ; CHECK-BE-NEXT: mtvsrd v3, r4
1075 ; CHECK-BE-NEXT: mtvsrd v5, r6
1076 ; CHECK-BE-NEXT: mtvsrd v0, r7
1077 ; CHECK-BE-NEXT: mtvsrd v1, r8
1078 ; CHECK-BE-NEXT: mtvsrd v7, r10
1079 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
1080 ; CHECK-BE-NEXT: vmrghh v3, v4, v5
1081 ; CHECK-BE-NEXT: vmrghh v4, v1, v0
1082 ; CHECK-BE-NEXT: vmrghh v5, v6, v7
1083 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
1084 ; CHECK-BE-NEXT: vmrghw v3, v5, v4
1050 ; CHECK-BE-NEXT: mtvsrd v4, r3
1051 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1052 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
1053 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1054 ; CHECK-BE-NEXT: sldi r3, r3, 48
1055 ; CHECK-BE-NEXT: mtvsrd v4, r3
1056 ; CHECK-BE-NEXT: mfvsrwz r3, f0
1057 ; CHECK-BE-NEXT: sldi r3, r3, 48
1058 ; CHECK-BE-NEXT: mtvsrd v5, r3
1059 ; CHECK-BE-NEXT: vmrghh v4, v4, v5
1060 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
10851061 ; CHECK-BE-NEXT: xxmrghd v2, v3, v2
10861062 ; CHECK-BE-NEXT: blr
10871063 entry:
12121188 ;
12131189 ; CHECK-P9-LABEL: test16elt_signed:
12141190 ; CHECK-P9: # %bb.0: # %entry
1215 ; CHECK-P9-NEXT: lxv vs2, 16(r4)
1216 ; CHECK-P9-NEXT: lxv vs3, 0(r4)
1217 ; CHECK-P9-NEXT: lxv vs0, 48(r4)
1218 ; CHECK-P9-NEXT: lxv vs1, 32(r4)
1219 ; CHECK-P9-NEXT: std r25, -56(r1) # 8-byte Folded Spill
1220 ; CHECK-P9-NEXT: std r26, -48(r1) # 8-byte Folded Spill
1221 ; CHECK-P9-NEXT: std r27, -40(r1) # 8-byte Folded Spill
1222 ; CHECK-P9-NEXT: std r28, -32(r1) # 8-byte Folded Spill
1223 ; CHECK-P9-NEXT: std r29, -24(r1) # 8-byte Folded Spill
1224 ; CHECK-P9-NEXT: std r30, -16(r1) # 8-byte Folded Spill
1225 ; CHECK-P9-NEXT: xxsldwi vs4, vs3, vs3, 3
1226 ; CHECK-P9-NEXT: xxswapd vs5, vs3
1227 ; CHECK-P9-NEXT: xxsldwi vs6, vs3, vs3, 1
1228 ; CHECK-P9-NEXT: xxsldwi vs7, vs2, vs2, 3
1229 ; CHECK-P9-NEXT: xxswapd vs8, vs2
1230 ; CHECK-P9-NEXT: xxsldwi vs9, vs2, vs2, 1
1231 ; CHECK-P9-NEXT: xxsldwi vs10, vs1, vs1, 3
1232 ; CHECK-P9-NEXT: xxswapd vs11, vs1
1233 ; CHECK-P9-NEXT: xxsldwi vs12, vs1, vs1, 1
1234 ; CHECK-P9-NEXT: xxsldwi vs13, vs0, vs0, 3
1235 ; CHECK-P9-NEXT: xxswapd v2, vs0
1236 ; CHECK-P9-NEXT: xxsldwi v3, vs0, vs0, 1
1191 ; CHECK-P9-NEXT: lxv vs1, 0(r4)
1192 ; CHECK-P9-NEXT: lxv vs3, 16(r4)
1193 ; CHECK-P9-NEXT: xscvspdpn f5, vs1
1194 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
1195 ; CHECK-P9-NEXT: xscvspdpn f8, vs3
1196 ; CHECK-P9-NEXT: xxswapd vs4, vs1
1197 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
1198 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
1199 ; CHECK-P9-NEXT: xscvdpsxws f5, f5
1200 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1201 ; CHECK-P9-NEXT: xscvdpsxws f8, f8
1202 ; CHECK-P9-NEXT: xxsldwi vs6, vs3, vs3, 3
1203 ; CHECK-P9-NEXT: xxswapd vs7, vs3
1204 ; CHECK-P9-NEXT: xscvspdpn f6, vs6
1205 ; CHECK-P9-NEXT: xxsldwi vs3, vs3, vs3, 1
1206 ; CHECK-P9-NEXT: xscvspdpn f7, vs7
12371207 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1238 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1208 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
12391209 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1240 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1241 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
1242 ; CHECK-P9-NEXT: xscvspdpn f5, vs5
1243 ; CHECK-P9-NEXT: xscvspdpn f6, vs6
1244 ; CHECK-P9-NEXT: xscvspdpn f7, vs7
1245 ; CHECK-P9-NEXT: xscvspdpn f8, vs8
1210 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
1211 ; CHECK-P9-NEXT: xscvdpsxws f6, f6
1212 ; CHECK-P9-NEXT: mfvsrwz r5, f5
1213 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1214 ; CHECK-P9-NEXT: xscvdpsxws f7, f7
1215 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1216 ; CHECK-P9-NEXT: mtvsrd f5, r5
1217 ; CHECK-P9-NEXT: mfvsrwz r5, f8
1218 ; CHECK-P9-NEXT: mtvsrd f8, r5
1219 ; CHECK-P9-NEXT: mfvsrwz r5, f2
1220 ; CHECK-P9-NEXT: lxv vs0, 32(r4)
1221 ; CHECK-P9-NEXT: xxsldwi vs9, vs0, vs0, 3
1222 ; CHECK-P9-NEXT: xxswapd vs10, vs0
12461223 ; CHECK-P9-NEXT: xscvspdpn f9, vs9
12471224 ; CHECK-P9-NEXT: xscvspdpn f10, vs10
1248 ; CHECK-P9-NEXT: xscvspdpn f11, vs11
1249 ; CHECK-P9-NEXT: xscvspdpn f12, vs12
1250 ; CHECK-P9-NEXT: xscvspdpn f13, vs13
1251 ; CHECK-P9-NEXT: xscvspdpn v2, v2
1252 ; CHECK-P9-NEXT: xscvspdpn v3, v3
1253 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1254 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1255 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1256 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1257 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
1258 ; CHECK-P9-NEXT: xscvdpsxws f5, f5
1259 ; CHECK-P9-NEXT: xscvdpsxws f6, f6
1260 ; CHECK-P9-NEXT: xscvdpsxws f7, f7
1261 ; CHECK-P9-NEXT: xscvdpsxws f8, f8
12621225 ; CHECK-P9-NEXT: xscvdpsxws f9, f9
12631226 ; CHECK-P9-NEXT: xscvdpsxws f10, f10
1264 ; CHECK-P9-NEXT: xscvdpsxws f11, f11
1265 ; CHECK-P9-NEXT: xscvdpsxws f12, f12
1266 ; CHECK-P9-NEXT: xscvdpsxws f13, f13
1267 ; CHECK-P9-NEXT: xscvdpsxws v2, v2
1268 ; CHECK-P9-NEXT: xscvdpsxws v3, v3
1269 ; CHECK-P9-NEXT: mfvsrwz r4, f3
1270 ; CHECK-P9-NEXT: mfvsrwz r5, f2
1271 ; CHECK-P9-NEXT: mfvsrwz r12, f1
1272 ; CHECK-P9-NEXT: mfvsrwz r0, f0
1273 ; CHECK-P9-NEXT: mfvsrwz r6, f4
1274 ; CHECK-P9-NEXT: mfvsrwz r7, f5
1275 ; CHECK-P9-NEXT: mfvsrwz r8, f6
1276 ; CHECK-P9-NEXT: mfvsrwz r9, f7
1277 ; CHECK-P9-NEXT: mfvsrwz r10, f8
1278 ; CHECK-P9-NEXT: mfvsrwz r11, f9
1279 ; CHECK-P9-NEXT: mfvsrwz r30, f10
1280 ; CHECK-P9-NEXT: mfvsrwz r29, f11
1281 ; CHECK-P9-NEXT: mfvsrwz r28, f12
1282 ; CHECK-P9-NEXT: mfvsrwz r27, f13
1283 ; CHECK-P9-NEXT: mfvsrwz r26, v2
1284 ; CHECK-P9-NEXT: mfvsrwz r25, v3
1227 ; CHECK-P9-NEXT: mtvsrd f2, r5
1228 ; CHECK-P9-NEXT: mfvsrwz r5, f4
1229 ; CHECK-P9-NEXT: mtvsrd f4, r5
1230 ; CHECK-P9-NEXT: mfvsrwz r5, f1
1231 ; CHECK-P9-NEXT: mtvsrd f1, r5
1232 ; CHECK-P9-NEXT: mfvsrwz r5, f6
1233 ; CHECK-P9-NEXT: xxswapd v2, vs2
1234 ; CHECK-P9-NEXT: xxswapd v3, vs4
1235 ; CHECK-P9-NEXT: xscvspdpn f2, vs0
1236 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
1237 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1238 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1239 ; CHECK-P9-NEXT: mtvsrd f6, r5
1240 ; CHECK-P9-NEXT: mfvsrwz r5, f7
1241 ; CHECK-P9-NEXT: xxswapd v4, vs1
1242 ; CHECK-P9-NEXT: lxv vs1, 48(r4)
1243 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
1244 ; CHECK-P9-NEXT: xxswapd v3, vs5
1245 ; CHECK-P9-NEXT: mtvsrd f7, r5
1246 ; CHECK-P9-NEXT: mfvsrwz r5, f3
1247 ; CHECK-P9-NEXT: vmrglh v3, v3, v4
1248 ; CHECK-P9-NEXT: xxswapd v4, vs6
1249 ; CHECK-P9-NEXT: xxswapd v5, vs7
1250 ; CHECK-P9-NEXT: mtvsrd f3, r5
1251 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1252 ; CHECK-P9-NEXT: xxswapd v0, vs3
1253 ; CHECK-P9-NEXT: vmrglh v4, v5, v4
1254 ; CHECK-P9-NEXT: xxswapd v5, vs8
1255 ; CHECK-P9-NEXT: vmrglh v5, v5, v0
1256 ; CHECK-P9-NEXT: mfvsrwz r4, f2
1257 ; CHECK-P9-NEXT: mtvsrd f2, r4
1258 ; CHECK-P9-NEXT: mfvsrwz r4, f0
1259 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
12851260 ; CHECK-P9-NEXT: mtvsrd f0, r4
1286 ; CHECK-P9-NEXT: mtvsrd f1, r5
1287 ; CHECK-P9-NEXT: mtvsrd f8, r12
1288 ; CHECK-P9-NEXT: mtvsrd f9, r0
1289 ; CHECK-P9-NEXT: mtvsrd f2, r6
1290 ; CHECK-P9-NEXT: mtvsrd f3, r7
1291 ; CHECK-P9-NEXT: mtvsrd f4, r8
1292 ; CHECK-P9-NEXT: mtvsrd f5, r9
1293 ; CHECK-P9-NEXT: mtvsrd f6, r10
1294 ; CHECK-P9-NEXT: mtvsrd f7, r11
1295 ; CHECK-P9-NEXT: mtvsrd f10, r30
1296 ; CHECK-P9-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
1297 ; CHECK-P9-NEXT: mtvsrd f11, r29
1298 ; CHECK-P9-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
1299 ; CHECK-P9-NEXT: mtvsrd f12, r28
1300 ; CHECK-P9-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
1301 ; CHECK-P9-NEXT: mtvsrd f13, r27
1302 ; CHECK-P9-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
1303 ; CHECK-P9-NEXT: mtvsrd v2, r26
1304 ; CHECK-P9-NEXT: ld r26, -48(r1) # 8-byte Folded Reload
1305 ; CHECK-P9-NEXT: mtvsrd v3, r25
1306 ; CHECK-P9-NEXT: ld r25, -56(r1) # 8-byte Folded Reload
1261 ; CHECK-P9-NEXT: vmrglw v3, v5, v4
1262 ; CHECK-P9-NEXT: xxswapd v4, vs2
1263 ; CHECK-P9-NEXT: xxmrgld vs2, v3, v2
1264 ; CHECK-P9-NEXT: xxswapd v2, vs0
1265 ; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 3
1266 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1267 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1268 ; CHECK-P9-NEXT: mfvsrwz r4, f0
1269 ; CHECK-P9-NEXT: mtvsrd f0, r4
1270 ; CHECK-P9-NEXT: xxswapd v3, vs0
1271 ; CHECK-P9-NEXT: xxswapd vs0, vs1
1272 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1273 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1274 ; CHECK-P9-NEXT: mfvsrwz r4, f0
1275 ; CHECK-P9-NEXT: mtvsrd f0, r4
1276 ; CHECK-P9-NEXT: vmrglh v2, v4, v2
13071277 ; CHECK-P9-NEXT: xxswapd v4, vs0
1308 ; CHECK-P9-NEXT: xxswapd v5, vs2
1309 ; CHECK-P9-NEXT: xxswapd v0, vs3
1310 ; CHECK-P9-NEXT: xxswapd v1, vs4
1311 ; CHECK-P9-NEXT: xxswapd v6, vs5
1312 ; CHECK-P9-NEXT: xxswapd v7, vs6
1313 ; CHECK-P9-NEXT: xxswapd v8, vs1
1314 ; CHECK-P9-NEXT: xxswapd v9, vs7
1315 ; CHECK-P9-NEXT: xxswapd v10, vs10
1316 ; CHECK-P9-NEXT: xxswapd v11, vs11
1317 ; CHECK-P9-NEXT: xxswapd v12, vs8
1318 ; CHECK-P9-NEXT: xxswapd v13, vs12
1319 ; CHECK-P9-NEXT: xxswapd v14, vs13
1320 ; CHECK-P9-NEXT: xxswapd v2, v2
1321 ; CHECK-P9-NEXT: xxswapd v15, vs9
1322 ; CHECK-P9-NEXT: xxswapd v3, v3
1323 ; CHECK-P9-NEXT: vmrglh v5, v0, v5
1324 ; CHECK-P9-NEXT: vmrglh v4, v4, v1
1325 ; CHECK-P9-NEXT: vmrglh v0, v7, v6
1326 ; CHECK-P9-NEXT: vmrglh v1, v8, v9
1327 ; CHECK-P9-NEXT: vmrglh v6, v11, v10
1328 ; CHECK-P9-NEXT: vmrglh v7, v12, v13
1329 ; CHECK-P9-NEXT: vmrglh v2, v2, v14
1330 ; CHECK-P9-NEXT: vmrglh v3, v15, v3
1331 ; CHECK-P9-NEXT: vmrglw v4, v4, v5
1332 ; CHECK-P9-NEXT: vmrglw v5, v1, v0
1333 ; CHECK-P9-NEXT: vmrglw v0, v7, v6
1334 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
1335 ; CHECK-P9-NEXT: xxmrgld vs0, v5, v4
1336 ; CHECK-P9-NEXT: xxmrgld vs1, v2, v0
1337 ; CHECK-P9-NEXT: stxv vs0, 0(r3)
1338 ; CHECK-P9-NEXT: stxv vs1, 16(r3)
1278 ; CHECK-P9-NEXT: xscvspdpn f0, vs1
1279 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1280 ; CHECK-P9-NEXT: mfvsrwz r4, f0
1281 ; CHECK-P9-NEXT: mtvsrd f0, r4
1282 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
1283 ; CHECK-P9-NEXT: xxswapd v4, vs0
1284 ; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 1
1285 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1286 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1287 ; CHECK-P9-NEXT: mfvsrwz r5, f9
1288 ; CHECK-P9-NEXT: mtvsrd f9, r5
1289 ; CHECK-P9-NEXT: mfvsrwz r5, f10
1290 ; CHECK-P9-NEXT: mtvsrd f10, r5
1291 ; CHECK-P9-NEXT: xxswapd v0, vs9
1292 ; CHECK-P9-NEXT: xxswapd v1, vs10
1293 ; CHECK-P9-NEXT: vmrglh v0, v1, v0
1294 ; CHECK-P9-NEXT: vmrglw v2, v2, v0
1295 ; CHECK-P9-NEXT: stxv vs2, 0(r3)
1296 ; CHECK-P9-NEXT: mfvsrwz r4, f0
1297 ; CHECK-P9-NEXT: mtvsrd f0, r4
1298 ; CHECK-P9-NEXT: xxswapd v5, vs0
1299 ; CHECK-P9-NEXT: vmrglh v4, v4, v5
1300 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
1301 ; CHECK-P9-NEXT: xxmrgld vs0, v3, v2
1302 ; CHECK-P9-NEXT: stxv vs0, 16(r3)
13391303 ; CHECK-P9-NEXT: blr
13401304 ;
13411305 ; CHECK-BE-LABEL: test16elt_signed:
13421306 ; CHECK-BE: # %bb.0: # %entry
1343 ; CHECK-BE-NEXT: lxv vs2, 0(r4)
1344 ; CHECK-BE-NEXT: lxv vs3, 16(r4)
1307 ; CHECK-BE-NEXT: lxv vs1, 16(r4)
1308 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
1309 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1310 ; CHECK-BE-NEXT: xxswapd vs3, vs1
1311 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1312 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1313 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1314 ; CHECK-BE-NEXT: mfvsrwz r5, f2
1315 ; CHECK-BE-NEXT: xscvspdpn f4, vs1
1316 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
1317 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1318 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1319 ; CHECK-BE-NEXT: sldi r5, r5, 48
1320 ; CHECK-BE-NEXT: mtvsrd v2, r5
1321 ; CHECK-BE-NEXT: mfvsrwz r5, f3
1322 ; CHECK-BE-NEXT: xscvdpsxws f3, f4
1323 ; CHECK-BE-NEXT: lxv vs0, 0(r4)
1324 ; CHECK-BE-NEXT: xxsldwi vs2, vs0, vs0, 3
1325 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1326 ; CHECK-BE-NEXT: sldi r5, r5, 48
1327 ; CHECK-BE-NEXT: mtvsrd v3, r5
1328 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
1329 ; CHECK-BE-NEXT: mfvsrwz r5, f3
1330 ; CHECK-BE-NEXT: sldi r5, r5, 48
1331 ; CHECK-BE-NEXT: mtvsrd v3, r5
1332 ; CHECK-BE-NEXT: mfvsrwz r5, f1
1333 ; CHECK-BE-NEXT: xxswapd vs1, vs0
1334 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1335 ; CHECK-BE-NEXT: sldi r5, r5, 48
1336 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1337 ; CHECK-BE-NEXT: mtvsrd v4, r5
1338 ; CHECK-BE-NEXT: mfvsrwz r5, f2
1339 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1340 ; CHECK-BE-NEXT: sldi r5, r5, 48
1341 ; CHECK-BE-NEXT: vmrghh v3, v3, v4
1342 ; CHECK-BE-NEXT: mtvsrd v4, r5
1343 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
1344 ; CHECK-BE-NEXT: mfvsrwz r5, f1
1345 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
1346 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
1347 ; CHECK-BE-NEXT: sldi r5, r5, 48
1348 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1349 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1350 ; CHECK-BE-NEXT: mtvsrd v5, r5
1351 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1352 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
1353 ; CHECK-BE-NEXT: mfvsrwz r5, f1
1354 ; CHECK-BE-NEXT: lxv vs1, 48(r4)
1355 ; CHECK-BE-NEXT: sldi r5, r5, 48
1356 ; CHECK-BE-NEXT: mtvsrd v5, r5
1357 ; CHECK-BE-NEXT: mfvsrwz r5, f0
13451358 ; CHECK-BE-NEXT: lxv vs0, 32(r4)
1346 ; CHECK-BE-NEXT: lxv vs1, 48(r4)
1347 ; CHECK-BE-NEXT: std r25, -56(r1) # 8-byte Folded Spill
1348 ; CHECK-BE-NEXT: std r26, -48(r1) # 8-byte Folded Spill
1349 ; CHECK-BE-NEXT: std r27, -40(r1) # 8-byte Folded Spill
1350 ; CHECK-BE-NEXT: std r28, -32(r1) # 8-byte Folded Spill
1351 ; CHECK-BE-NEXT: std r29, -24(r1) # 8-byte Folded Spill
1352 ; CHECK-BE-NEXT: std r30, -16(r1) # 8-byte Folded Spill
1353 ; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
1354 ; CHECK-BE-NEXT: xxswapd vs5, vs3
1355 ; CHECK-BE-NEXT: xxsldwi vs6, vs3, vs3, 1
1356 ; CHECK-BE-NEXT: xxsldwi vs7, vs2, vs2, 3
1357 ; CHECK-BE-NEXT: xxswapd vs8, vs2
1358 ; CHECK-BE-NEXT: xxsldwi vs9, vs2, vs2, 1
1359 ; CHECK-BE-NEXT: xxsldwi vs10, vs1, vs1, 3
1360 ; CHECK-BE-NEXT: xxswapd vs11, vs1
1361 ; CHECK-BE-NEXT: xxsldwi vs12, vs1, vs1, 1
1362 ; CHECK-BE-NEXT: xxsldwi vs13, vs0, vs0, 3
1363 ; CHECK-BE-NEXT: xxswapd v2, vs0
1364 ; CHECK-BE-NEXT: xxsldwi v3, vs0, vs0, 1
1359 ; CHECK-BE-NEXT: xscvspdpn f5, vs1
1360 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
1361 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1362 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
1363 ; CHECK-BE-NEXT: sldi r5, r5, 48
1364 ; CHECK-BE-NEXT: xxswapd vs3, vs1
1365 ; CHECK-BE-NEXT: mtvsrd v0, r5
1366 ; CHECK-BE-NEXT: vmrghh v5, v5, v0
13651367 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1366 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1367 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1368 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
1369 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1370 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1371 ; CHECK-BE-NEXT: vmrghw v3, v5, v4
1372 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1373 ; CHECK-BE-NEXT: mfvsrwz r4, f5
1374 ; CHECK-BE-NEXT: xxmrghd vs4, v3, v2
1375 ; CHECK-BE-NEXT: sldi r4, r4, 48
1376 ; CHECK-BE-NEXT: mtvsrd v2, r4
1377 ; CHECK-BE-NEXT: mfvsrwz r4, f2
1378 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1379 ; CHECK-BE-NEXT: stxv vs4, 0(r3)
1380 ; CHECK-BE-NEXT: sldi r4, r4, 48
1381 ; CHECK-BE-NEXT: mtvsrd v3, r4
1382 ; CHECK-BE-NEXT: mfvsrwz r4, f3
1383 ; CHECK-BE-NEXT: sldi r4, r4, 48
1384 ; CHECK-BE-NEXT: mtvsrd v4, r4
1385 ; CHECK-BE-NEXT: mfvsrwz r4, f1
1386 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
1387 ; CHECK-BE-NEXT: sldi r4, r4, 48
1388 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1389 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1390 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
1391 ; CHECK-BE-NEXT: mtvsrd v4, r4
1392 ; CHECK-BE-NEXT: mfvsrwz r4, f1
1393 ; CHECK-BE-NEXT: xxswapd vs1, vs0
1394 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1395 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1396 ; CHECK-BE-NEXT: vmrghh v2, v2, v4
1397 ; CHECK-BE-NEXT: sldi r4, r4, 48
1398 ; CHECK-BE-NEXT: vmrghw v2, v2, v3
1399 ; CHECK-BE-NEXT: mtvsrd v3, r4
1400 ; CHECK-BE-NEXT: mfvsrwz r4, f1
1401 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
1402 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
1403 ; CHECK-BE-NEXT: sldi r4, r4, 48
1404 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
13681405 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1369 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
1370 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
1371 ; CHECK-BE-NEXT: xscvspdpn f6, vs6
1372 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
1373 ; CHECK-BE-NEXT: xscvspdpn f8, vs8
1374 ; CHECK-BE-NEXT: xscvspdpn f9, vs9
1375 ; CHECK-BE-NEXT: xscvspdpn f10, vs10
1376 ; CHECK-BE-NEXT: xscvspdpn f11, vs11
1377 ; CHECK-BE-NEXT: xscvspdpn f12, vs12
1378 ; CHECK-BE-NEXT: xscvspdpn f13, vs13
1379 ; CHECK-BE-NEXT: xscvspdpn v2, v2
1380 ; CHECK-BE-NEXT: xscvspdpn v3, v3
1381 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1382 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1383 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1384 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1385 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1386 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
1387 ; CHECK-BE-NEXT: xscvdpsxws f6, f6
1388 ; CHECK-BE-NEXT: xscvdpsxws f7, f7
1389 ; CHECK-BE-NEXT: xscvdpsxws f8, f8
1390 ; CHECK-BE-NEXT: xscvdpsxws f9, f9
1391 ; CHECK-BE-NEXT: xscvdpsxws f10, f10
1392 ; CHECK-BE-NEXT: xscvdpsxws f11, f11
1393 ; CHECK-BE-NEXT: xscvdpsxws f12, f12
1394 ; CHECK-BE-NEXT: xscvdpsxws f13, f13
1395 ; CHECK-BE-NEXT: xscvdpsxws v2, v2
1396 ; CHECK-BE-NEXT: xscvdpsxws v3, v3
1397 ; CHECK-BE-NEXT: mfvsrwz r4, f3
1398 ; CHECK-BE-NEXT: mfvsrwz r5, f2
1399 ; CHECK-BE-NEXT: mfvsrwz r12, f1
1400 ; CHECK-BE-NEXT: mfvsrwz r0, f0
1401 ; CHECK-BE-NEXT: mfvsrwz r6, f4
1402 ; CHECK-BE-NEXT: mfvsrwz r7, f5
1403 ; CHECK-BE-NEXT: mfvsrwz r8, f6
1404 ; CHECK-BE-NEXT: mfvsrwz r9, f7
1405 ; CHECK-BE-NEXT: mfvsrwz r10, f8
1406 ; CHECK-BE-NEXT: mfvsrwz r11, f9
1407 ; CHECK-BE-NEXT: mfvsrwz r30, f10
1408 ; CHECK-BE-NEXT: mfvsrwz r29, f11
1409 ; CHECK-BE-NEXT: mfvsrwz r28, f12
1410 ; CHECK-BE-NEXT: mfvsrwz r27, f13
1411 ; CHECK-BE-NEXT: mfvsrwz r26, v2
1412 ; CHECK-BE-NEXT: mfvsrwz r25, v3
1413 ; CHECK-BE-NEXT: sldi r4, r4, 48
1414 ; CHECK-BE-NEXT: sldi r5, r5, 48
1415 ; CHECK-BE-NEXT: sldi r12, r12, 48
1416 ; CHECK-BE-NEXT: sldi r0, r0, 48
1417 ; CHECK-BE-NEXT: sldi r6, r6, 48
1418 ; CHECK-BE-NEXT: sldi r7, r7, 48
1419 ; CHECK-BE-NEXT: sldi r8, r8, 48
1420 ; CHECK-BE-NEXT: sldi r9, r9, 48
1421 ; CHECK-BE-NEXT: sldi r10, r10, 48
1422 ; CHECK-BE-NEXT: sldi r11, r11, 48
1423 ; CHECK-BE-NEXT: sldi r30, r30, 48
1424 ; CHECK-BE-NEXT: sldi r29, r29, 48
1425 ; CHECK-BE-NEXT: sldi r28, r28, 48
1426 ; CHECK-BE-NEXT: sldi r27, r27, 48
1427 ; CHECK-BE-NEXT: sldi r26, r26, 48
1428 ; CHECK-BE-NEXT: sldi r25, r25, 48
1429 ; CHECK-BE-NEXT: mtvsrd v2, r4
1430 ; CHECK-BE-NEXT: mtvsrd v3, r5
1431 ; CHECK-BE-NEXT: mtvsrd v10, r12
1432 ; CHECK-BE-NEXT: mtvsrd v14, r0
1433 ; CHECK-BE-NEXT: mtvsrd v4, r6
1434 ; CHECK-BE-NEXT: mtvsrd v5, r7
1435 ; CHECK-BE-NEXT: mtvsrd v0, r8
1436 ; CHECK-BE-NEXT: mtvsrd v1, r9
1437 ; CHECK-BE-NEXT: mtvsrd v6, r10
1438 ; CHECK-BE-NEXT: mtvsrd v7, r11
1439 ; CHECK-BE-NEXT: mtvsrd v8, r30
1440 ; CHECK-BE-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
1441 ; CHECK-BE-NEXT: mtvsrd v9, r29
1442 ; CHECK-BE-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
1443 ; CHECK-BE-NEXT: mtvsrd v11, r28
1444 ; CHECK-BE-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
1445 ; CHECK-BE-NEXT: mtvsrd v12, r27
1446 ; CHECK-BE-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
1447 ; CHECK-BE-NEXT: mtvsrd v13, r26
1448 ; CHECK-BE-NEXT: ld r26, -48(r1) # 8-byte Folded Reload
1449 ; CHECK-BE-NEXT: mtvsrd v15, r25
1450 ; CHECK-BE-NEXT: ld r25, -56(r1) # 8-byte Folded Reload
1451 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
1452 ; CHECK-BE-NEXT: vmrghh v2, v2, v0
1453 ; CHECK-BE-NEXT: vmrghh v5, v6, v1
1454 ; CHECK-BE-NEXT: vmrghh v3, v3, v7
1455 ; CHECK-BE-NEXT: vmrghh v0, v9, v8
1456 ; CHECK-BE-NEXT: vmrghh v1, v10, v11
1457 ; CHECK-BE-NEXT: vmrghh v6, v13, v12
1458 ; CHECK-BE-NEXT: vmrghh v7, v14, v15
1459 ; CHECK-BE-NEXT: vmrghw v2, v2, v4
1460 ; CHECK-BE-NEXT: vmrghw v3, v3, v5
1461 ; CHECK-BE-NEXT: vmrghw v4, v1, v0
1462 ; CHECK-BE-NEXT: vmrghw v5, v7, v6
1406 ; CHECK-BE-NEXT: mtvsrd v4, r4
1407 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1408 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
1409 ; CHECK-BE-NEXT: mfvsrwz r4, f1
1410 ; CHECK-BE-NEXT: sldi r4, r4, 48
1411 ; CHECK-BE-NEXT: mtvsrd v4, r4
1412 ; CHECK-BE-NEXT: mfvsrwz r4, f0
1413 ; CHECK-BE-NEXT: sldi r4, r4, 48
1414 ; CHECK-BE-NEXT: mtvsrd v5, r4
1415 ; CHECK-BE-NEXT: vmrghh v4, v4, v5
1416 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
14631417 ; CHECK-BE-NEXT: xxmrghd vs0, v3, v2
1464 ; CHECK-BE-NEXT: xxmrghd vs1, v5, v4
1465 ; CHECK-BE-NEXT: stxv vs0, 0(r3)
1466 ; CHECK-BE-NEXT: stxv vs1, 16(r3)
1418 ; CHECK-BE-NEXT: stxv vs0, 16(r3)
14671419 ; CHECK-BE-NEXT: blr
14681420 entry:
14691421 %a = load <16 x float>, <16 x float>* %0, align 64
3434 ; CHECK-BE-LABEL: test2elt:
3535 ; CHECK-BE: # %bb.0: # %entry
3636 ; CHECK-BE-NEXT: mtvsrd f0, r3
37 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 1
37 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
38 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
3839 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
39 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
40 ; CHECK-BE-NEXT: xxmrghd vs0, vs0, vs1
40 ; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0
4141 ; CHECK-BE-NEXT: xvcvdpuxds v2, vs0
4242 ; CHECK-BE-NEXT: blr
4343 entry:
7171 ; CHECK-P9: # %bb.0: # %entry
7272 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
7373 ; CHECK-P9-NEXT: xxswapd vs1, v2
74 ; CHECK-P9-NEXT: xxsldwi vs2, v2, v2, 1
75 ; CHECK-P9-NEXT: xscvspdpn f3, v2
7674 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
7775 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
76 ; CHECK-P9-NEXT: xxsldwi vs2, v2, v2, 1
7877 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
7978 ; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0
80 ; CHECK-P9-NEXT: xxmrghd vs1, vs3, vs2
79 ; CHECK-P9-NEXT: xscvspdpn f1, v2
80 ; CHECK-P9-NEXT: xxmrghd vs1, vs1, vs2
8181 ; CHECK-P9-NEXT: xvcvdpuxds vs0, vs0
8282 ; CHECK-P9-NEXT: xvcvdpuxds vs1, vs1
83 ; CHECK-P9-NEXT: stxv vs0, 0(r3)
8384 ; CHECK-P9-NEXT: stxv vs1, 16(r3)
84 ; CHECK-P9-NEXT: stxv vs0, 0(r3)
8585 ; CHECK-P9-NEXT: blr
8686 ;
8787 ; CHECK-BE-LABEL: test4elt:
8888 ; CHECK-BE: # %bb.0: # %entry
89 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1
89 ; CHECK-BE-NEXT: xxsldwi vs1, v2, v2, 1
90 ; CHECK-BE-NEXT: xscvspdpn f0, v2
91 ; CHECK-BE-NEXT: xxswapd vs2, v2
92 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
93 ; CHECK-BE-NEXT: xxmrghd vs0, vs0, vs1
9094 ; CHECK-BE-NEXT: xxsldwi vs1, v2, v2, 3
91 ; CHECK-BE-NEXT: xxswapd vs2, v2
92 ; CHECK-BE-NEXT: xscvspdpn f3, v2
93 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
9495 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
9596 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
96 ; CHECK-BE-NEXT: xxmrghd vs0, vs3, vs0
97 ; CHECK-BE-NEXT: xvcvdpuxds vs0, vs0
9798 ; CHECK-BE-NEXT: xxmrghd vs1, vs2, vs1
98 ; CHECK-BE-NEXT: xvcvdpuxds vs0, vs0
9999 ; CHECK-BE-NEXT: xvcvdpuxds vs1, vs1
100 ; CHECK-BE-NEXT: stxv vs0, 0(r3)
100101 ; CHECK-BE-NEXT: stxv vs1, 16(r3)
101 ; CHECK-BE-NEXT: stxv vs0, 0(r3)
102102 ; CHECK-BE-NEXT: blr
103103 entry:
104104 %0 = fptoui <4 x float> %a to <4 x i64>
148148 ;
149149 ; CHECK-P9-LABEL: test8elt:
150150 ; CHECK-P9: # %bb.0: # %entry
151 ; CHECK-P9-NEXT: lxv vs0, 16(r4)
152 ; CHECK-P9-NEXT: lxv vs1, 0(r4)
153 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
154 ; CHECK-P9-NEXT: xxswapd vs3, vs1
155 ; CHECK-P9-NEXT: xxsldwi vs4, vs1, vs1, 1
156 ; CHECK-P9-NEXT: xxsldwi vs5, vs0, vs0, 3
157 ; CHECK-P9-NEXT: xxswapd vs6, vs0
158 ; CHECK-P9-NEXT: xxsldwi vs7, vs0, vs0, 1
151 ; CHECK-P9-NEXT: lxv vs0, 0(r4)
152 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
153 ; CHECK-P9-NEXT: xxswapd vs2, vs0
159154 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
155 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
156 ; CHECK-P9-NEXT: xscvspdpn f3, vs0
157 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
160158 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
161 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
159 ; CHECK-P9-NEXT: xxmrghd vs1, vs2, vs1
160 ; CHECK-P9-NEXT: lxv vs2, 16(r4)
161 ; CHECK-P9-NEXT: xxmrghd vs0, vs3, vs0
162 ; CHECK-P9-NEXT: xvcvdpuxds vs1, vs1
163 ; CHECK-P9-NEXT: xvcvdpuxds vs0, vs0
164 ; CHECK-P9-NEXT: xxsldwi vs3, vs2, vs2, 3
165 ; CHECK-P9-NEXT: xxswapd vs4, vs2
162166 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
163167 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
164 ; CHECK-P9-NEXT: xscvspdpn f5, vs5
165 ; CHECK-P9-NEXT: xscvspdpn f6, vs6
166 ; CHECK-P9-NEXT: xscvspdpn f7, vs7
167 ; CHECK-P9-NEXT: xxmrghd vs2, vs3, vs2
168 ; CHECK-P9-NEXT: xxmrghd vs1, vs1, vs4
169 ; CHECK-P9-NEXT: xxmrghd vs3, vs6, vs5
170 ; CHECK-P9-NEXT: xxmrghd vs0, vs0, vs7
168 ; CHECK-P9-NEXT: stxv vs0, 16(r3)
169 ; CHECK-P9-NEXT: xxmrghd vs3, vs4, vs3
170 ; CHECK-P9-NEXT: xscvspdpn f4, vs2
171 ; CHECK-P9-NEXT: xxsldwi vs2, vs2, vs2, 1
172 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
173 ; CHECK-P9-NEXT: xvcvdpuxds vs3, vs3
174 ; CHECK-P9-NEXT: xxmrghd vs2, vs4, vs2
171175 ; CHECK-P9-NEXT: xvcvdpuxds vs2, vs2
172 ; CHECK-P9-NEXT: xvcvdpuxds vs1, vs1
173 ; CHECK-P9-NEXT: xvcvdpuxds vs3, vs3
174 ; CHECK-P9-NEXT: xvcvdpuxds vs0, vs0
175 ; CHECK-P9-NEXT: stxv vs0, 48(r3)
176176 ; CHECK-P9-NEXT: stxv vs3, 32(r3)
177 ; CHECK-P9-NEXT: stxv vs1, 16(r3)
178 ; CHECK-P9-NEXT: stxv vs2, 0(r3)
177 ; CHECK-P9-NEXT: stxv vs2, 48(r3)
178 ; CHECK-P9-NEXT: stxv vs1, 0(r3)
179179 ; CHECK-P9-NEXT: blr
180180 ;
181181 ; CHECK-BE-LABEL: test8elt:
182182 ; CHECK-BE: # %bb.0: # %entry
183 ; CHECK-BE-NEXT: lxv vs1, 0(r4)
184 ; CHECK-BE-NEXT: xxsldwi vs3, vs1, vs1, 1
185 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
186 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
183187 ; CHECK-BE-NEXT: lxv vs0, 16(r4)
184 ; CHECK-BE-NEXT: lxv vs1, 0(r4)
185 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 1
188 ; CHECK-BE-NEXT: xxsldwi vs4, vs0, vs0, 1
189 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
190 ; CHECK-BE-NEXT: xxmrghd vs2, vs2, vs3
186191 ; CHECK-BE-NEXT: xxsldwi vs3, vs1, vs1, 3
187 ; CHECK-BE-NEXT: xxswapd vs4, vs1
188 ; CHECK-BE-NEXT: xxsldwi vs5, vs0, vs0, 1
189 ; CHECK-BE-NEXT: xxsldwi vs6, vs0, vs0, 3
190 ; CHECK-BE-NEXT: xxswapd vs7, vs0
192 ; CHECK-BE-NEXT: xxswapd vs1, vs1
193 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
191194 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
195 ; CHECK-BE-NEXT: xxmrghd vs1, vs1, vs3
196 ; CHECK-BE-NEXT: xscvspdpn f3, vs0
197 ; CHECK-BE-NEXT: xxmrghd vs3, vs3, vs4
198 ; CHECK-BE-NEXT: xxsldwi vs4, vs0, vs0, 3
199 ; CHECK-BE-NEXT: xxswapd vs0, vs0
192200 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
193 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
194 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
195201 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
196 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
197 ; CHECK-BE-NEXT: xscvspdpn f6, vs6
198 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
199 ; CHECK-BE-NEXT: xxmrghd vs1, vs1, vs2
200 ; CHECK-BE-NEXT: xxmrghd vs2, vs4, vs3
201 ; CHECK-BE-NEXT: xxmrghd vs0, vs0, vs5
202 ; CHECK-BE-NEXT: xxmrghd vs3, vs7, vs6
202 ; CHECK-BE-NEXT: xxmrghd vs0, vs0, vs4
203 ; CHECK-BE-NEXT: xvcvdpuxds vs2, vs2
203204 ; CHECK-BE-NEXT: xvcvdpuxds vs1, vs1
204 ; CHECK-BE-NEXT: xvcvdpuxds vs2, vs2
205 ; CHECK-BE-NEXT: xvcvdpuxds vs3, vs3
206 ; CHECK-BE-NEXT: stxv vs1, 16(r3)
205207 ; CHECK-BE-NEXT: xvcvdpuxds vs0, vs0
206 ; CHECK-BE-NEXT: xvcvdpuxds vs3, vs3
207 ; CHECK-BE-NEXT: stxv vs3, 48(r3)
208 ; CHECK-BE-NEXT: stxv vs0, 32(r3)
209 ; CHECK-BE-NEXT: stxv vs2, 16(r3)
210 ; CHECK-BE-NEXT: stxv vs1, 0(r3)
208 ; CHECK-BE-NEXT: stxv vs3, 32(r3)
209 ; CHECK-BE-NEXT: stxv vs0, 48(r3)
210 ; CHECK-BE-NEXT: stxv vs2, 0(r3)
211211 ; CHECK-BE-NEXT: blr
212212 entry:
213213 %a = load <8 x float>, <8 x float>* %0, align 32
294294 ;
295295 ; CHECK-P9-LABEL: test16elt:
296296 ; CHECK-P9: # %bb.0: # %entry
297 ; CHECK-P9-NEXT: lxv vs0, 16(r4)
298 ; CHECK-P9-NEXT: lxv vs1, 0(r4)
299 ; CHECK-P9-NEXT: lxv vs2, 48(r4)
300 ; CHECK-P9-NEXT: lxv vs3, 32(r4)
301 ; CHECK-P9-NEXT: stfd f30, -16(r1) # 8-byte Folded Spill
302 ; CHECK-P9-NEXT: stfd f31, -8(r1) # 8-byte Folded Spill
303 ; CHECK-P9-NEXT: xxsldwi vs4, vs1, vs1, 3
304 ; CHECK-P9-NEXT: xxswapd vs5, vs1
305 ; CHECK-P9-NEXT: xxsldwi vs6, vs1, vs1, 1
306 ; CHECK-P9-NEXT: xxsldwi vs7, vs0, vs0, 3
307 ; CHECK-P9-NEXT: xxswapd vs8, vs0
308 ; CHECK-P9-NEXT: xxsldwi vs9, vs0, vs0, 1
309 ; CHECK-P9-NEXT: xxsldwi vs10, vs3, vs3, 3
310 ; CHECK-P9-NEXT: xxswapd vs11, vs3
311 ; CHECK-P9-NEXT: xxsldwi vs12, vs3, vs3, 1
312 ; CHECK-P9-NEXT: xxsldwi vs13, vs2, vs2, 3
313 ; CHECK-P9-NEXT: xxswapd v2, vs2
314 ; CHECK-P9-NEXT: xxsldwi v3, vs2, vs2, 1
315 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
316 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
317 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
318 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
319 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
297 ; CHECK-P9-NEXT: lxv vs4, 16(r4)
298 ; CHECK-P9-NEXT: xxsldwi vs5, vs4, vs4, 3
299 ; CHECK-P9-NEXT: xxswapd vs6, vs4
300 ; CHECK-P9-NEXT: lxv vs0, 0(r4)
301 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
302 ; CHECK-P9-NEXT: xxswapd vs2, vs0
320303 ; CHECK-P9-NEXT: xscvspdpn f5, vs5
321304 ; CHECK-P9-NEXT: xscvspdpn f6, vs6
305 ; CHECK-P9-NEXT: xxmrghd vs5, vs6, vs5
306 ; CHECK-P9-NEXT: xscvspdpn f6, vs4
307 ; CHECK-P9-NEXT: xxsldwi vs4, vs4, vs4, 1
308 ; CHECK-P9-NEXT: lxv vs3, 32(r4)
309 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
310 ; CHECK-P9-NEXT: xxswapd vs7, vs3
322311 ; CHECK-P9-NEXT: xscvspdpn f7, vs7
323 ; CHECK-P9-NEXT: xscvspdpn f8, vs8
324 ; CHECK-P9-NEXT: xscvspdpn f9, vs9
325 ; CHECK-P9-NEXT: xscvspdpn f10, vs10
326 ; CHECK-P9-NEXT: xscvspdpn f11, vs11
327 ; CHECK-P9-NEXT: xscvspdpn f12, vs12
328 ; CHECK-P9-NEXT: xscvspdpn f13, vs13
329 ; CHECK-P9-NEXT: xscvspdpn f31, v2
330 ; CHECK-P9-NEXT: xscvspdpn f30, v3
331 ; CHECK-P9-NEXT: xxmrghd vs4, vs5, vs4
332 ; CHECK-P9-NEXT: xxmrghd vs1, vs1, vs6
333 ; CHECK-P9-NEXT: xxmrghd vs5, vs8, vs7
334 ; CHECK-P9-NEXT: xxmrghd vs0, vs0, vs9
335 ; CHECK-P9-NEXT: xxmrghd vs6, vs11, vs10
336 ; CHECK-P9-NEXT: xxmrghd vs3, vs3, vs12
337 ; CHECK-P9-NEXT: xxmrghd vs7, vs31, vs13
338 ; CHECK-P9-NEXT: lfd f31, -8(r1) # 8-byte Folded Reload
339 ; CHECK-P9-NEXT: xxmrghd vs2, vs2, vs30
340 ; CHECK-P9-NEXT: lfd f30, -16(r1) # 8-byte Folded Reload
341 ; CHECK-P9-NEXT: xvcvdpuxds vs4, vs4
312 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
313 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
314 ; CHECK-P9-NEXT: xxmrghd vs1, vs2, vs1
315 ; CHECK-P9-NEXT: xscvspdpn f2, vs0
316 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
317 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
318 ; CHECK-P9-NEXT: xxmrghd vs0, vs2, vs0
319 ; CHECK-P9-NEXT: xxmrghd vs4, vs6, vs4
320 ; CHECK-P9-NEXT: xxsldwi vs6, vs3, vs3, 3
342321 ; CHECK-P9-NEXT: xvcvdpuxds vs1, vs1
343322 ; CHECK-P9-NEXT: xvcvdpuxds vs5, vs5
323 ; CHECK-P9-NEXT: xscvspdpn f6, vs6
324 ; CHECK-P9-NEXT: xxmrghd vs6, vs7, vs6
325 ; CHECK-P9-NEXT: xscvspdpn f7, vs3
326 ; CHECK-P9-NEXT: xxsldwi vs3, vs3, vs3, 1
327 ; CHECK-P9-NEXT: lxv vs2, 48(r4)
328 ; CHECK-P9-NEXT: xxswapd vs8, vs2
329 ; CHECK-P9-NEXT: xscvspdpn f8, vs8
344330 ; CHECK-P9-NEXT: xvcvdpuxds vs0, vs0
331 ; CHECK-P9-NEXT: stxv vs5, 32(r3)
345332 ; CHECK-P9-NEXT: xvcvdpuxds vs6, vs6
333 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
334 ; CHECK-P9-NEXT: xxmrghd vs3, vs7, vs3
335 ; CHECK-P9-NEXT: xxsldwi vs7, vs2, vs2, 3
336 ; CHECK-P9-NEXT: xscvspdpn f7, vs7
337 ; CHECK-P9-NEXT: xxmrghd vs7, vs8, vs7
338 ; CHECK-P9-NEXT: xscvspdpn f8, vs2
339 ; CHECK-P9-NEXT: xxsldwi vs2, vs2, vs2, 1
340 ; CHECK-P9-NEXT: stxv vs6, 64(r3)
341 ; CHECK-P9-NEXT: xvcvdpuxds vs4, vs4
346342 ; CHECK-P9-NEXT: xvcvdpuxds vs3, vs3
347343 ; CHECK-P9-NEXT: xvcvdpuxds vs7, vs7
344 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
345 ; CHECK-P9-NEXT: stxv vs3, 80(r3)
346 ; CHECK-P9-NEXT: xxmrghd vs2, vs8, vs2
348347 ; CHECK-P9-NEXT: xvcvdpuxds vs2, vs2
349 ; CHECK-P9-NEXT: stxv vs0, 48(r3)
350 ; CHECK-P9-NEXT: stxv vs5, 32(r3)
351 ; CHECK-P9-NEXT: stxv vs1, 16(r3)
352 ; CHECK-P9-NEXT: stxv vs4, 0(r3)
353348 ; CHECK-P9-NEXT: stxv vs2, 112(r3)
354349 ; CHECK-P9-NEXT: stxv vs7, 96(r3)
355 ; CHECK-P9-NEXT: stxv vs3, 80(r3)
356 ; CHECK-P9-NEXT: stxv vs6, 64(r3)
350 ; CHECK-P9-NEXT: stxv vs4, 48(r3)
351 ; CHECK-P9-NEXT: stxv vs0, 16(r3)
352 ; CHECK-P9-NEXT: stxv vs1, 0(r3)
357353 ; CHECK-P9-NEXT: blr
358354 ;
359355 ; CHECK-BE-LABEL: test16elt:
360356 ; CHECK-BE: # %bb.0: # %entry
361 ; CHECK-BE-NEXT: lxv vs0, 16(r4)
362 ; CHECK-BE-NEXT: lxv vs1, 0(r4)
357 ; CHECK-BE-NEXT: lxv vs0, 0(r4)
358 ; CHECK-BE-NEXT: lxv vs4, 16(r4)
359 ; CHECK-BE-NEXT: xxsldwi vs2, vs0, vs0, 1
360 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
361 ; CHECK-BE-NEXT: xxsldwi vs5, vs0, vs0, 3
362 ; CHECK-BE-NEXT: xxswapd vs0, vs0
363 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
364 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
365 ; CHECK-BE-NEXT: xxsldwi vs6, vs4, vs4, 1
366 ; CHECK-BE-NEXT: xscvspdpn f6, vs6
367 ; CHECK-BE-NEXT: xxmrghd vs0, vs0, vs5
368 ; CHECK-BE-NEXT: xscvspdpn f5, vs4
369 ; CHECK-BE-NEXT: lxv vs3, 32(r4)
370 ; CHECK-BE-NEXT: xxsldwi vs7, vs3, vs3, 1
371 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
372 ; CHECK-BE-NEXT: xxmrghd vs5, vs5, vs6
373 ; CHECK-BE-NEXT: xxsldwi vs6, vs4, vs4, 3
374 ; CHECK-BE-NEXT: xxswapd vs4, vs4
375 ; CHECK-BE-NEXT: xscvspdpn f6, vs6
376 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
377 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
378 ; CHECK-BE-NEXT: xxmrghd vs1, vs1, vs2
363379 ; CHECK-BE-NEXT: lxv vs2, 48(r4)
364 ; CHECK-BE-NEXT: lxv vs3, 32(r4)
365 ; CHECK-BE-NEXT: stfd f30, -16(r1) # 8-byte Folded Spill
366 ; CHECK-BE-NEXT: stfd f31, -8(r1) # 8-byte Folded Spill
367 ; CHECK-BE-NEXT: xxsldwi vs4, vs1, vs1, 1
368 ; CHECK-BE-NEXT: xxsldwi vs5, vs1, vs1, 3
369 ; CHECK-BE-NEXT: xxswapd vs6, vs1
370 ; CHECK-BE-NEXT: xxsldwi vs7, vs0, vs0, 1
371 ; CHECK-BE-NEXT: xxsldwi vs8, vs0, vs0, 3
372 ; CHECK-BE-NEXT: xxswapd vs9, vs0
373 ; CHECK-BE-NEXT: xxsldwi vs10, vs3, vs3, 1
374 ; CHECK-BE-NEXT: xxsldwi vs11, vs3, vs3, 3
375 ; CHECK-BE-NEXT: xxswapd vs12, vs3
376 ; CHECK-BE-NEXT: xxsldwi vs13, vs2, vs2, 1
377 ; CHECK-BE-NEXT: xxsldwi v2, vs2, vs2, 3
378 ; CHECK-BE-NEXT: xxswapd v3, vs2
379 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
380 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
381 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
382 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
383 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
384 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
385 ; CHECK-BE-NEXT: xscvspdpn f6, vs6
386 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
387 ; CHECK-BE-NEXT: xscvspdpn f8, vs8
388 ; CHECK-BE-NEXT: xscvspdpn f9, vs9
389 ; CHECK-BE-NEXT: xscvspdpn f10, vs10
390 ; CHECK-BE-NEXT: xscvspdpn f11, vs11
391 ; CHECK-BE-NEXT: xscvspdpn f12, vs12
392 ; CHECK-BE-NEXT: xscvspdpn f13, vs13
393 ; CHECK-BE-NEXT: xscvspdpn f31, v2
394 ; CHECK-BE-NEXT: xscvspdpn f30, v3
395 ; CHECK-BE-NEXT: xxmrghd vs1, vs1, vs4
396 ; CHECK-BE-NEXT: xxmrghd vs4, vs6, vs5
397 ; CHECK-BE-NEXT: xxmrghd vs0, vs0, vs7
398 ; CHECK-BE-NEXT: xxmrghd vs5, vs9, vs8
399 ; CHECK-BE-NEXT: xxmrghd vs3, vs3, vs10
400 ; CHECK-BE-NEXT: xxmrghd vs6, vs12, vs11
401 ; CHECK-BE-NEXT: xxmrghd vs2, vs2, vs13
402 ; CHECK-BE-NEXT: xxmrghd vs7, vs30, vs31
403 ; CHECK-BE-NEXT: lfd f31, -8(r1) # 8-byte Folded Reload
404 ; CHECK-BE-NEXT: lfd f30, -16(r1) # 8-byte Folded Reload
380 ; CHECK-BE-NEXT: xxsldwi vs8, vs2, vs2, 1
405381 ; CHECK-BE-NEXT: xvcvdpuxds vs1, vs1
406 ; CHECK-BE-NEXT: xvcvdpuxds vs4, vs4
407382 ; CHECK-BE-NEXT: xvcvdpuxds vs0, vs0
408383 ; CHECK-BE-NEXT: xvcvdpuxds vs5, vs5
384 ; CHECK-BE-NEXT: xscvspdpn f8, vs8
385 ; CHECK-BE-NEXT: xxmrghd vs4, vs4, vs6
386 ; CHECK-BE-NEXT: xscvspdpn f6, vs3
387 ; CHECK-BE-NEXT: stxv vs0, 16(r3)
388 ; CHECK-BE-NEXT: xxmrghd vs6, vs6, vs7
389 ; CHECK-BE-NEXT: xxsldwi vs7, vs3, vs3, 3
390 ; CHECK-BE-NEXT: xxswapd vs3, vs3
391 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
392 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
393 ; CHECK-BE-NEXT: xxmrghd vs3, vs3, vs7
394 ; CHECK-BE-NEXT: xscvspdpn f7, vs2
395 ; CHECK-BE-NEXT: xxmrghd vs7, vs7, vs8
396 ; CHECK-BE-NEXT: xxsldwi vs8, vs2, vs2, 3
397 ; CHECK-BE-NEXT: xxswapd vs2, vs2
398 ; CHECK-BE-NEXT: xscvspdpn f8, vs8
399 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
400 ; CHECK-BE-NEXT: xxmrghd vs2, vs2, vs8
401 ; CHECK-BE-NEXT: stxv vs5, 32(r3)
402 ; CHECK-BE-NEXT: xvcvdpuxds vs4, vs4
403 ; CHECK-BE-NEXT: xvcvdpuxds vs6, vs6
409404 ; CHECK-BE-NEXT: xvcvdpuxds vs3, vs3
410 ; CHECK-BE-NEXT: xvcvdpuxds vs6, vs6
405 ; CHECK-BE-NEXT: xvcvdpuxds vs7, vs7
406 ; CHECK-BE-NEXT: stxv vs3, 80(r3)
407 ; CHECK-BE-NEXT: stxv vs7, 96(r3)
411408 ; CHECK-BE-NEXT: xvcvdpuxds vs2, vs2
412 ; CHECK-BE-NEXT: xvcvdpuxds vs7, vs7
413 ; CHECK-BE-NEXT: stxv vs5, 48(r3)
414 ; CHECK-BE-NEXT: stxv vs0, 32(r3)
415 ; CHECK-BE-NEXT: stxv vs4, 16(r3)
409 ; CHECK-BE-NEXT: stxv vs2, 112(r3)
410 ; CHECK-BE-NEXT: stxv vs6, 64(r3)
411 ; CHECK-BE-NEXT: stxv vs4, 48(r3)
416412 ; CHECK-BE-NEXT: stxv vs1, 0(r3)
417 ; CHECK-BE-NEXT: stxv vs7, 112(r3)
418 ; CHECK-BE-NEXT: stxv vs2, 96(r3)
419 ; CHECK-BE-NEXT: stxv vs6, 80(r3)
420 ; CHECK-BE-NEXT: stxv vs3, 64(r3)
421413 ; CHECK-BE-NEXT: blr
422414 entry:
423415 %a = load <16 x float>, <16 x float>* %0, align 64
452444 ; CHECK-BE-LABEL: test2elt_signed:
453445 ; CHECK-BE: # %bb.0: # %entry
454446 ; CHECK-BE-NEXT: mtvsrd f0, r3
455 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 1
447 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
448 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
456449 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
457 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
458 ; CHECK-BE-NEXT: xxmrghd vs0, vs0, vs1
450 ; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0
459451 ; CHECK-BE-NEXT: xvcvdpuxds v2, vs0
460452 ; CHECK-BE-NEXT: blr
461453 entry:
489481 ; CHECK-P9: # %bb.0: # %entry
490482 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
491483 ; CHECK-P9-NEXT: xxswapd vs1, v2
492 ; CHECK-P9-NEXT: xxsldwi vs2, v2, v2, 1
493 ; CHECK-P9-NEXT: xscvspdpn f3, v2
494484 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
495485 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
486 ; CHECK-P9-NEXT: xxsldwi vs2, v2, v2, 1
496487 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
497488 ; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0
498 ; CHECK-P9-NEXT: xxmrghd vs1, vs3, vs2
489 ; CHECK-P9-NEXT: xscvspdpn f1, v2
490 ; CHECK-P9-NEXT: xxmrghd vs1, vs1, vs2
499491 ; CHECK-P9-NEXT: xvcvdpuxds vs0, vs0
500492 ; CHECK-P9-NEXT: xvcvdpuxds vs1, vs1
493 ; CHECK-P9-NEXT: stxv vs0, 0(r3)
501494 ; CHECK-P9-NEXT: stxv vs1, 16(r3)
502 ; CHECK-P9-NEXT: stxv vs0, 0(r3)
503495 ; CHECK-P9-NEXT: blr
504496 ;
505497 ; CHECK-BE-LABEL: test4elt_signed:
506498 ; CHECK-BE: # %bb.0: # %entry
507 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1
499 ; CHECK-BE-NEXT: xxsldwi vs1, v2, v2, 1
500 ; CHECK-BE-NEXT: xscvspdpn f0, v2
501 ; CHECK-BE-NEXT: xxswapd vs2, v2
502 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
503 ; CHECK-BE-NEXT: xxmrghd vs0, vs0, vs1
508504 ; CHECK-BE-NEXT: xxsldwi vs1, v2, v2, 3
509 ; CHECK-BE-NEXT: xxswapd vs2, v2
510 ; CHECK-BE-NEXT: xscvspdpn f3, v2
511 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
512505 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
513506 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
514 ; CHECK-BE-NEXT: xxmrghd vs0, vs3, vs0
507 ; CHECK-BE-NEXT: xvcvdpuxds vs0, vs0
515508 ; CHECK-BE-NEXT: xxmrghd vs1, vs2, vs1
516 ; CHECK-BE-NEXT: xvcvdpuxds vs0, vs0
517509 ; CHECK-BE-NEXT: xvcvdpuxds vs1, vs1
510 ; CHECK-BE-NEXT: stxv vs0, 0(r3)
518511 ; CHECK-BE-NEXT: stxv vs1, 16(r3)
519 ; CHECK-BE-NEXT: stxv vs0, 0(r3)
520512 ; CHECK-BE-NEXT: blr
521513 entry:
522514 %0 = fptoui <4 x float> %a to <4 x i64>
566558 ;
567559 ; CHECK-P9-LABEL: test8elt_signed:
568560 ; CHECK-P9: # %bb.0: # %entry
569 ; CHECK-P9-NEXT: lxv vs0, 16(r4)
570 ; CHECK-P9-NEXT: lxv vs1, 0(r4)
571 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
572 ; CHECK-P9-NEXT: xxswapd vs3, vs1
573 ; CHECK-P9-NEXT: xxsldwi vs4, vs1, vs1, 1
574 ; CHECK-P9-NEXT: xxsldwi vs5, vs0, vs0, 3
575 ; CHECK-P9-NEXT: xxswapd vs6, vs0
576 ; CHECK-P9-NEXT: xxsldwi vs7, vs0, vs0, 1
561 ; CHECK-P9-NEXT: lxv vs0, 0(r4)
562 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
563 ; CHECK-P9-NEXT: xxswapd vs2, vs0
577564 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
565 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
566 ; CHECK-P9-NEXT: xscvspdpn f3, vs0
567 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
578568 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
579 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
569 ; CHECK-P9-NEXT: xxmrghd vs1, vs2, vs1
570 ; CHECK-P9-NEXT: lxv vs2, 16(r4)
571 ; CHECK-P9-NEXT: xxmrghd vs0, vs3, vs0
572 ; CHECK-P9-NEXT: xvcvdpuxds vs1, vs1
573 ; CHECK-P9-NEXT: xvcvdpuxds vs0, vs0
574 ; CHECK-P9-NEXT: xxsldwi vs3, vs2, vs2, 3
575 ; CHECK-P9-NEXT: xxswapd vs4, vs2
580576 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
581577 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
582 ; CHECK-P9-NEXT: xscvspdpn f5, vs5
583 ; CHECK-P9-NEXT: xscvspdpn f6, vs6
584 ; CHECK-P9-NEXT: xscvspdpn f7, vs7
585 ; CHECK-P9-NEXT: xxmrghd vs2, vs3, vs2
586 ; CHECK-P9-NEXT: xxmrghd vs1, vs1, vs4
587 ; CHECK-P9-NEXT: xxmrghd vs3, vs6, vs5
588 ; CHECK-P9-NEXT: xxmrghd vs0, vs0, vs7
578 ; CHECK-P9-NEXT: stxv vs0, 16(r3)
579 ; CHECK-P9-NEXT: xxmrghd vs3, vs4, vs3
580 ; CHECK-P9-NEXT: xscvspdpn f4, vs2
581 ; CHECK-P9-NEXT: xxsldwi vs2, vs2, vs2, 1
582 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
583 ; CHECK-P9-NEXT: xvcvdpuxds vs3, vs3
584 ; CHECK-P9-NEXT: xxmrghd vs2, vs4, vs2
589585 ; CHECK-P9-NEXT: xvcvdpuxds vs2, vs2
590 ; CHECK-P9-NEXT: xvcvdpuxds vs1, vs1
591 ; CHECK-P9-NEXT: xvcvdpuxds vs3, vs3
592 ; CHECK-P9-NEXT: xvcvdpuxds vs0, vs0
593 ; CHECK-P9-NEXT: stxv vs0, 48(r3)
594586 ; CHECK-P9-NEXT: stxv vs3, 32(r3)
595 ; CHECK-P9-NEXT: stxv vs1, 16(r3)
596 ; CHECK-P9-NEXT: stxv vs2, 0(r3)
587 ; CHECK-P9-NEXT: stxv vs2, 48(r3)
588 ; CHECK-P9-NEXT: stxv vs1, 0(r3)
597589 ; CHECK-P9-NEXT: blr
598590 ;
599591 ; CHECK-BE-LABEL: test8elt_signed:
600592 ; CHECK-BE: # %bb.0: # %entry
593 ; CHECK-BE-NEXT: lxv vs1, 0(r4)
594 ; CHECK-BE-NEXT: xxsldwi vs3, vs1, vs1, 1
595 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
596 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
601597 ; CHECK-BE-NEXT: lxv vs0, 16(r4)
602 ; CHECK-BE-NEXT: lxv vs1, 0(r4)
603 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 1
598 ; CHECK-BE-NEXT: xxsldwi vs4, vs0, vs0, 1
599