llvm.org GIT mirror llvm / 8f7c0c5
Merge r245577 into branch_37 [ARM] Don't try and custom lower a vNi64 SETCC. It won't go well. We've already marked 64-bit SETCCs as non-Custom, but it's just possible that a SETCC has a legal result type but an illegal operand type. If this happens, bail out before we create unselectable nodes. Fixes PR24292. I tried to create a testcase but in 99% of cases we can't trigger this - not surprising that this bug has been latent since 2009. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_37@245578 91177308-0d34-0410-b5e6-96231b3b80d8 Renato Golin 4 years ago
1 changed file(s) with 6 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
45814581 EVT VT = Op.getValueType();
45824582 ISD::CondCode SetCCOpcode = cast(CC)->get();
45834583 SDLoc dl(Op);
4584
4585 if (CmpVT.getVectorElementType() == MVT::i64)
4586 // 64-bit comparisons are not legal. We've marked SETCC as non-Custom,
4587 // but it's possible that our operands are 64-bit but our result is 32-bit.
4588 // Bail in this case.
4589 return SDValue();
45844590
45854591 if (Op1.getValueType().isFloatingPoint()) {
45864592 switch (SetCCOpcode) {