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[X86][AVX512] Added avx512 VPSLLDQ/VPSRLDQ instruction comments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272319 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 4 years ago
4 changed file(s) with 29 addition(s) and 17 deletion(s). Raw diff Collapse all Expand all
322322 case X86::PSLLDQri:
323323 case X86::VPSLLDQri:
324324 case X86::VPSLLDQYri:
325 Src1Name = getRegName(MI->getOperand(1).getReg());
325 case X86::VPSLLDQZ128rr:
326 case X86::VPSLLDQZ256rr:
327 case X86::VPSLLDQZ512rr:
328 Src1Name = getRegName(MI->getOperand(1).getReg());
329 case X86::VPSLLDQZ128rm:
330 case X86::VPSLLDQZ256rm:
331 case X86::VPSLLDQZ512rm:
326332 DestName = getRegName(MI->getOperand(0).getReg());
327333 if (MI->getOperand(NumOperands - 1).isImm())
328334 DecodePSLLDQMask(getRegOperandVectorVT(MI, MVT::i8, 0),
333339 case X86::PSRLDQri:
334340 case X86::VPSRLDQri:
335341 case X86::VPSRLDQYri:
336 Src1Name = getRegName(MI->getOperand(1).getReg());
342 case X86::VPSRLDQZ128rr:
343 case X86::VPSRLDQZ256rr:
344 case X86::VPSRLDQZ512rr:
345 Src1Name = getRegName(MI->getOperand(1).getReg());
346 case X86::VPSRLDQZ128rm:
347 case X86::VPSRLDQZ256rm:
348 case X86::VPSRLDQZ512rm:
337349 DestName = getRegName(MI->getOperand(0).getReg());
338350 if (MI->getOperand(NumOperands - 1).isImm())
339351 DecodePSRLDQMask(getRegOperandVectorVT(MI, MVT::i8, 0),
110110 define <8 x i64>@test_int_x86_avx512_mask_psll_dq_512(<8 x i64> %x0) {
111111 ; AVX512BW-LABEL: test_int_x86_avx512_mask_psll_dq_512:
112112 ; AVX512BW: ## BB#0:
113 ; AVX512BW-NEXT: vpslldq $8, %zmm0, %zmm1
114 ; AVX512BW-NEXT: vpslldq $4, %zmm0, %zmm0
113 ; AVX512BW-NEXT: vpslldq {{.*#+}} zmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zmm0[0,1,2,3,4,5,6,7],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[16,17,18,19,20,21,22,23],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[32,33,34,35,36,37,38,39],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[48,49,50,51,52,53,54,55]
114 ; AVX512BW-NEXT: vpslldq {{.*#+}} zmm0 = zero,zero,zero,zero,zmm0[0,1,2,3,4,5,6,7,8,9,10,11],zero,zero,zero,zero,zmm0[16,17,18,19,20,21,22,23,24,25,26,27],zero,zero,zero,zero,zmm0[32,33,34,35,36,37,38,39,40,41,42,43],zero,zero,zero,zero,zmm0[48,49,50,51,52,53,54,55,56,57,58,59]
115115 ; AVX512BW-NEXT: vpaddq %zmm0, %zmm1, %zmm0
116116 ; AVX512BW-NEXT: retq
117117 ;
118118 ; AVX512F-32-LABEL: test_int_x86_avx512_mask_psll_dq_512:
119119 ; AVX512F-32: # BB#0:
120 ; AVX512F-32-NEXT: vpslldq $8, %zmm0, %zmm1
121 ; AVX512F-32-NEXT: vpslldq $4, %zmm0, %zmm0
120 ; AVX512F-32-NEXT: vpslldq {{.*#+}} zmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zmm0[0,1,2,3,4,5,6,7],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[16,17,18,19,20,21,22,23],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[32,33,34,35,36,37,38,39],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[48,49,50,51,52,53,54,55]
121 ; AVX512F-32-NEXT: vpslldq {{.*#+}} zmm0 = zero,zero,zero,zero,zmm0[0,1,2,3,4,5,6,7,8,9,10,11],zero,zero,zero,zero,zmm0[16,17,18,19,20,21,22,23,24,25,26,27],zero,zero,zero,zero,zmm0[32,33,34,35,36,37,38,39,40,41,42,43],zero,zero,zero,zero,zmm0[48,49,50,51,52,53,54,55,56,57,58,59]
122122 ; AVX512F-32-NEXT: vpaddq %zmm0, %zmm1, %zmm0
123123 ; AVX512F-32-NEXT: retl
124124 %res = call <8 x i64> @llvm.x86.avx512.psll.dq.512(<8 x i64> %x0, i32 8)
132132 define <8 x i64>@test_int_x86_avx512_mask_psrl_dq_512(<8 x i64> %x0) {
133133 ; AVX512BW-LABEL: test_int_x86_avx512_mask_psrl_dq_512:
134134 ; AVX512BW: ## BB#0:
135 ; AVX512BW-NEXT: vpsrldq $8, %zmm0, %zmm1
136 ; AVX512BW-NEXT: vpsrldq $4, %zmm0, %zmm0
135 ; AVX512BW-NEXT: vpsrldq {{.*#+}} zmm1 = zmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[40,41,42,43,44,45,46,47],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[56,57,58,59,60,61,62,63],zero,zero,zero,zero,zero,zero,zero,zero
136 ; AVX512BW-NEXT: vpsrldq {{.*#+}} zmm0 = zmm0[4,5,6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zmm0[20,21,22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zmm0[36,37,38,39,40,41,42,43,44,45,46,47],zero,zero,zero,zero,zmm0[52,53,54,55,56,57,58,59,60,61,62,63],zero,zero,zero,zero
137137 ; AVX512BW-NEXT: vpaddq %zmm0, %zmm1, %zmm0
138138 ; AVX512BW-NEXT: retq
139139 ;
140140 ; AVX512F-32-LABEL: test_int_x86_avx512_mask_psrl_dq_512:
141141 ; AVX512F-32: # BB#0:
142 ; AVX512F-32-NEXT: vpsrldq $8, %zmm0, %zmm1
143 ; AVX512F-32-NEXT: vpsrldq $4, %zmm0, %zmm0
142 ; AVX512F-32-NEXT: vpsrldq {{.*#+}} zmm1 = zmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[40,41,42,43,44,45,46,47],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[56,57,58,59,60,61,62,63],zero,zero,zero,zero,zero,zero,zero,zero
143 ; AVX512F-32-NEXT: vpsrldq {{.*#+}} zmm0 = zmm0[4,5,6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zmm0[20,21,22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zmm0[36,37,38,39,40,41,42,43,44,45,46,47],zero,zero,zero,zero,zmm0[52,53,54,55,56,57,58,59,60,61,62,63],zero,zero,zero,zero
144144 ; AVX512F-32-NEXT: vpaddq %zmm0, %zmm1, %zmm0
145145 ; AVX512F-32-NEXT: retl
146146 %res = call <8 x i64> @llvm.x86.avx512.psrl.dq.512(<8 x i64> %x0, i32 8)
None ; NOTE: Assertions have been autogenerated by update_llc_test_checks.py
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
11 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
22 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
33 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
100100 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
101101 ; AVX512BW-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[2,3,0,1,0,1,0,1]
102102 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
103 ; AVX512BW-NEXT: vpsrldq $8, %zmm0, %zmm1
103 ; AVX512BW-NEXT: vpsrldq {{.*#+}} zmm1 = zmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[40,41,42,43,44,45,46,47],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[56,57,58,59,60,61,62,63],zero,zero,zero,zero,zero,zero,zero,zero
104104 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
105105 ; AVX512BW-NEXT: vpsrlq $32, %zmm0, %zmm1
106106 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
349349 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
350350 ; AVX512BW-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[2,3,0,1,0,1,0,1]
351351 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
352 ; AVX512BW-NEXT: vpsrldq $8, %zmm0, %zmm1
352 ; AVX512BW-NEXT: vpsrldq {{.*#+}} zmm1 = zmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[40,41,42,43,44,45,46,47],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[56,57,58,59,60,61,62,63],zero,zero,zero,zero,zero,zero,zero,zero
353353 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
354354 ; AVX512BW-NEXT: vpsrlq $32, %zmm0, %zmm1
355355 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
832832 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
833833 ; AVX512BW-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[2,3,0,1,0,1,0,1]
834834 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
835 ; AVX512BW-NEXT: vpsrldq $8, %zmm0, %zmm1
835 ; AVX512BW-NEXT: vpsrldq {{.*#+}} zmm1 = zmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[40,41,42,43,44,45,46,47],zero,zero,zero,zero,zero,zero,zero,zero,zmm0[56,57,58,59,60,61,62,63],zero,zero,zero,zero,zero,zero,zero,zero
836836 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
837837 ; AVX512BW-NEXT: vpsrlq $32, %zmm0, %zmm1
838838 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0
None ; NOTE: Assertions have been autogenerated by update_llc_test_checks.py
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
11 ; RUN: llc < %s -mcpu=x86-64 -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512F
22 ; RUN: llc < %s -mcpu=x86-64 -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW
33 ; RUN: llc < %s -mcpu=x86-64 -mattr=+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512DQ
3232 ;
3333 ; AVX512BW-LABEL: shuffle_v64i8_zz_00_01_02_03_04_05_06_07_08_09_10_11_12_13_14_zz_16_17_18_19_20_21_22_23_24_25_26_27_28_29_30_zz_32_33_34_35_36_37_38_39_40_41_42_43_44_45_46_zz_48_49_50_51_52_53_54_55_56_57_58_59_60_61_62:
3434 ; AVX512BW: # BB#0:
35 ; AVX512BW-NEXT: vpslldq $1, %zmm0, %zmm0
35 ; AVX512BW-NEXT: vpslldq {{.*#+}} zmm0 = zero,zmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14],zero,zmm0[16,17,18,19,20,21,22,23,24,25,26,27,28,29,30],zero,zmm0[32,33,34,35,36,37,38,39,40,41,42,43,44,45,46],zero,zmm0[48,49,50,51,52,53,54,55,56,57,58,59,60,61,62]
3636 ; AVX512BW-NEXT: retq
3737 ;
3838 ; AVX512DQ-LABEL: shuffle_v64i8_zz_00_01_02_03_04_05_06_07_08_09_10_11_12_13_14_zz_16_17_18_19_20_21_22_23_24_25_26_27_28_29_30_zz_32_33_34_35_36_37_38_39_40_41_42_43_44_45_46_zz_48_49_50_51_52_53_54_55_56_57_58_59_60_61_62:
5353 ;
5454 ; AVX512BW-LABEL: shuffle_v64i8_02_03_04_05_06_07_08_09_10_11_12_13_14_15_zz_zz_18_19_20_21_22_23_24_25_26_27_28_29_30_31_zz_zz_34_35_36_37_38_39_40_41_42_43_44_45_46_47_zz_zz_50_51_52_53_54_55_56_57_58_59_60_61_62_63_zz_zz:
5555 ; AVX512BW: # BB#0:
56 ; AVX512BW-NEXT: vpsrldq $2, %zmm0, %zmm0
56 ; AVX512BW-NEXT: vpsrldq {{.*#+}} zmm0 = zmm0[2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero,zero,zmm0[18,19,20,21,22,23,24,25,26,27,28,29,30,31],zero,zero,zmm0[34,35,36,37,38,39,40,41,42,43,44,45,46,47],zero,zero,zmm0[50,51,52,53,54,55,56,57,58,59,60,61,62,63],zero,zero
5757 ; AVX512BW-NEXT: retq
5858 ;
5959 ; AVX512DQ-LABEL: shuffle_v64i8_02_03_04_05_06_07_08_09_10_11_12_13_14_15_zz_zz_18_19_20_21_22_23_24_25_26_27_28_29_30_31_zz_zz_34_35_36_37_38_39_40_41_42_43_44_45_46_47_zz_zz_50_51_52_53_54_55_56_57_58_59_60_61_62_63_zz_zz: