llvm.org GIT mirror llvm / 8e33473
If call frame is not part of stack frame and no dynamic alloc, eliminateFrameIndex() must adjust SP offset with size of call frames. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36625 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 13 years ago
2 changed file(s) with 49 addition(s) and 18 deletion(s). Raw diff Collapse all Expand all
2525 #include "llvm/Target/TargetFrameInfo.h"
2626 #include "llvm/Target/TargetInstrInfo.h"
2727 #include "llvm/Support/Compiler.h"
28 #include "llvm/ADT/STLExtras.h"
2829 #include
2930 using namespace llvm;
3031
150151 MachineFrameInfo *FFI = Fn.getFrameInfo();
151152 FFI->setHasCalls(HasCalls);
152153 FFI->setMaxCallFrameSize(MaxCallFrameSize);
154
153155 for (unsigned i = 0, e = FrameSDOps.size(); i != e; ++i) {
154156 MachineBasicBlock::iterator I = FrameSDOps[i];
155 RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
157 // If call frames are not being included as part of the stack frame,
158 // and there is no dynamic allocation (therefore referencing frame slots
159 // off sp), leave the pseudo ops alone. We'll eliminate them later.
160 if (RegInfo->hasReservedCallFrame(Fn) || RegInfo->hasFP(Fn))
161 RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
156162 }
157163
158164 // Now figure out which *callee saved* registers are modified by the current
490496 const TargetMachine &TM = Fn.getTarget();
491497 assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
492498 const MRegisterInfo &MRI = *TM.getRegisterInfo();
499 const TargetFrameInfo *TFI = TM.getFrameInfo();
500 bool StackGrowsDown =
501 TFI->getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown;
502 int FrameSetupOpcode = MRI.getCallFrameSetupOpcode();
503 int FrameDestroyOpcode = MRI.getCallFrameDestroyOpcode();
493504
494505 for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
506 int SPAdj = 0; // SP offset due to call frame setup / destroy.
495507 if (RS) RS->enterBasicBlock(BB);
496508 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
497 MachineInstr *MI = I++;
498 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
499 if (MI->getOperand(i).isFrameIndex()) {
500 // If this instruction has a FrameIndex operand, we need to use that
501 // target machine register info object to eliminate it.
502 MRI.eliminateFrameIndex(MI, RS);
503
504 // Revisit the instruction in full. Some instructions (e.g. inline
505 // asm instructions) can have multiple frame indices.
506 --I;
507 MI = 0;
508 break;
509 }
509 MachineInstr *MI = I;
510
511 // Remember how much SP has been adjustment to create the call frame.
512 if (I->getOpcode() == FrameSetupOpcode ||
513 I->getOpcode() == FrameDestroyOpcode) {
514 int Size = I->getOperand(0).getImmedValue();
515 if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
516 (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
517 Size = -Size;
518 SPAdj += Size;
519 MachineBasicBlock::iterator PrevI = prior(I);
520 MRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
521 // Visit the instructions created by eliminateCallFramePseudoInstr().
522 I = next(PrevI);
523 MI = NULL;
524 } else {
525 I++;
526 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
527 if (MI->getOperand(i).isFrameIndex()) {
528 // If this instruction has a FrameIndex operand, we need to use that
529 // target machine register info object to eliminate it.
530 MRI.eliminateFrameIndex(MI, SPAdj, RS);
531
532 // Revisit the instruction in full. Some instructions (e.g. inline
533 // asm instructions) can have multiple frame indices.
534 --I;
535 MI = 0;
536 break;
537 }
538 }
510539 // Update register states.
511540 if (RS && MI) RS->forward(MI);
512541 }
542 assert(SPAdj == 0 && "Unbalanced call frame setup / destroy pairs?");
513543 }
514544 }
7474 RegInfo->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
7575 ScavengingFrameIndex, ScavengedRC);
7676 MachineBasicBlock::iterator II = prior(MBBI);
77 RegInfo->eliminateFrameIndex(II, this);
77 RegInfo->eliminateFrameIndex(II, 0, this);
7878 setUsed(ScavengedReg);
7979 ScavengedReg = 0;
8080 ScavengedRC = NULL;
242242 }
243243
244244 unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
245 MachineBasicBlock::iterator I) {
245 MachineBasicBlock::iterator I,
246 int SPAdj) {
246247 assert(ScavengingFrameIndex >= 0 &&
247248 "Cannot scavenge a register without an emergency spill slot!");
248249
276277 RegInfo->loadRegFromStackSlot(*MBB, I, ScavengedReg,
277278 ScavengingFrameIndex, ScavengedRC);
278279 MachineBasicBlock::iterator II = prior(I);
279 RegInfo->eliminateFrameIndex(II, this);
280 RegInfo->eliminateFrameIndex(II, SPAdj, this);
280281 }
281282
282283 RegInfo->storeRegToStackSlot(*MBB, I, SReg, ScavengingFrameIndex, RC);
283284 MachineBasicBlock::iterator II = prior(I);
284 RegInfo->eliminateFrameIndex(II, this);
285 RegInfo->eliminateFrameIndex(II, SPAdj, this);
285286 ScavengedReg = SReg;
286287 ScavengedRC = RC;
287288