llvm.org GIT mirror llvm / 8cec6c4
Reland "Correct dwarf unwind information in function epilogue for X86" Reland r317100 with minor fix regarding ComputeCommonTailLength function in BranchFolding.cpp. Skipping top CFI instructions block needs to executed on several more return points in ComputeCommonTailLength(). Original r317100 message: "Correct dwarf unwind information in function epilogue for X86" This patch aims to provide correct dwarf unwind information in function epilogue for X86. It consists of two parts. The first part inserts CFI instructions that set appropriate cfa offset and cfa register in emitEpilogue() in X86FrameLowering. This part is X86 specific. The second part is platform independent and ensures that: - CFI instructions do not affect code generation - Unwind information remains correct when a function is modified by different passes. This is done in a late pass by analyzing information about cfa offset and cfa register in BBs and inserting additional CFI directives where necessary. Changed CFI instructions so that they: - are duplicable - are not counted as instructions when tail duplicating or tail merging - can be compared as equal Added CFIInstrInserter pass: - analyzes each basic block to determine cfa offset and register valid at its entry and exit - verifies that outgoing cfa offset and register of predecessor blocks match incoming values of their successors - inserts additional CFI directives at basic block beginning to correct the rule for calculating CFA Having CFI instructions in function epilogue can cause incorrect CFA calculation rule for some basic blocks. This can happen if, due to basic block reordering, or the existence of multiple epilogue blocks, some of the blocks have wrong cfa offset and register values set by the epilogue block above them. CFIInstrInserter is currently run only on X86, but can be used by any target that implements support for adding CFI instructions in epilogue. Patch by Violeta Vukobrat. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317579 91177308-0d34-0410-b5e6-96231b3b80d8 Petar Jovanovic 1 year, 11 months ago
101 changed file(s) with 1710 addition(s) and 37 deletion(s). Raw diff Collapse all Expand all
419419 // This pass expands memcmp() to load/stores.
420420 FunctionPass *createExpandMemCmpPass();
421421
422 /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
423 FunctionPass *createCFIInstrInserter();
424
422425 } // End llvm namespace
423426
424427 #endif
340340 return false;
341341 return true;
342342 }
343
344 /// Return initial CFA offset value i.e. the one valid at the beginning of the
345 /// function (before any stack operations).
346 virtual int getInitialCFAOffset(const MachineFunction &MF) const;
347
348 /// Return initial CFA register value i.e. the one valid at the beginning of
349 /// the function (before any stack operations).
350 virtual unsigned getInitialCFARegister(const MachineFunction &MF) const;
343351 };
344352
345353 } // End llvm namespace
8585 void initializeCFGPrinterLegacyPassPass(PassRegistry&);
8686 void initializeCFGSimplifyPassPass(PassRegistry&);
8787 void initializeCFGViewerLegacyPassPass(PassRegistry&);
88 void initializeCFIInstrInserterPass(PassRegistry&);
8889 void initializeCFLAndersAAWrapperPassPass(PassRegistry&);
8990 void initializeCFLSteensAAWrapperPassPass(PassRegistry&);
9091 void initializeCallGraphDOTPrinterPass(PassRegistry&);
901901 let InOperandList = (ins i32imm:$id);
902902 let AsmString = "";
903903 let hasCtrlDep = 1;
904 let isNotDuplicable = 1;
904 let isNotDuplicable = 0;
905905 }
906906 def EH_LABEL : Instruction {
907907 let OutOperandList = (outs);
295295 return HashMachineInstr(*I);
296296 }
297297
298 /// Whether MI should be counted as an instruction when calculating common tail.
299 static bool countsAsInstruction(const MachineInstr &MI) {
300 return !(MI.isDebugValue() || MI.isCFIInstruction());
301 }
302
298303 /// ComputeCommonTailLength - Given two machine basic blocks, compute the number
299304 /// of instructions they actually have in common together at their end. Return
300305 /// iterators for the first shared instruction in each block.
309314 while (I1 != MBB1->begin() && I2 != MBB2->begin()) {
310315 --I1; --I2;
311316 // Skip debugging pseudos; necessary to avoid changing the code.
312 while (I1->isDebugValue()) {
317 while (!countsAsInstruction(*I1)) {
313318 if (I1==MBB1->begin()) {
314 while (I2->isDebugValue()) {
315 if (I2==MBB2->begin())
319 while (!countsAsInstruction(*I2)) {
320 if (I2==MBB2->begin()) {
316321 // I1==DBG at begin; I2==DBG at begin
317 return TailLen;
322 goto SkipTopCFIAndReturn;
323 }
318324 --I2;
319325 }
320326 ++I2;
321327 // I1==DBG at begin; I2==non-DBG, or first of DBGs not at begin
322 return TailLen;
328 goto SkipTopCFIAndReturn;
323329 }
324330 --I1;
325331 }
326332 // I1==first (untested) non-DBG preceding known match
327 while (I2->isDebugValue()) {
333 while (!countsAsInstruction(*I2)) {
328334 if (I2==MBB2->begin()) {
329335 ++I1;
330336 // I1==non-DBG, or first of DBGs not at begin; I2==DBG at begin
331 return TailLen;
337 goto SkipTopCFIAndReturn;
332338 }
333339 --I2;
334340 }
367373 }
368374 ++I1;
369375 }
376
377 SkipTopCFIAndReturn:
378 // Ensure that I1 and I2 do not point to a CFI_INSTRUCTION. This can happen if
379 // I1 and I2 are non-identical when compared and then one or both of them ends
380 // up pointing to a CFI instruction after being incremented. For example:
381 /*
382 BB1:
383 ...
384 INSTRUCTION_A
385 ADD32ri8 <- last common instruction
386 ...
387 BB2:
388 ...
389 INSTRUCTION_B
390 CFI_INSTRUCTION
391 ADD32ri8 <- last common instruction
392 ...
393 */
394 // When INSTRUCTION_A and INSTRUCTION_B are compared as not equal, after
395 // incrementing the iterators, I1 will point to ADD, however I2 will point to
396 // the CFI instruction. Later on, this leads to BB2 being 'hacked off' at the
397 // wrong place (in ReplaceTailWithBranchTo()) which results in losing this CFI
398 // instruction.
399 while (I1 != MBB1->end() && I1->isCFIInstruction()) {
400 ++I1;
401 }
402
403 while (I2 != MBB2->end() && I2->isCFIInstruction()) {
404 ++I2;
405 }
406
370407 return TailLen;
371408 }
372409
453490 MachineBasicBlock::iterator E) {
454491 unsigned Time = 0;
455492 for (; I != E; ++I) {
456 if (I->isDebugValue())
493 if (!countsAsInstruction(*I))
457494 continue;
458495 if (I->isCall())
459496 Time += 10;
813850 assert(MBBI != MBBIE && "Reached BB end within common tail length!");
814851 (void)MBBIE;
815852
816 if (MBBI->isDebugValue()) {
853 if (!countsAsInstruction(*MBBI)) {
817854 ++MBBI;
818855 continue;
819856 }
820857
821 while ((MBBICommon != MBBIECommon) && MBBICommon->isDebugValue())
858 while ((MBBICommon != MBBIECommon) && !countsAsInstruction(*MBBICommon))
822859 ++MBBICommon;
823860
824861 assert(MBBICommon != MBBIECommon &&
858895 }
859896
860897 for (auto &MI : *MBB) {
861 if (MI.isDebugValue())
898 if (!countsAsInstruction(MI))
862899 continue;
863900 DebugLoc DL = MI.getDebugLoc();
864901 for (unsigned int i = 0 ; i < NextCommonInsts.size() ; i++) {
868905 auto &Pos = NextCommonInsts[i];
869906 assert(Pos != SameTails[i].getBlock()->end() &&
870907 "Reached BB end within common tail");
871 while (Pos->isDebugValue()) {
908 while (!countsAsInstruction(*Pos)) {
872909 ++Pos;
873910 assert(Pos != SameTails[i].getBlock()->end() &&
874911 "Reached BB end within common tail");
0 //===------ CFIInstrInserter.cpp - Insert additional CFI instructions -----===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file This pass verifies incoming and outgoing CFA information of basic
10 /// blocks. CFA information is information about offset and register set by CFI
11 /// directives, valid at the start and end of a basic block. This pass checks
12 /// that outgoing information of predecessors matches incoming information of
13 /// their successors. Then it checks if blocks have correct CFA calculation rule
14 /// set and inserts additional CFI instruction at their beginnings if they
15 /// don't. CFI instructions are inserted if basic blocks have incorrect offset
16 /// or register set by previous blocks, as a result of a non-linear layout of
17 /// blocks in a function.
18 //===----------------------------------------------------------------------===//
19
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineModuleInfo.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/CodeGen/TargetFrameLowering.h"
25 #include "llvm/Target/TargetInstrInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/Target/TargetSubtargetInfo.h"
28 using namespace llvm;
29
30 namespace {
31 class CFIInstrInserter : public MachineFunctionPass {
32 public:
33 static char ID;
34
35 CFIInstrInserter() : MachineFunctionPass(ID) {
36 initializeCFIInstrInserterPass(*PassRegistry::getPassRegistry());
37 }
38
39 void getAnalysisUsage(AnalysisUsage &AU) const override {
40 AU.setPreservesAll();
41 MachineFunctionPass::getAnalysisUsage(AU);
42 }
43
44 bool runOnMachineFunction(MachineFunction &MF) override {
45
46 if (!MF.getMMI().hasDebugInfo() &&
47 !MF.getFunction()->needsUnwindTableEntry())
48 return false;
49
50 MBBVector.resize(MF.getNumBlockIDs());
51 calculateCFAInfo(MF);
52 #ifndef NDEBUG
53 unsigned ErrorNum = verify(MF);
54 if (ErrorNum)
55 report_fatal_error("Found " + Twine(ErrorNum) +
56 " in/out CFI information errors.");
57 #endif
58 bool insertedCFI = insertCFIInstrs(MF);
59 MBBVector.clear();
60 return insertedCFI;
61 }
62
63 private:
64 struct MBBCFAInfo {
65 MachineBasicBlock *MBB;
66 /// Value of cfa offset valid at basic block entry.
67 int IncomingCFAOffset = -1;
68 /// Value of cfa offset valid at basic block exit.
69 int OutgoingCFAOffset = -1;
70 /// Value of cfa register valid at basic block entry.
71 unsigned IncomingCFARegister = 0;
72 /// Value of cfa register valid at basic block exit.
73 unsigned OutgoingCFARegister = 0;
74 /// If in/out cfa offset and register values for this block have already
75 /// been set or not.
76 bool Processed = false;
77 };
78
79 /// Contains cfa offset and register values valid at entry and exit of basic
80 /// blocks.
81 SmallVector MBBVector;
82
83 /// Calculate cfa offset and register values valid at entry and exit for all
84 /// basic blocks in a function.
85 void calculateCFAInfo(MachineFunction &MF);
86 /// Calculate cfa offset and register values valid at basic block exit by
87 /// checking the block for CFI instructions. Block's incoming CFA info remains
88 /// the same.
89 void calculateOutgoingCFAInfo(struct MBBCFAInfo &MBBInfo);
90 /// Update in/out cfa offset and register values for successors of the basic
91 /// block.
92 void updateSuccCFAInfo(struct MBBCFAInfo &MBBInfo);
93
94 /// Check if incoming CFA information of a basic block matches outgoing CFA
95 /// information of the previous block. If it doesn't, insert CFI instruction
96 /// at the beginning of the block that corrects the CFA calculation rule for
97 /// that block.
98 bool insertCFIInstrs(MachineFunction &MF);
99 /// Return the cfa offset value that should be set at the beginning of a MBB
100 /// if needed. The negated value is needed when creating CFI instructions that
101 /// set absolute offset.
102 int getCorrectCFAOffset(MachineBasicBlock *MBB) {
103 return -MBBVector[MBB->getNumber()].IncomingCFAOffset;
104 }
105
106 void report(const char *msg, MachineBasicBlock &MBB);
107 /// Go through each MBB in a function and check that outgoing offset and
108 /// register of its predecessors match incoming offset and register of that
109 /// MBB, as well as that incoming offset and register of its successors match
110 /// outgoing offset and register of the MBB.
111 unsigned verify(MachineFunction &MF);
112 };
113 }
114
115 char CFIInstrInserter::ID = 0;
116 INITIALIZE_PASS(CFIInstrInserter, "cfi-instr-inserter",
117 "Check CFA info and insert CFI instructions if needed", false,
118 false)
119 FunctionPass *llvm::createCFIInstrInserter() { return new CFIInstrInserter(); }
120
121 void CFIInstrInserter::calculateCFAInfo(MachineFunction &MF) {
122 // Initial CFA offset value i.e. the one valid at the beginning of the
123 // function.
124 int InitialOffset =
125 MF.getSubtarget().getFrameLowering()->getInitialCFAOffset(MF);
126 // Initial CFA register value i.e. the one valid at the beginning of the
127 // function.
128 unsigned InitialRegister =
129 MF.getSubtarget().getFrameLowering()->getInitialCFARegister(MF);
130
131 // Initialize MBBMap.
132 for (MachineBasicBlock &MBB : MF) {
133 struct MBBCFAInfo MBBInfo;
134 MBBInfo.MBB = &MBB;
135 MBBInfo.IncomingCFAOffset = InitialOffset;
136 MBBInfo.OutgoingCFAOffset = InitialOffset;
137 MBBInfo.IncomingCFARegister = InitialRegister;
138 MBBInfo.OutgoingCFARegister = InitialRegister;
139 MBBVector[MBB.getNumber()] = MBBInfo;
140 }
141
142 // Set in/out cfa info for all blocks in the function. This traversal is based
143 // on the assumption that the first block in the function is the entry block
144 // i.e. that it has initial cfa offset and register values as incoming CFA
145 // information.
146 for (MachineBasicBlock &MBB : MF) {
147 if (MBBVector[MBB.getNumber()].Processed) continue;
148 calculateOutgoingCFAInfo(MBBVector[MBB.getNumber()]);
149 updateSuccCFAInfo(MBBVector[MBB.getNumber()]);
150 }
151 }
152
153 void CFIInstrInserter::calculateOutgoingCFAInfo(struct MBBCFAInfo &MBBInfo) {
154 // Outgoing cfa offset set by the block.
155 int SetOffset = MBBInfo.IncomingCFAOffset;
156 // Outgoing cfa register set by the block.
157 unsigned SetRegister = MBBInfo.IncomingCFARegister;
158 const std::vector &Instrs =
159 MBBInfo.MBB->getParent()->getFrameInstructions();
160
161 // Determine cfa offset and register set by the block.
162 for (MachineInstr &MI :
163 make_range(MBBInfo.MBB->instr_begin(), MBBInfo.MBB->instr_end())) {
164 if (MI.isCFIInstruction()) {
165 unsigned CFIIndex = MI.getOperand(0).getCFIIndex();
166 const MCCFIInstruction &CFI = Instrs[CFIIndex];
167 if (CFI.getOperation() == MCCFIInstruction::OpDefCfaRegister) {
168 SetRegister = CFI.getRegister();
169 } else if (CFI.getOperation() == MCCFIInstruction::OpDefCfaOffset) {
170 SetOffset = CFI.getOffset();
171 } else if (CFI.getOperation() == MCCFIInstruction::OpAdjustCfaOffset) {
172 SetOffset += CFI.getOffset();
173 } else if (CFI.getOperation() == MCCFIInstruction::OpDefCfa) {
174 SetRegister = CFI.getRegister();
175 SetOffset = CFI.getOffset();
176 }
177 }
178 }
179
180 MBBInfo.Processed = true;
181
182 // Update outgoing CFA info.
183 MBBInfo.OutgoingCFAOffset = SetOffset;
184 MBBInfo.OutgoingCFARegister = SetRegister;
185 }
186
187 void CFIInstrInserter::updateSuccCFAInfo(struct MBBCFAInfo &MBBInfo) {
188
189 for (MachineBasicBlock *Succ : MBBInfo.MBB->successors()) {
190 struct MBBCFAInfo &SuccInfo = MBBVector[Succ->getNumber()];
191 if (SuccInfo.Processed) continue;
192 SuccInfo.IncomingCFAOffset = MBBInfo.OutgoingCFAOffset;
193 SuccInfo.IncomingCFARegister = MBBInfo.OutgoingCFARegister;
194 calculateOutgoingCFAInfo(SuccInfo);
195 updateSuccCFAInfo(SuccInfo);
196 }
197 }
198
199 bool CFIInstrInserter::insertCFIInstrs(MachineFunction &MF) {
200
201 const struct MBBCFAInfo *PrevMBBInfo = &MBBVector[MF.front().getNumber()];
202 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
203 bool InsertedCFIInstr = false;
204
205 for (MachineBasicBlock &MBB : MF) {
206 // Skip the first MBB in a function
207 if (MBB.getNumber() == MF.front().getNumber()) continue;
208
209 const struct MBBCFAInfo& MBBInfo = MBBVector[MBB.getNumber()];
210 auto MBBI = MBBInfo.MBB->begin();
211 DebugLoc DL = MBBInfo.MBB->findDebugLoc(MBBI);
212
213 if (PrevMBBInfo->OutgoingCFAOffset != MBBInfo.IncomingCFAOffset) {
214 // If both outgoing offset and register of a previous block don't match
215 // incoming offset and register of this block, add a def_cfa instruction
216 // with the correct offset and register for this block.
217 if (PrevMBBInfo->OutgoingCFARegister != MBBInfo.IncomingCFARegister) {
218 unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfa(
219 nullptr, MBBInfo.IncomingCFARegister, getCorrectCFAOffset(&MBB)));
220 BuildMI(*MBBInfo.MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
221 .addCFIIndex(CFIIndex);
222 // If outgoing offset of a previous block doesn't match incoming offset
223 // of this block, add a def_cfa_offset instruction with the correct
224 // offset for this block.
225 } else {
226 unsigned CFIIndex =
227 MF.addFrameInst(MCCFIInstruction::createDefCfaOffset(
228 nullptr, getCorrectCFAOffset(&MBB)));
229 BuildMI(*MBBInfo.MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
230 .addCFIIndex(CFIIndex);
231 }
232 InsertedCFIInstr = true;
233 // If outgoing register of a previous block doesn't match incoming
234 // register of this block, add a def_cfa_register instruction with the
235 // correct register for this block.
236 } else if (PrevMBBInfo->OutgoingCFARegister != MBBInfo.IncomingCFARegister) {
237 unsigned CFIIndex =
238 MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(
239 nullptr, MBBInfo.IncomingCFARegister));
240 BuildMI(*MBBInfo.MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
241 .addCFIIndex(CFIIndex);
242 InsertedCFIInstr = true;
243 }
244 PrevMBBInfo = &MBBInfo;
245 }
246 return InsertedCFIInstr;
247 }
248
249 void CFIInstrInserter::report(const char *msg, MachineBasicBlock &MBB) {
250 errs() << '\n';
251 errs() << "*** " << msg << " ***\n"
252 << "- function: " << MBB.getParent()->getName() << "\n";
253 errs() << "- basic block: BB#" << MBB.getNumber() << ' ' << MBB.getName()
254 << " (" << (const void *)&MBB << ')';
255 errs() << '\n';
256 }
257
258 unsigned CFIInstrInserter::verify(MachineFunction &MF) {
259 unsigned ErrorNum = 0;
260 for (MachineBasicBlock &CurrMBB : MF) {
261 const struct MBBCFAInfo& CurrMBBInfo = MBBVector[CurrMBB.getNumber()];
262 for (MachineBasicBlock *Pred : CurrMBB.predecessors()) {
263 const struct MBBCFAInfo& PredMBBInfo = MBBVector[Pred->getNumber()];
264 // Check that outgoing offset values of predecessors match the incoming
265 // offset value of CurrMBB
266 if (PredMBBInfo.OutgoingCFAOffset != CurrMBBInfo.IncomingCFAOffset) {
267 report("The outgoing offset of a predecessor is inconsistent.",
268 CurrMBB);
269 errs() << "Predecessor BB#" << Pred->getNumber()
270 << " has outgoing offset (" << PredMBBInfo.OutgoingCFAOffset
271 << "), while BB#" << CurrMBB.getNumber()
272 << " has incoming offset (" << CurrMBBInfo.IncomingCFAOffset
273 << ").\n";
274 ErrorNum++;
275 }
276 // Check that outgoing register values of predecessors match the incoming
277 // register value of CurrMBB
278 if (PredMBBInfo.OutgoingCFARegister != CurrMBBInfo.IncomingCFARegister) {
279 report("The outgoing register of a predecessor is inconsistent.",
280 CurrMBB);
281 errs() << "Predecessor BB#" << Pred->getNumber()
282 << " has outgoing register (" << PredMBBInfo.OutgoingCFARegister
283 << "), while BB#" << CurrMBB.getNumber()
284 << " has incoming register (" << CurrMBBInfo.IncomingCFARegister
285 << ").\n";
286 ErrorNum++;
287 }
288 }
289
290 for (MachineBasicBlock *Succ : CurrMBB.successors()) {
291 const struct MBBCFAInfo& SuccMBBInfo = MBBVector[Succ->getNumber()];
292 // Check that incoming offset values of successors match the outgoing
293 // offset value of CurrMBB
294 if (SuccMBBInfo.IncomingCFAOffset != CurrMBBInfo.OutgoingCFAOffset) {
295 report("The incoming offset of a successor is inconsistent.", CurrMBB);
296 errs() << "Successor BB#" << Succ->getNumber()
297 << " has incoming offset (" << SuccMBBInfo.IncomingCFAOffset
298 << "), while BB#" << CurrMBB.getNumber()
299 << " has outgoing offset (" << CurrMBBInfo.OutgoingCFAOffset
300 << ").\n";
301 ErrorNum++;
302 }
303 // Check that incoming register values of successors match the outgoing
304 // register value of CurrMBB
305 if (SuccMBBInfo.IncomingCFARegister != CurrMBBInfo.OutgoingCFARegister) {
306 report("The incoming register of a successor is inconsistent.",
307 CurrMBB);
308 errs() << "Successor BB#" << Succ->getNumber()
309 << " has incoming register (" << SuccMBBInfo.IncomingCFARegister
310 << "), while BB#" << CurrMBB.getNumber()
311 << " has outgoing register (" << CurrMBBInfo.OutgoingCFARegister
312 << ").\n";
313 ErrorNum++;
314 }
315 }
316 }
317 return ErrorNum;
318 }
88 BuiltinGCs.cpp
99 CalcSpillWeights.cpp
1010 CallingConvLower.cpp
11 CFIInstrInserter.cpp
1112 CodeGen.cpp
1213 CodeGenPrepare.cpp
1314 CountingFunctionInserter.cpp
2222 initializeAtomicExpandPass(Registry);
2323 initializeBranchFolderPassPass(Registry);
2424 initializeBranchRelaxationPass(Registry);
25 initializeCFIInstrInserterPass(Registry);
2526 initializeCodeGenPreparePass(Registry);
2627 initializeCountingFunctionInserterPass(Registry);
2728 initializeDeadMachineInstructionElimPass(Registry);
319319 }
320320 case MachineOperand::MO_MCSymbol:
321321 return getMCSymbol() == Other.getMCSymbol();
322 case MachineOperand::MO_CFIIndex:
323 return getCFIIndex() == Other.getCFIIndex();
322 case MachineOperand::MO_CFIIndex: {
323 const MachineFunction *MF = getParent()->getParent()->getParent();
324 const MachineFunction *OtherMF =
325 Other.getParent()->getParent()->getParent();
326 MCCFIInstruction Inst = MF->getFrameInstructions()[getCFIIndex()];
327 MCCFIInstruction OtherInst =
328 OtherMF->getFrameInstructions()[Other.getCFIIndex()];
329 MCCFIInstruction::OpType op = Inst.getOperation();
330 if (op != OtherInst.getOperation()) return false;
331 switch (op) {
332 case MCCFIInstruction::OpDefCfa:
333 case MCCFIInstruction::OpOffset:
334 case MCCFIInstruction::OpRelOffset:
335 if (Inst.getRegister() != OtherInst.getRegister()) return false;
336 if (Inst.getOffset() != OtherInst.getOffset()) return false;
337 break;
338 case MCCFIInstruction::OpRestore:
339 case MCCFIInstruction::OpUndefined:
340 case MCCFIInstruction::OpSameValue:
341 case MCCFIInstruction::OpDefCfaRegister:
342 if (Inst.getRegister() != OtherInst.getRegister()) return false;
343 break;
344 case MCCFIInstruction::OpRegister:
345 if (Inst.getRegister() != OtherInst.getRegister()) return false;
346 if (Inst.getRegister2() != OtherInst.getRegister2()) return false;
347 break;
348 case MCCFIInstruction::OpDefCfaOffset:
349 case MCCFIInstruction::OpAdjustCfaOffset:
350 case MCCFIInstruction::OpGnuArgsSize:
351 if (Inst.getOffset() != OtherInst.getOffset()) return false;
352 break;
353 case MCCFIInstruction::OpRememberState:
354 case MCCFIInstruction::OpRestoreState:
355 case MCCFIInstruction::OpEscape:
356 case MCCFIInstruction::OpWindowSave:
357 break;
358 }
359 return true;
360 }
324361 case MachineOperand::MO_Metadata:
325362 return getMetadata() == Other.getMetadata();
326363 case MachineOperand::MO_IntrinsicID:
369406 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMetadata());
370407 case MachineOperand::MO_MCSymbol:
371408 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMCSymbol());
372 case MachineOperand::MO_CFIIndex:
373 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCFIIndex());
409 case MachineOperand::MO_CFIIndex: {
410 const MachineFunction *MF = MO.getParent()->getParent()->getParent();
411 MCCFIInstruction Inst = MF->getFrameInstructions()[MO.getCFIIndex()];
412 return hash_combine(MO.getType(), MO.getTargetFlags(), Inst.getOperation(),
413 Inst.getRegister(), Inst.getRegister2(),
414 Inst.getOffset());
415 }
374416 case MachineOperand::MO_IntrinsicID:
375417 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getIntrinsicID());
376418 case MachineOperand::MO_Predicate:
602602 if (PreRegAlloc && MI.isCall())
603603 return false;
604604
605 if (!MI.isPHI() && !MI.isDebugValue())
606 InstrCount += 1;
605 if (!MI.isPHI() && !MI.isMetaInstruction())
606 InstrCount += 1;
607607
608608 if (InstrCount > MaxDuplicateCount)
609609 return false;
103103
104104 return 0;
105105 }
106
107 int TargetFrameLowering::getInitialCFAOffset(const MachineFunction &MF) const {
108 llvm_unreachable("getInitialCFAOffset() not implemented!");
109 }
110
111 unsigned TargetFrameLowering::getInitialCFARegister(const MachineFunction &MF)
112 const {
113 llvm_unreachable("getInitialCFARegister() not implemented!");
114 }
15611561 bool HasFP = hasFP(MF);
15621562 uint64_t NumBytes = 0;
15631563
1564 bool NeedsDwarfCFI =
1565 (!MF.getTarget().getTargetTriple().isOSDarwin() &&
1566 !MF.getTarget().getTargetTriple().isOSWindows()) &&
1567 (MF.getMMI().hasDebugInfo() || MF.getFunction()->needsUnwindTableEntry());
1568
15641569 if (IsFunclet) {
15651570 assert(HasFP && "EH funclets without FP not yet implemented");
15661571 NumBytes = getWinEHFuncletFrameSize(MF);
15831588 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
15841589 MachineFramePtr)
15851590 .setMIFlag(MachineInstr::FrameDestroy);
1591 if (NeedsDwarfCFI) {
1592 unsigned DwarfStackPtr =
1593 TRI->getDwarfRegNum(Is64Bit ? X86::RSP : X86::ESP, true);
1594 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfa(
1595 nullptr, DwarfStackPtr, -SlotSize));
1596 --MBBI;
1597 }
15861598 }
15871599
15881600 MachineBasicBlock::iterator FirstCSPop = MBBI;
16461658 } else if (NumBytes) {
16471659 // Adjust stack pointer back: ESP += numbytes.
16481660 emitSPUpdate(MBB, MBBI, NumBytes, /*InEpilogue=*/true);
1661 if (!hasFP(MF) && NeedsDwarfCFI) {
1662 // Define the current CFA rule to use the provided offset.
1663 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfaOffset(
1664 nullptr, -CSSize - SlotSize));
1665 }
16491666 --MBBI;
16501667 }
16511668
16571674 // final emitted code.
16581675 if (NeedsWin64CFI && MF.hasWinCFI())
16591676 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));
1677
1678 if (!hasFP(MF) && NeedsDwarfCFI) {
1679 MBBI = FirstCSPop;
1680 int64_t Offset = -CSSize - SlotSize;
1681 // Mark callee-saved pop instruction.
1682 // Define the current CFA rule to use the provided offset.
1683 while (MBBI != MBB.end()) {
1684 MachineBasicBlock::iterator PI = MBBI;
1685 unsigned Opc = PI->getOpcode();
1686 ++MBBI;
1687 if (Opc == X86::POP32r || Opc == X86::POP64r) {
1688 Offset += SlotSize;
1689 BuildCFI(MBB, MBBI, DL,
1690 MCCFIInstruction::createDefCfaOffset(nullptr, Offset));
1691 }
1692 }
1693 }
16601694
16611695 if (Terminator == MBB.end() || !isTailCallOpcode(Terminator->getOpcode())) {
16621696 // Add the return addr area delta back since we are not tail calling.
28392873 return MBBI;
28402874 }
28412875
2876 int X86FrameLowering::getInitialCFAOffset(const MachineFunction &MF) const {
2877 return TRI->getSlotSize();
2878 }
2879
2880 unsigned X86FrameLowering::getInitialCFARegister(const MachineFunction &MF)
2881 const {
2882 return TRI->getDwarfRegNum(StackPtr, true);
2883 }
2884
28422885 namespace {
28432886 // Struct used by orderFrameObjects to help sort the stack objects.
28442887 struct X86FrameSortingObject {
167167 MachineBasicBlock::iterator MBBI,
168168 const DebugLoc &DL, bool RestoreSP = false) const;
169169
170 int getInitialCFAOffset(const MachineFunction &MF) const override;
171
172 unsigned getInitialCFARegister(const MachineFunction &MF) const override;
173
170174 private:
171175 uint64_t calculateMaxStackAlign(const MachineFunction &MF) const;
172176
435435 addPass(createX86FixupLEAs());
436436 addPass(createX86EvexToVexInsts());
437437 }
438 }
438
439 // Verify basic block incoming and outgoing cfa offset and register values and
440 // correct CFA calculation rule where needed by inserting appropriate CFI
441 // instructions.
442 const Triple &TT = TM->getTargetTriple();
443 if (!TT.isOSDarwin() && !TT.isOSWindows())
444 addPass(createCFIInstrInserter());
445 }
2222 }
2323
2424 ; CHECK: lpad
25 ; CHECK-NEXT: .cfi_def_cfa_offset 16
2526 ; CHECK-NEXT: Ltmp
2627
2728 declare i32 @__gxx_personality_v0(...)
8787 ; X32-NEXT: movss %xmm4, {{[0-9]+}}(%esp)
8888 ; X32-NEXT: movss %xmm0, {{[0-9]+}}(%esp)
8989 ; X32-NEXT: addl $60, %esp
90 ; X32-NEXT: .cfi_def_cfa_offset 4
9091 ; X32-NEXT: retl
9192 ;
9293 ; X64-LABEL: full_test:
1919 ; X32-NEXT: addl 8(%ebp), %eax
2020 ; X32-NEXT: adcl 12(%ebp), %edx
2121 ; X32-NEXT: popl %ebp
22 ; X32-NEXT: .cfi_def_cfa %esp, 4
2223 ; X32-NEXT: retl
2324 %ret = add i64 %arg1, %arg2
2425 ret i64 %ret
3535 ; X32-NEXT: movl %eax, (%esp)
3636 ; X32-NEXT: movl (%esp), %eax
3737 ; X32-NEXT: popl %ecx
38 ; X32-NEXT: .cfi_def_cfa_offset 4
3839 ; X32-NEXT: retl
3940 entry:
4041 %retval = alloca i32, align 4
116116 ; X32-NEXT: movups 16(%esp), %xmm1
117117 ; X32-NEXT: movaps %xmm2, %xmm0
118118 ; X32-NEXT: addl $12, %esp
119 ; X32-NEXT: .cfi_def_cfa_offset 4
119120 ; X32-NEXT: retl
120121 ;
121122 ; X64-LABEL: test_v8i32_args:
134135 ; X32-NEXT: .cfi_def_cfa_offset 16
135136 ; X32-NEXT: calll trivial_callee
136137 ; X32-NEXT: addl $12, %esp
138 ; X32-NEXT: .cfi_def_cfa_offset 4
137139 ; X32-NEXT: retl
138140 ;
139141 ; X64-LABEL: test_trivial_call:
142144 ; X64-NEXT: .cfi_def_cfa_offset 16
143145 ; X64-NEXT: callq trivial_callee
144146 ; X64-NEXT: popq %rax
147 ; X64-NEXT: .cfi_def_cfa_offset 8
145148 ; X64-NEXT: retq
146149 call void @trivial_callee()
147150 ret void
159162 ; X32-NEXT: movl %eax, 4(%esp)
160163 ; X32-NEXT: calll simple_arg_callee
161164 ; X32-NEXT: addl $12, %esp
165 ; X32-NEXT: .cfi_def_cfa_offset 4
162166 ; X32-NEXT: retl
163167 ;
164168 ; X64-LABEL: test_simple_arg_call:
170174 ; X64-NEXT: movl %eax, %esi
171175 ; X64-NEXT: callq simple_arg_callee
172176 ; X64-NEXT: popq %rax
177 ; X64-NEXT: .cfi_def_cfa_offset 8
173178 ; X64-NEXT: retq
174179 call void @simple_arg_callee(i32 %in1, i32 %in0)
175180 ret void
192197 ; X32-NEXT: movl %eax, 28(%esp)
193198 ; X32-NEXT: calll simple_arg8_callee
194199 ; X32-NEXT: addl $44, %esp
200 ; X32-NEXT: .cfi_def_cfa_offset 4
195201 ; X32-NEXT: retl
196202 ;
197203 ; X64-LABEL: test_simple_arg8_call:
207213 ; X64-NEXT: movl %edi, %r9d
208214 ; X64-NEXT: callq simple_arg8_callee
209215 ; X64-NEXT: addq $24, %rsp
216 ; X64-NEXT: .cfi_def_cfa_offset 8
210217 ; X64-NEXT: retq
211218 call void @simple_arg8_callee(i32 %in0, i32 %in0, i32 %in0, i32 %in0,i32 %in0, i32 %in0, i32 %in0, i32 %in0)
212219 ret void
223230 ; X32-NEXT: calll simple_return_callee
224231 ; X32-NEXT: addl %eax, %eax
225232 ; X32-NEXT: addl $12, %esp
233 ; X32-NEXT: .cfi_def_cfa_offset 4
226234 ; X32-NEXT: retl
227235 ;
228236 ; X64-LABEL: test_simple_return_callee:
233241 ; X64-NEXT: callq simple_return_callee
234242 ; X64-NEXT: addl %eax, %eax
235243 ; X64-NEXT: popq %rcx
244 ; X64-NEXT: .cfi_def_cfa_offset 8
236245 ; X64-NEXT: retq
237246 %call = call i32 @simple_return_callee(i32 5)
238247 %r = add i32 %call, %call
253262 ; X32-NEXT: paddd (%esp), %xmm0 # 16-byte Folded Reload
254263 ; X32-NEXT: paddd 16(%esp), %xmm1 # 16-byte Folded Reload
255264 ; X32-NEXT: addl $44, %esp
265 ; X32-NEXT: .cfi_def_cfa_offset 4
256266 ; X32-NEXT: retl
257267 ;
258268 ; X64-LABEL: test_split_return_callee:
267277 ; X64-NEXT: paddd (%rsp), %xmm0 # 16-byte Folded Reload
268278 ; X64-NEXT: paddd 16(%rsp), %xmm1 # 16-byte Folded Reload
269279 ; X64-NEXT: addq $40, %rsp
280 ; X64-NEXT: .cfi_def_cfa_offset 8
270281 ; X64-NEXT: retq
271282 %call = call <8 x i32> @split_return_callee(<8 x i32> %arg2)
272283 %r = add <8 x i32> %arg1, %call
280291 ; X32-NEXT: .cfi_def_cfa_offset 16
281292 ; X32-NEXT: calll *16(%esp)
282293 ; X32-NEXT: addl $12, %esp
294 ; X32-NEXT: .cfi_def_cfa_offset 4
283295 ; X32-NEXT: retl
284296 ;
285297 ; X64-LABEL: test_indirect_call:
288300 ; X64-NEXT: .cfi_def_cfa_offset 16
289301 ; X64-NEXT: callq *%rdi
290302 ; X64-NEXT: popq %rax
303 ; X64-NEXT: .cfi_def_cfa_offset 8
291304 ; X64-NEXT: retq
292305 call void %func()
293306 ret void
316329 ; X32-NEXT: movl %esi, (%esp)
317330 ; X32-NEXT: calll take_char
318331 ; X32-NEXT: addl $4, %esp
332 ; X32-NEXT: .cfi_def_cfa_offset 12
319333 ; X32-NEXT: popl %esi
334 ; X32-NEXT: .cfi_def_cfa_offset 8
320335 ; X32-NEXT: popl %ebx
336 ; X32-NEXT: .cfi_def_cfa_offset 4
321337 ; X32-NEXT: retl
322338 ;
323339 ; X64-LABEL: test_abi_exts_call:
334350 ; X64-NEXT: movl %ebx, %edi
335351 ; X64-NEXT: callq take_char
336352 ; X64-NEXT: popq %rbx
353 ; X64-NEXT: .cfi_def_cfa_offset 8
337354 ; X64-NEXT: retq
338355 %val = load i8, i8* %addr
339356 call void @take_char(i8 %val)
356373 ; X32-NEXT: movl %ecx, 4(%esp)
357374 ; X32-NEXT: calll variadic_callee
358375 ; X32-NEXT: addl $12, %esp
376 ; X32-NEXT: .cfi_def_cfa_offset 4
359377 ; X32-NEXT: retl
360378 ;
361379 ; X64-LABEL: test_variadic_call_1:
367385 ; X64-NEXT: movb $0, %al
368386 ; X64-NEXT: callq variadic_callee
369387 ; X64-NEXT: popq %rax
388 ; X64-NEXT: .cfi_def_cfa_offset 8
370389 ; X64-NEXT: retq
371390
372391 %addr = load i8*, i8** %addr_ptr
392411 ; X32-NEXT: movl %ecx, 4(%eax)
393412 ; X32-NEXT: calll variadic_callee
394413 ; X32-NEXT: addl $12, %esp
414 ; X32-NEXT: .cfi_def_cfa_offset 4
395415 ; X32-NEXT: retl
396416 ;
397417 ; X64-LABEL: test_variadic_call_2:
404424 ; X64-NEXT: movq %rcx, %xmm0
405425 ; X64-NEXT: callq variadic_callee
406426 ; X64-NEXT: popq %rax
427 ; X64-NEXT: .cfi_def_cfa_offset 8
407428 ; X64-NEXT: retq
408429
409430 %addr = load i8*, i8** %addr_ptr
1717 ; X32-NEXT: .cfi_def_cfa_offset 8
1818 ; X32-NEXT: movl %esp, %eax
1919 ; X32-NEXT: popl %ecx
20 ; X32-NEXT: .cfi_def_cfa_offset 4
2021 ; X32-NEXT: retl
2122 ;
2223 ; X32ABI-LABEL: allocai32:
4848 ; CHECK-NEXT: X86 pseudo instruction expansion pass
4949 ; CHECK-NEXT: Analyze Machine Code For Garbage Collection
5050 ; CHECK-NEXT: X86 vzeroupper inserter
51 ; CHECK-NEXT: Check CFA info and insert CFI instructions if needed
5152 ; CHECK-NEXT: Contiguously Lay Out Funclets
5253 ; CHECK-NEXT: StackMap Liveness Analysis
5354 ; CHECK-NEXT: Live DEBUG_VALUE analysis
2424 ; CHECK-NEXT: subq %rcx, %rax
2525 ; CHECK-NEXT: shrq $32, %rax
2626 ; CHECK-NEXT: popq %rcx
27 ; CHECK-NEXT: .cfi_def_cfa_offset 8
2728 ; CHECK-NEXT: retq
2829 %b = call i64 @foo()
2930 %or = and i64 %b, 18446744069414584575 ; this is 0xffffffff000000ff
698698 ; AVX512BW-NEXT: jg LBB17_1
699699 ; AVX512BW-NEXT: ## BB#2:
700700 ; AVX512BW-NEXT: vpcmpltud %zmm2, %zmm1, %k0
701 ; AVX512BW-NEXT: jmp LBB17_3
701 ; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
702 ; AVX512BW-NEXT: ## kill: %XMM0 %XMM0 %ZMM0
703 ; AVX512BW-NEXT: vzeroupper
704 ; AVX512BW-NEXT: retq
702705 ; AVX512BW-NEXT: LBB17_1:
703 ; AVX512BW-NEXT: vpcmpgtd %zmm2, %zmm0, %k0
704 ; AVX512BW-NEXT: LBB17_3:
705 ; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
706 ; AVX512BW-NEXT: vpcmpgtd %zmm2, %zmm0, %k0
707 ; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
706708 ; AVX512BW-NEXT: ## kill: %XMM0 %XMM0 %ZMM0
707709 ; AVX512BW-NEXT: vzeroupper
708710 ; AVX512BW-NEXT: retq
208208 ; LINUXOSX64-NEXT: pushq %rax
209209 ; LINUXOSX64-NEXT: .cfi_adjust_cfa_offset 8
210210 ; LINUXOSX64-NEXT: callq test_argv64i1
211 ; LINUXOSX64-NEXT: addq $24, %rsp
211 ; LINUXOSX64-NEXT: addq $16, %rsp
212212 ; LINUXOSX64-NEXT: .cfi_adjust_cfa_offset -16
213 ; LINUXOSX64-NEXT: addq $8, %rsp
214 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 40
213215 ; LINUXOSX64-NEXT: popq %r12
216 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 32
214217 ; LINUXOSX64-NEXT: popq %r13
218 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 24
215219 ; LINUXOSX64-NEXT: popq %r14
220 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 16
216221 ; LINUXOSX64-NEXT: popq %r15
222 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
217223 ; LINUXOSX64-NEXT: retq
218224 entry:
219225 %v0 = bitcast i64 4294967298 to <64 x i1>
286292 ; LINUXOSX64-NEXT: kmovq %rax, %k0
287293 ; LINUXOSX64-NEXT: vpmovm2b %k0, %zmm0
288294 ; LINUXOSX64-NEXT: popq %rax
295 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
289296 ; LINUXOSX64-NEXT: retq
290297 entry:
291298 %call = call x86_regcallcc <64 x i1> @test_retv64i1()
396403 ; LINUXOSX64-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm14 # 16-byte Reload
397404 ; LINUXOSX64-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm15 # 16-byte Reload
398405 ; LINUXOSX64-NEXT: addq $128, %rsp
406 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 16
399407 ; LINUXOSX64-NEXT: popq %rsp
408 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
400409 ; LINUXOSX64-NEXT: vzeroupper
401410 ; LINUXOSX64-NEXT: retq
402411 entry:
450459 ; LINUXOSX64-NEXT: movl $1, %edx
451460 ; LINUXOSX64-NEXT: callq test_argv32i1
452461 ; LINUXOSX64-NEXT: popq %rcx
462 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
453463 ; LINUXOSX64-NEXT: retq
454464 entry:
455465 %v0 = bitcast i32 1 to <32 x i1>
512522 ; LINUXOSX64-NEXT: callq test_retv32i1
513523 ; LINUXOSX64-NEXT: incl %eax
514524 ; LINUXOSX64-NEXT: popq %rcx
525 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
515526 ; LINUXOSX64-NEXT: retq
516527 entry:
517528 %call = call x86_regcallcc <32 x i1> @test_retv32i1()
625636 ; LINUXOSX64-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm14 # 16-byte Reload
626637 ; LINUXOSX64-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm15 # 16-byte Reload
627638 ; LINUXOSX64-NEXT: addq $128, %rsp
639 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 16
628640 ; LINUXOSX64-NEXT: popq %rsp
641 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
629642 ; LINUXOSX64-NEXT: retq
630643 %res = call i16 @test_argv16i1helper(<16 x i1> %x0, <16 x i1> %x1, <16 x i1> %x2)
631644 ret i16 %res
677690 ; LINUXOSX64-NEXT: movl $1, %edx
678691 ; LINUXOSX64-NEXT: callq test_argv16i1
679692 ; LINUXOSX64-NEXT: popq %rcx
693 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
680694 ; LINUXOSX64-NEXT: retq
681695 entry:
682696 %v0 = bitcast i16 1 to <16 x i1>
745759 ; LINUXOSX64-NEXT: incl %eax
746760 ; LINUXOSX64-NEXT: # kill: %AX %AX %EAX
747761 ; LINUXOSX64-NEXT: popq %rcx
762 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
748763 ; LINUXOSX64-NEXT: retq
749764 entry:
750765 %call = call x86_regcallcc <16 x i1> @test_retv16i1()
858873 ; LINUXOSX64-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm14 # 16-byte Reload
859874 ; LINUXOSX64-NEXT: vmovaps {{[0-9]+}}(%rsp), %xmm15 # 16-byte Reload
860875 ; LINUXOSX64-NEXT: addq $128, %rsp
876 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 16
861877 ; LINUXOSX64-NEXT: popq %rsp
878 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
862879 ; LINUXOSX64-NEXT: retq
863880 %res = call i8 @test_argv8i1helper(<8 x i1> %x0, <8 x i1> %x1, <8 x i1> %x2)
864881 ret i8 %res
910927 ; LINUXOSX64-NEXT: movl $1, %edx
911928 ; LINUXOSX64-NEXT: callq test_argv8i1
912929 ; LINUXOSX64-NEXT: popq %rcx
930 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
913931 ; LINUXOSX64-NEXT: retq
914932 entry:
915933 %v0 = bitcast i8 1 to <8 x i1>
9831001 ; LINUXOSX64-NEXT: vpmovm2w %k0, %zmm0
9841002 ; LINUXOSX64-NEXT: # kill: %XMM0 %XMM0 %ZMM0
9851003 ; LINUXOSX64-NEXT: popq %rax
1004 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
9861005 ; LINUXOSX64-NEXT: vzeroupper
9871006 ; LINUXOSX64-NEXT: retq
9881007 entry:
9891008 %call = call x86_regcallcc <8 x i1> @test_retv8i1()
9901009 ret <8 x i1> %call
9911010 }
1011
6262 ; LINUXOSX64-NEXT: callq test_argReti1
6363 ; LINUXOSX64-NEXT: incb %al
6464 ; LINUXOSX64-NEXT: popq %rsp
65 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
6566 ; LINUXOSX64-NEXT: retq
6667 %b = add i1 %a, 1
6768 %c = call x86_regcallcc i1 @test_argReti1(i1 %b)
129130 ; LINUXOSX64-NEXT: callq test_argReti8
130131 ; LINUXOSX64-NEXT: incb %al
131132 ; LINUXOSX64-NEXT: popq %rsp
133 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
132134 ; LINUXOSX64-NEXT: retq
133135 %b = add i8 %a, 1
134136 %c = call x86_regcallcc i8 @test_argReti8(i8 %b)
199201 ; LINUXOSX64-NEXT: incl %eax
200202 ; LINUXOSX64-NEXT: # kill: %AX %AX %EAX
201203 ; LINUXOSX64-NEXT: popq %rsp
204 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
202205 ; LINUXOSX64-NEXT: retq
203206 %b = add i16 %a, 1
204207 %c = call x86_regcallcc i16 @test_argReti16(i16 %b)
260263 ; LINUXOSX64-NEXT: callq test_argReti32
261264 ; LINUXOSX64-NEXT: incl %eax
262265 ; LINUXOSX64-NEXT: popq %rsp
266 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
263267 ; LINUXOSX64-NEXT: retq
264268 %b = add i32 %a, 1
265269 %c = call x86_regcallcc i32 @test_argReti32(i32 %b)
326330 ; LINUXOSX64-NEXT: callq test_argReti64
327331 ; LINUXOSX64-NEXT: incq %rax
328332 ; LINUXOSX64-NEXT: popq %rsp
333 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
329334 ; LINUXOSX64-NEXT: retq
330335 %b = add i64 %a, 1
331336 %c = call x86_regcallcc i64 @test_argReti64(i64 %b)
405410 ; LINUXOSX64-NEXT: vaddss %xmm8, %xmm0, %xmm0
406411 ; LINUXOSX64-NEXT: vmovaps (%rsp), %xmm8 # 16-byte Reload
407412 ; LINUXOSX64-NEXT: addq $16, %rsp
413 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 16
408414 ; LINUXOSX64-NEXT: popq %rsp
415 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
409416 ; LINUXOSX64-NEXT: retq
410417 %b = fadd float 1.0, %a
411418 %c = call x86_regcallcc float @test_argRetFloat(float %b)
485492 ; LINUXOSX64-NEXT: vaddsd %xmm8, %xmm0, %xmm0
486493 ; LINUXOSX64-NEXT: vmovaps (%rsp), %xmm8 # 16-byte Reload
487494 ; LINUXOSX64-NEXT: addq $16, %rsp
495 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 16
488496 ; LINUXOSX64-NEXT: popq %rsp
497 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
489498 ; LINUXOSX64-NEXT: retq
490499 %b = fadd double 1.0, %a
491500 %c = call x86_regcallcc double @test_argRetDouble(double %b)
547556 ; LINUXOSX64-NEXT: callq test_argRetf80
548557 ; LINUXOSX64-NEXT: fadd %st(0), %st(0)
549558 ; LINUXOSX64-NEXT: popq %rsp
559 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
550560 ; LINUXOSX64-NEXT: retq
551561 %b = fadd x86_fp80 %a, %a
552562 %c = call x86_regcallcc x86_fp80 @test_argRetf80(x86_fp80 %b)
610620 ; LINUXOSX64-NEXT: callq test_argRetPointer
611621 ; LINUXOSX64-NEXT: incl %eax
612622 ; LINUXOSX64-NEXT: popq %rsp
623 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
613624 ; LINUXOSX64-NEXT: retq
614625 %b = ptrtoint [4 x i32]* %a to i32
615626 %c = add i32 %b, 1
693704 ; LINUXOSX64-NEXT: vmovdqa32 %xmm8, %xmm0 {%k1}
694705 ; LINUXOSX64-NEXT: vmovaps (%rsp), %xmm8 # 16-byte Reload
695706 ; LINUXOSX64-NEXT: addq $16, %rsp
707 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 16
696708 ; LINUXOSX64-NEXT: popq %rsp
709 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
697710 ; LINUXOSX64-NEXT: retq
698711 %b = call x86_regcallcc <4 x i32> @test_argRet128Vector(<4 x i32> %a, <4 x i32> %a)
699712 %c = select <4 x i1> undef , <4 x i32> %a, <4 x i32> %b
767780 ; LINUXOSX64-NEXT: vmovdqu (%rsp), %ymm1 # 32-byte Reload
768781 ; LINUXOSX64-NEXT: vmovdqa32 %ymm1, %ymm0 {%k1}
769782 ; LINUXOSX64-NEXT: addq $48, %rsp
783 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 16
770784 ; LINUXOSX64-NEXT: popq %rsp
785 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
771786 ; LINUXOSX64-NEXT: retq
772787 %b = call x86_regcallcc <8 x i32> @test_argRet256Vector(<8 x i32> %a, <8 x i32> %a)
773788 %c = select <8 x i1> undef , <8 x i32> %a, <8 x i32> %b
841856 ; LINUXOSX64-NEXT: vmovdqu64 (%rsp), %zmm1 # 64-byte Reload
842857 ; LINUXOSX64-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1}
843858 ; LINUXOSX64-NEXT: addq $112, %rsp
859 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 16
844860 ; LINUXOSX64-NEXT: popq %rsp
861 ; LINUXOSX64-NEXT: .cfi_def_cfa_offset 8
845862 ; LINUXOSX64-NEXT: retq
846863 %b = call x86_regcallcc <16 x i32> @test_argRet512Vector(<16 x i32> %a, <16 x i32> %a)
847864 %c = select <16 x i1> undef , <16 x i32> %a, <16 x i32> %b
88388838 ; GENERIC-NEXT: callq func_f32
88398839 ; GENERIC-NEXT: vbroadcastss (%rsp), %zmm0 # 16-byte Folded Reload
88408840 ; GENERIC-NEXT: addq $24, %rsp # sched: [1:0.33]
8841 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
88418842 ; GENERIC-NEXT: retq # sched: [1:1.00]
88428843 ;
88438844 ; SKX-LABEL: broadcast_ss_spill:
88518852 ; SKX-NEXT: vbroadcastss (%rsp), %zmm0 # 16-byte Folded Reload sched: [8:0.50]
88528853 ; SKX-NEXT: # sched: [8:0.50]
88538854 ; SKX-NEXT: addq $24, %rsp # sched: [1:0.25]
8855 ; SKX-NEXT: .cfi_def_cfa_offset 8
88548856 ; SKX-NEXT: retq # sched: [7:1.00]
88558857 %a = fadd float %x, %x
88568858 call void @func_f32(float %a)
88718873 ; GENERIC-NEXT: callq func_f64
88728874 ; GENERIC-NEXT: vbroadcastsd (%rsp), %zmm0 # 16-byte Folded Reload
88738875 ; GENERIC-NEXT: addq $24, %rsp # sched: [1:0.33]
8876 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
88748877 ; GENERIC-NEXT: retq # sched: [1:1.00]
88758878 ;
88768879 ; SKX-LABEL: broadcast_sd_spill:
88848887 ; SKX-NEXT: vbroadcastsd (%rsp), %zmm0 # 16-byte Folded Reload sched: [8:0.50]
88858888 ; SKX-NEXT: # sched: [8:0.50]
88868889 ; SKX-NEXT: addq $24, %rsp # sched: [1:0.25]
8890 ; SKX-NEXT: .cfi_def_cfa_offset 8
88878891 ; SKX-NEXT: retq # sched: [7:1.00]
88888892 %a = fadd double %x, %x
88898893 call void @func_f64(double %a)
114114 ; X86-NEXT: vmovaps 8(%ebp), %zmm1
115115 ; X86-NEXT: movl %ebp, %esp
116116 ; X86-NEXT: popl %ebp
117 ; X86-NEXT: .cfi_def_cfa %esp, 4
117118 ; X86-NEXT: retl
118119 ;
119120 ; X64-LABEL: select04:
412412 ; ALL-NEXT: callq func_f32
413413 ; ALL-NEXT: vbroadcastss (%rsp), %zmm0 # 16-byte Folded Reload
414414 ; ALL-NEXT: addq $24, %rsp
415 ; ALL-NEXT: .cfi_def_cfa_offset 8
415416 ; ALL-NEXT: retq
416417 %a = fadd float %x, %x
417418 call void @func_f32(float %a)
431432 ; ALL-NEXT: callq func_f64
432433 ; ALL-NEXT: vbroadcastsd (%rsp), %zmm0 # 16-byte Folded Reload
433434 ; ALL-NEXT: addq $24, %rsp
435 ; ALL-NEXT: .cfi_def_cfa_offset 8
434436 ; ALL-NEXT: retq
435437 %a = fadd double %x, %x
436438 call void @func_f64(double %a)
716716 ; X32-NEXT: vpbroadcastb %eax, %zmm3 {%k1}
717717 ; X32-NEXT: vmovdqa64 %zmm3, %zmm0
718718 ; X32-NEXT: popl %ebx
719 ; X32-NEXT: .cfi_def_cfa_offset 4
719720 ; X32-NEXT: retl
720721 ;
721722 ; X64-LABEL: test_mm512_mask_set1_epi8:
14431444 ; X32-NEXT: korq %k0, %k1, %k1
14441445 ; X32-NEXT: vpbroadcastb %eax, %zmm0 {%k1} {z}
14451446 ; X32-NEXT: popl %ebx
1447 ; X32-NEXT: .cfi_def_cfa_offset 4
14461448 ; X32-NEXT: retl
14471449 ;
14481450 ; X64-LABEL: test_mm512_maskz_set1_epi8:
354354 ; AVX512F-32-NEXT: movl (%esp), %eax
355355 ; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %edx
356356 ; AVX512F-32-NEXT: addl $12, %esp
357 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
357358 ; AVX512F-32-NEXT: vzeroupper
358359 ; AVX512F-32-NEXT: retl
359360 %res = call i64 @llvm.x86.avx512.mask.pcmpeq.b.512(<64 x i8> %a, <64 x i8> %b, i64 -1)
379380 ; AVX512F-32-NEXT: movl (%esp), %eax
380381 ; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %edx
381382 ; AVX512F-32-NEXT: addl $12, %esp
383 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
382384 ; AVX512F-32-NEXT: vzeroupper
383385 ; AVX512F-32-NEXT: retl
384386 %res = call i64 @llvm.x86.avx512.mask.pcmpeq.b.512(<64 x i8> %a, <64 x i8> %b, i64 %mask)
444446 ; AVX512F-32-NEXT: movl (%esp), %eax
445447 ; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %edx
446448 ; AVX512F-32-NEXT: addl $12, %esp
449 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
447450 ; AVX512F-32-NEXT: vzeroupper
448451 ; AVX512F-32-NEXT: retl
449452 %res = call i64 @llvm.x86.avx512.mask.pcmpgt.b.512(<64 x i8> %a, <64 x i8> %b, i64 -1)
469472 ; AVX512F-32-NEXT: movl (%esp), %eax
470473 ; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %edx
471474 ; AVX512F-32-NEXT: addl $12, %esp
475 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
472476 ; AVX512F-32-NEXT: vzeroupper
473477 ; AVX512F-32-NEXT: retl
474478 %res = call i64 @llvm.x86.avx512.mask.pcmpgt.b.512(<64 x i8> %a, <64 x i8> %b, i64 %mask)
17011705 ; AVX512F-32-NEXT: addl {{[0-9]+}}(%esp), %eax
17021706 ; AVX512F-32-NEXT: adcl {{[0-9]+}}(%esp), %edx
17031707 ; AVX512F-32-NEXT: addl $60, %esp
1708 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
17041709 ; AVX512F-32-NEXT: vzeroupper
17051710 ; AVX512F-32-NEXT: retl
17061711 %res0 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 -1)
25022507 ; AVX512F-32-NEXT: addl %esi, %eax
25032508 ; AVX512F-32-NEXT: adcl %ecx, %edx
25042509 ; AVX512F-32-NEXT: addl $60, %esp
2510 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 12
25052511 ; AVX512F-32-NEXT: popl %esi
2512 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 8
25062513 ; AVX512F-32-NEXT: popl %ebx
2514 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
25072515 ; AVX512F-32-NEXT: vzeroupper
25082516 ; AVX512F-32-NEXT: retl
25092517 %res0 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 %mask)
25852593 ; AVX512F-32-NEXT: addl {{[0-9]+}}(%esp), %eax
25862594 ; AVX512F-32-NEXT: adcl {{[0-9]+}}(%esp), %edx
25872595 ; AVX512F-32-NEXT: addl $60, %esp
2596 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
25882597 ; AVX512F-32-NEXT: vzeroupper
25892598 ; AVX512F-32-NEXT: retl
25902599 %res0 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 -1)
33863395 ; AVX512F-32-NEXT: addl %esi, %eax
33873396 ; AVX512F-32-NEXT: adcl %ecx, %edx
33883397 ; AVX512F-32-NEXT: addl $60, %esp
3398 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 12
33893399 ; AVX512F-32-NEXT: popl %esi
3400 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 8
33903401 ; AVX512F-32-NEXT: popl %ebx
3402 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
33913403 ; AVX512F-32-NEXT: vzeroupper
33923404 ; AVX512F-32-NEXT: retl
33933405 %res0 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 %mask)
14981498 ; AVX512F-32-NEXT: movl (%esp), %eax
14991499 ; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %edx
15001500 ; AVX512F-32-NEXT: addl $12, %esp
1501 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
15011502 ; AVX512F-32-NEXT: retl
15021503 %res = call i64 @llvm.x86.avx512.kunpck.dq(i64 %x0, i64 %x1)
15031504 ret i64 %res
15211522 ; AVX512F-32-NEXT: movl (%esp), %eax
15221523 ; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %edx
15231524 ; AVX512F-32-NEXT: addl $12, %esp
1525 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
15241526 ; AVX512F-32-NEXT: retl
15251527 %res = call i64 @llvm.x86.avx512.cvtb2mask.512(<64 x i8> %x0)
15261528 ret i64 %res
17111713 ; AVX512F-32-NEXT: addl {{[0-9]+}}(%esp), %eax
17121714 ; AVX512F-32-NEXT: adcxl {{[0-9]+}}(%esp), %edx
17131715 ; AVX512F-32-NEXT: addl $20, %esp
1716 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
17141717 ; AVX512F-32-NEXT: retl
17151718 %res = call i64 @llvm.x86.avx512.ptestm.b.512(<64 x i8> %x0, <64 x i8> %x1, i64 %x2)
17161719 %res1 = call i64 @llvm.x86.avx512.ptestm.b.512(<64 x i8> %x0, <64 x i8> %x1, i64-1)
17751778 ; AVX512F-32-NEXT: addl {{[0-9]+}}(%esp), %eax
17761779 ; AVX512F-32-NEXT: adcxl {{[0-9]+}}(%esp), %edx
17771780 ; AVX512F-32-NEXT: addl $20, %esp
1781 ; AVX512F-32-NEXT: .cfi_def_cfa_offset 4
17781782 ; AVX512F-32-NEXT: retl
17791783 %res = call i64 @llvm.x86.avx512.ptestnm.b.512(<64 x i8> %x0, <64 x i8> %x1, i64 %x2)
17801784 %res1 = call i64 @llvm.x86.avx512.ptestnm.b.512(<64 x i8> %x0, <64 x i8> %x1, i64-1)
232232 ; X32-NEXT: kmovw %eax, %k1
233233 ; X32-NEXT: vpbroadcastd %xmm1, %xmm0 {%k1}
234234 ; X32-NEXT: popl %eax
235 ; X32-NEXT: .cfi_def_cfa_offset 4
235236 ; X32-NEXT: retl
236237 ;
237238 ; X64-LABEL: test_mm_mask_broadcastd_epi32:
264265 ; X32-NEXT: kmovw %eax, %k1
265266 ; X32-NEXT: vpbroadcastd %xmm0, %xmm0 {%k1} {z}
266267 ; X32-NEXT: popl %eax
268 ; X32-NEXT: .cfi_def_cfa_offset 4
267269 ; X32-NEXT: retl
268270 ;
269271 ; X64-LABEL: test_mm_maskz_broadcastd_epi32:
368370 ; X32-NEXT: kmovw %eax, %k1
369371 ; X32-NEXT: vpbroadcastq %xmm1, %xmm0 {%k1}
370372 ; X32-NEXT: popl %eax
373 ; X32-NEXT: .cfi_def_cfa_offset 4
371374 ; X32-NEXT: retl
372375 ;
373376 ; X64-LABEL: test_mm_mask_broadcastq_epi64:
397400 ; X32-NEXT: kmovw %eax, %k1
398401 ; X32-NEXT: vpbroadcastq %xmm0, %xmm0 {%k1} {z}
399402 ; X32-NEXT: popl %eax
403 ; X32-NEXT: .cfi_def_cfa_offset 4
400404 ; X32-NEXT: retl
401405 ;
402406 ; X64-LABEL: test_mm_maskz_broadcastq_epi64:
440444 ; X32-NEXT: kmovw %eax, %k1
441445 ; X32-NEXT: vpbroadcastq %xmm1, %ymm0 {%k1}
442446 ; X32-NEXT: popl %eax
447 ; X32-NEXT: .cfi_def_cfa_offset 4
443448 ; X32-NEXT: retl
444449 ;
445450 ; X64-LABEL: test_mm256_mask_broadcastq_epi64:
469474 ; X32-NEXT: kmovw %eax, %k1
470475 ; X32-NEXT: vpbroadcastq %xmm0, %ymm0 {%k1} {z}
471476 ; X32-NEXT: popl %eax
477 ; X32-NEXT: .cfi_def_cfa_offset 4
472478 ; X32-NEXT: retl
473479 ;
474480 ; X64-LABEL: test_mm256_maskz_broadcastq_epi64:
512518 ; X32-NEXT: kmovw %eax, %k1
513519 ; X32-NEXT: vmovddup {{.*#+}} xmm0 {%k1} = xmm1[0,0]
514520 ; X32-NEXT: popl %eax
521 ; X32-NEXT: .cfi_def_cfa_offset 4
515522 ; X32-NEXT: retl
516523 ;
517524 ; X64-LABEL: test_mm_mask_broadcastsd_pd:
541548 ; X32-NEXT: kmovw %eax, %k1
542549 ; X32-NEXT: vmovddup {{.*#+}} xmm0 {%k1} {z} = xmm0[0,0]
543550 ; X32-NEXT: popl %eax
551 ; X32-NEXT: .cfi_def_cfa_offset 4
544552 ; X32-NEXT: retl
545553 ;
546554 ; X64-LABEL: test_mm_maskz_broadcastsd_pd:
584592 ; X32-NEXT: kmovw %eax, %k1
585593 ; X32-NEXT: vbroadcastsd %xmm1, %ymm0 {%k1}
586594 ; X32-NEXT: popl %eax
595 ; X32-NEXT: .cfi_def_cfa_offset 4
587596 ; X32-NEXT: retl
588597 ;
589598 ; X64-LABEL: test_mm256_mask_broadcastsd_pd:
613622 ; X32-NEXT: kmovw %eax, %k1
614623 ; X32-NEXT: vbroadcastsd %xmm0, %ymm0 {%k1} {z}
615624 ; X32-NEXT: popl %eax
625 ; X32-NEXT: .cfi_def_cfa_offset 4
616626 ; X32-NEXT: retl
617627 ;
618628 ; X64-LABEL: test_mm256_maskz_broadcastsd_pd:
656666 ; X32-NEXT: kmovw %eax, %k1
657667 ; X32-NEXT: vbroadcastss %xmm1, %xmm0 {%k1}
658668 ; X32-NEXT: popl %eax
669 ; X32-NEXT: .cfi_def_cfa_offset 4
659670 ; X32-NEXT: retl
660671 ;
661672 ; X64-LABEL: test_mm_mask_broadcastss_ps:
685696 ; X32-NEXT: kmovw %eax, %k1
686697 ; X32-NEXT: vbroadcastss %xmm0, %xmm0 {%k1} {z}
687698 ; X32-NEXT: popl %eax
699 ; X32-NEXT: .cfi_def_cfa_offset 4
688700 ; X32-NEXT: retl
689701 ;
690702 ; X64-LABEL: test_mm_maskz_broadcastss_ps:
780792 ; X32-NEXT: kmovw %eax, %k1
781793 ; X32-NEXT: vmovddup {{.*#+}} xmm0 {%k1} = xmm1[0,0]
782794 ; X32-NEXT: popl %eax
795 ; X32-NEXT: .cfi_def_cfa_offset 4
783796 ; X32-NEXT: retl
784797 ;
785798 ; X64-LABEL: test_mm_mask_movddup_pd:
809822 ; X32-NEXT: kmovw %eax, %k1
810823 ; X32-NEXT: vmovddup {{.*#+}} xmm0 {%k1} {z} = xmm0[0,0]
811824 ; X32-NEXT: popl %eax
825 ; X32-NEXT: .cfi_def_cfa_offset 4
812826 ; X32-NEXT: retl
813827 ;
814828 ; X64-LABEL: test_mm_maskz_movddup_pd:
852866 ; X32-NEXT: kmovw %eax, %k1
853867 ; X32-NEXT: vmovddup {{.*#+}} ymm0 {%k1} = ymm1[0,0,2,2]
854868 ; X32-NEXT: popl %eax
869 ; X32-NEXT: .cfi_def_cfa_offset 4
855870 ; X32-NEXT: retl
856871 ;
857872 ; X64-LABEL: test_mm256_mask_movddup_pd:
881896 ; X32-NEXT: kmovw %eax, %k1
882897 ; X32-NEXT: vmovddup {{.*#+}} ymm0 {%k1} {z} = ymm0[0,0,2,2]
883898 ; X32-NEXT: popl %eax
899 ; X32-NEXT: .cfi_def_cfa_offset 4
884900 ; X32-NEXT: retl
885901 ;
886902 ; X64-LABEL: test_mm256_maskz_movddup_pd:
924940 ; X32-NEXT: kmovw %eax, %k1
925941 ; X32-NEXT: vmovshdup {{.*#+}} xmm0 {%k1} = xmm1[1,1,3,3]
926942 ; X32-NEXT: popl %eax
943 ; X32-NEXT: .cfi_def_cfa_offset 4
927944 ; X32-NEXT: retl
928945 ;
929946 ; X64-LABEL: test_mm_mask_movehdup_ps:
953970 ; X32-NEXT: kmovw %eax, %k1
954971 ; X32-NEXT: vmovshdup {{.*#+}} xmm0 {%k1} {z} = xmm0[1,1,3,3]
955972 ; X32-NEXT: popl %eax
973 ; X32-NEXT: .cfi_def_cfa_offset 4
956974 ; X32-NEXT: retl
957975 ;
958976 ; X64-LABEL: test_mm_maskz_movehdup_ps:
10481066 ; X32-NEXT: kmovw %eax, %k1
10491067 ; X32-NEXT: vmovsldup {{.*#+}} xmm0 {%k1} = xmm1[0,0,2,2]
10501068 ; X32-NEXT: popl %eax
1069 ; X32-NEXT: .cfi_def_cfa_offset 4
10511070 ; X32-NEXT: retl
10521071 ;
10531072 ; X64-LABEL: test_mm_mask_moveldup_ps:
10771096 ; X32-NEXT: kmovw %eax, %k1
10781097 ; X32-NEXT: vmovsldup {{.*#+}} xmm0 {%k1} {z} = xmm0[0,0,2,2]
10791098 ; X32-NEXT: popl %eax
1099 ; X32-NEXT: .cfi_def_cfa_offset 4
10801100 ; X32-NEXT: retl
10811101 ;
10821102 ; X64-LABEL: test_mm_maskz_moveldup_ps:
11721192 ; X32-NEXT: kmovw %eax, %k1
11731193 ; X32-NEXT: vpermq {{.*#+}} ymm0 {%k1} = ymm1[1,0,0,0]
11741194 ; X32-NEXT: popl %eax
1195 ; X32-NEXT: .cfi_def_cfa_offset 4
11751196 ; X32-NEXT: retl
11761197 ;
11771198 ; X64-LABEL: test_mm256_mask_permutex_epi64:
12011222 ; X32-NEXT: kmovw %eax, %k1
12021223 ; X32-NEXT: vpermq {{.*#+}} ymm0 {%k1} {z} = ymm0[1,0,0,0]
12031224 ; X32-NEXT: popl %eax
1225 ; X32-NEXT: .cfi_def_cfa_offset 4
12041226 ; X32-NEXT: retl
12051227 ;
12061228 ; X64-LABEL: test_mm256_maskz_permutex_epi64:
12441266 ; X32-NEXT: kmovw %eax, %k1
12451267 ; X32-NEXT: vpermpd {{.*#+}} ymm0 {%k1} = ymm1[1,0,0,0]
12461268 ; X32-NEXT: popl %eax
1269 ; X32-NEXT: .cfi_def_cfa_offset 4
12471270 ; X32-NEXT: retl
12481271 ;
12491272 ; X64-LABEL: test_mm256_mask_permutex_pd:
12731296 ; X32-NEXT: kmovw %eax, %k1
12741297 ; X32-NEXT: vpermpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,0,0,0]
12751298 ; X32-NEXT: popl %eax
1299 ; X32-NEXT: .cfi_def_cfa_offset 4
12761300 ; X32-NEXT: retl
12771301 ;
12781302 ; X64-LABEL: test_mm256_maskz_permutex_pd:
13161340 ; X32-NEXT: kmovw %eax, %k1
13171341 ; X32-NEXT: vunpckhpd {{.*#+}} xmm0 {%k1} = xmm1[1],xmm2[1]
13181342 ; X32-NEXT: popl %eax
1343 ; X32-NEXT: .cfi_def_cfa_offset 4
13191344 ; X32-NEXT: retl
13201345 ;
13211346 ; X64-LABEL: test_mm_mask_shuffle_pd:
13451370 ; X32-NEXT: kmovw %eax, %k1
13461371 ; X32-NEXT: vunpckhpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[1]
13471372 ; X32-NEXT: popl %eax
1373 ; X32-NEXT: .cfi_def_cfa_offset 4
13481374 ; X32-NEXT: retl
13491375 ;
13501376 ; X64-LABEL: test_mm_maskz_shuffle_pd:
13881414 ; X32-NEXT: kmovw %eax, %k1
13891415 ; X32-NEXT: vshufpd {{.*#+}} ymm0 {%k1} = ymm1[1],ymm2[1],ymm1[2],ymm2[2]
13901416 ; X32-NEXT: popl %eax
1417 ; X32-NEXT: .cfi_def_cfa_offset 4
13911418 ; X32-NEXT: retl
13921419 ;
13931420 ; X64-LABEL: test_mm256_mask_shuffle_pd:
14171444 ; X32-NEXT: kmovw %eax, %k1
14181445 ; X32-NEXT: vshufpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1],ymm1[1],ymm0[2],ymm1[2]
14191446 ; X32-NEXT: popl %eax
1447 ; X32-NEXT: .cfi_def_cfa_offset 4
14201448 ; X32-NEXT: retl
14211449 ;
14221450 ; X64-LABEL: test_mm256_maskz_shuffle_pd:
14601488 ; X32-NEXT: kmovw %eax, %k1
14611489 ; X32-NEXT: vshufps {{.*#+}} xmm0 {%k1} = xmm1[0,1],xmm2[0,0]
14621490 ; X32-NEXT: popl %eax
1491 ; X32-NEXT: .cfi_def_cfa_offset 4
14631492 ; X32-NEXT: retl
14641493 ;
14651494 ; X64-LABEL: test_mm_mask_shuffle_ps:
14891518 ; X32-NEXT: kmovw %eax, %k1
14901519 ; X32-NEXT: vshufps {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1],xmm1[0,0]
14911520 ; X32-NEXT: popl %eax
1521 ; X32-NEXT: .cfi_def_cfa_offset 4
14921522 ; X32-NEXT: retl
14931523 ;
14941524 ; X64-LABEL: test_mm_maskz_shuffle_ps:
1111 ; CHECK-NEXT: callq func_f32
1212 ; CHECK-NEXT: vbroadcastss (%rsp), %ymm0 # 16-byte Folded Reload
1313 ; CHECK-NEXT: addq $24, %rsp
14 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1415 ; CHECK-NEXT: retq
1516 %a = fadd float %x, %x
1617 call void @func_f32(float %a)
2930 ; CHECK-NEXT: callq func_f32
3031 ; CHECK-NEXT: vbroadcastss (%rsp), %xmm0 # 16-byte Folded Reload
3132 ; CHECK-NEXT: addq $24, %rsp
33 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3234 ; CHECK-NEXT: retq
3335 %a = fadd float %x, %x
3436 call void @func_f32(float %a)
4850 ; CHECK-NEXT: callq func_f64
4951 ; CHECK-NEXT: vbroadcastsd (%rsp), %ymm0 # 16-byte Folded Reload
5052 ; CHECK-NEXT: addq $24, %rsp
53 ; CHECK-NEXT: .cfi_def_cfa_offset 8
5154 ; CHECK-NEXT: retq
5255 %a = fadd double %x, %x
5356 call void @func_f64(double %a)
108108 ; NoVLX-NEXT: popq %r14
109109 ; NoVLX-NEXT: popq %r15
110110 ; NoVLX-NEXT: popq %rbp
111 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
111112 ; NoVLX-NEXT: vzeroupper
112113 ; NoVLX-NEXT: retq
113114 entry:
226227 ; NoVLX-NEXT: popq %r14
227228 ; NoVLX-NEXT: popq %r15
228229 ; NoVLX-NEXT: popq %rbp
230 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
229231 ; NoVLX-NEXT: vzeroupper
230232 ; NoVLX-NEXT: retq
231233 entry:
347349 ; NoVLX-NEXT: popq %r14
348350 ; NoVLX-NEXT: popq %r15
349351 ; NoVLX-NEXT: popq %rbp
352 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
350353 ; NoVLX-NEXT: vzeroupper
351354 ; NoVLX-NEXT: retq
352355 entry:
469472 ; NoVLX-NEXT: popq %r14
470473 ; NoVLX-NEXT: popq %r15
471474 ; NoVLX-NEXT: popq %rbp
475 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
472476 ; NoVLX-NEXT: vzeroupper
473477 ; NoVLX-NEXT: retq
474478 entry:
596600 ; NoVLX-NEXT: popq %r14
597601 ; NoVLX-NEXT: popq %r15
598602 ; NoVLX-NEXT: popq %rbp
603 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
599604 ; NoVLX-NEXT: vzeroupper
600605 ; NoVLX-NEXT: retq
601606 entry:
719724 ; NoVLX-NEXT: popq %r14
720725 ; NoVLX-NEXT: popq %r15
721726 ; NoVLX-NEXT: popq %rbp
727 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
722728 ; NoVLX-NEXT: vzeroupper
723729 ; NoVLX-NEXT: retq
724730 entry:
845851 ; NoVLX-NEXT: popq %r14
846852 ; NoVLX-NEXT: popq %r15
847853 ; NoVLX-NEXT: popq %rbp
854 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
848855 ; NoVLX-NEXT: vzeroupper
849856 ; NoVLX-NEXT: retq
850857 entry:
972979 ; NoVLX-NEXT: popq %r14
973980 ; NoVLX-NEXT: popq %r15
974981 ; NoVLX-NEXT: popq %rbp
982 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
975983 ; NoVLX-NEXT: vzeroupper
976984 ; NoVLX-NEXT: retq
977985 entry:
10231031 ; NoVLX-NEXT: orq %rcx, %rax
10241032 ; NoVLX-NEXT: movq %rbp, %rsp
10251033 ; NoVLX-NEXT: popq %rbp
1034 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
10261035 ; NoVLX-NEXT: vzeroupper
10271036 ; NoVLX-NEXT: retq
10281037 entry:
10701079 ; NoVLX-NEXT: orq %rcx, %rax
10711080 ; NoVLX-NEXT: movq %rbp, %rsp
10721081 ; NoVLX-NEXT: popq %rbp
1082 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
10731083 ; NoVLX-NEXT: vzeroupper
10741084 ; NoVLX-NEXT: retq
10751085 entry:
11281138 ; NoVLX-NEXT: orq %rcx, %rax
11291139 ; NoVLX-NEXT: movq %rbp, %rsp
11301140 ; NoVLX-NEXT: popq %rbp
1141 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
11311142 ; NoVLX-NEXT: vzeroupper
11321143 ; NoVLX-NEXT: retq
11331144 entry:
11871198 ; NoVLX-NEXT: orq %rcx, %rax
11881199 ; NoVLX-NEXT: movq %rbp, %rsp
11891200 ; NoVLX-NEXT: popq %rbp
1201 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
11901202 ; NoVLX-NEXT: vzeroupper
11911203 ; NoVLX-NEXT: retq
11921204 entry:
13831395 ; NoVLX-NEXT: movl (%rsp), %eax
13841396 ; NoVLX-NEXT: movq %rbp, %rsp
13851397 ; NoVLX-NEXT: popq %rbp
1398 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
13861399 ; NoVLX-NEXT: vzeroupper
13871400 ; NoVLX-NEXT: retq
13881401 entry:
14561469 ; NoVLX-NEXT: movl (%rsp), %eax
14571470 ; NoVLX-NEXT: movq %rbp, %rsp
14581471 ; NoVLX-NEXT: popq %rbp
1472 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
14591473 ; NoVLX-NEXT: vzeroupper
14601474 ; NoVLX-NEXT: retq
14611475 entry:
15321546 ; NoVLX-NEXT: movl (%rsp), %eax
15331547 ; NoVLX-NEXT: movq %rbp, %rsp
15341548 ; NoVLX-NEXT: popq %rbp
1549 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
15351550 ; NoVLX-NEXT: vzeroupper
15361551 ; NoVLX-NEXT: retq
15371552 entry:
16091624 ; NoVLX-NEXT: movl (%rsp), %eax
16101625 ; NoVLX-NEXT: movq %rbp, %rsp
16111626 ; NoVLX-NEXT: popq %rbp
1627 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
16121628 ; NoVLX-NEXT: vzeroupper
16131629 ; NoVLX-NEXT: retq
16141630 entry:
16911707 ; NoVLX-NEXT: orq %rcx, %rax
16921708 ; NoVLX-NEXT: movq %rbp, %rsp
16931709 ; NoVLX-NEXT: popq %rbp
1710 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
16941711 ; NoVLX-NEXT: vzeroupper
16951712 ; NoVLX-NEXT: retq
16961713 entry:
17691786 ; NoVLX-NEXT: orq %rcx, %rax
17701787 ; NoVLX-NEXT: movq %rbp, %rsp
17711788 ; NoVLX-NEXT: popq %rbp
1789 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
17721790 ; NoVLX-NEXT: vzeroupper
17731791 ; NoVLX-NEXT: retq
17741792 entry:
18501868 ; NoVLX-NEXT: orq %rcx, %rax
18511869 ; NoVLX-NEXT: movq %rbp, %rsp
18521870 ; NoVLX-NEXT: popq %rbp
1871 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
18531872 ; NoVLX-NEXT: vzeroupper
18541873 ; NoVLX-NEXT: retq
18551874 entry:
19321951 ; NoVLX-NEXT: orq %rcx, %rax
19331952 ; NoVLX-NEXT: movq %rbp, %rsp
19341953 ; NoVLX-NEXT: popq %rbp
1954 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
19351955 ; NoVLX-NEXT: vzeroupper
19361956 ; NoVLX-NEXT: retq
19371957 entry:
20552075 ; NoVLX-NEXT: popq %r14
20562076 ; NoVLX-NEXT: popq %r15
20572077 ; NoVLX-NEXT: popq %rbp
2078 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
20582079 ; NoVLX-NEXT: vzeroupper
20592080 ; NoVLX-NEXT: retq
20602081 entry:
21742195 ; NoVLX-NEXT: popq %r14
21752196 ; NoVLX-NEXT: popq %r15
21762197 ; NoVLX-NEXT: popq %rbp
2198 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
21772199 ; NoVLX-NEXT: vzeroupper
21782200 ; NoVLX-NEXT: retq
21792201 entry:
22962318 ; NoVLX-NEXT: popq %r14
22972319 ; NoVLX-NEXT: popq %r15
22982320 ; NoVLX-NEXT: popq %rbp
2321 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
22992322 ; NoVLX-NEXT: vzeroupper
23002323 ; NoVLX-NEXT: retq
23012324 entry:
24192442 ; NoVLX-NEXT: popq %r14
24202443 ; NoVLX-NEXT: popq %r15
24212444 ; NoVLX-NEXT: popq %rbp
2445 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
24222446 ; NoVLX-NEXT: vzeroupper
24232447 ; NoVLX-NEXT: retq
24242448 entry:
25472571 ; NoVLX-NEXT: popq %r14
25482572 ; NoVLX-NEXT: popq %r15
25492573 ; NoVLX-NEXT: popq %rbp
2574 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
25502575 ; NoVLX-NEXT: vzeroupper
25512576 ; NoVLX-NEXT: retq
25522577 entry:
26712696 ; NoVLX-NEXT: popq %r14
26722697 ; NoVLX-NEXT: popq %r15
26732698 ; NoVLX-NEXT: popq %rbp
2699 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
26742700 ; NoVLX-NEXT: vzeroupper
26752701 ; NoVLX-NEXT: retq
26762702 entry:
27982824 ; NoVLX-NEXT: popq %r14
27992825 ; NoVLX-NEXT: popq %r15
28002826 ; NoVLX-NEXT: popq %rbp
2827 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
28012828 ; NoVLX-NEXT: vzeroupper
28022829 ; NoVLX-NEXT: retq
28032830 entry:
29262953 ; NoVLX-NEXT: popq %r14
29272954 ; NoVLX-NEXT: popq %r15
29282955 ; NoVLX-NEXT: popq %rbp
2956 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
29292957 ; NoVLX-NEXT: vzeroupper
29302958 ; NoVLX-NEXT: retq
29312959 entry:
32793307 ; NoVLX-NEXT: orq %rcx, %rax
32803308 ; NoVLX-NEXT: movq %rbp, %rsp
32813309 ; NoVLX-NEXT: popq %rbp
3310 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
32823311 ; NoVLX-NEXT: vzeroupper
32833312 ; NoVLX-NEXT: retq
32843313 entry:
35433572 ; NoVLX-NEXT: orq %rcx, %rax
35443573 ; NoVLX-NEXT: movq %rbp, %rsp
35453574 ; NoVLX-NEXT: popq %rbp
3575 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
35463576 ; NoVLX-NEXT: vzeroupper
35473577 ; NoVLX-NEXT: retq
35483578 entry:
39033933 ; NoVLX-NEXT: orq %rcx, %rax
39043934 ; NoVLX-NEXT: movq %rbp, %rsp
39053935 ; NoVLX-NEXT: popq %rbp
3936 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
39063937 ; NoVLX-NEXT: vzeroupper
39073938 ; NoVLX-NEXT: retq
39083939 entry:
41794210 ; NoVLX-NEXT: orq %rcx, %rax
41804211 ; NoVLX-NEXT: movq %rbp, %rsp
41814212 ; NoVLX-NEXT: popq %rbp
4213 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
41824214 ; NoVLX-NEXT: vzeroupper
41834215 ; NoVLX-NEXT: retq
41844216 entry:
50425074 ; NoVLX-NEXT: movl (%rsp), %eax
50435075 ; NoVLX-NEXT: movq %rbp, %rsp
50445076 ; NoVLX-NEXT: popq %rbp
5077 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
50455078 ; NoVLX-NEXT: vzeroupper
50465079 ; NoVLX-NEXT: retq
50475080 entry:
50835116 ; NoVLX-NEXT: movl (%rsp), %eax
50845117 ; NoVLX-NEXT: movq %rbp, %rsp
50855118 ; NoVLX-NEXT: popq %rbp
5119 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
50865120 ; NoVLX-NEXT: vzeroupper
50875121 ; NoVLX-NEXT: retq
50885122 entry:
51445178 ; NoVLX-NEXT: movl (%rsp), %eax
51455179 ; NoVLX-NEXT: movq %rbp, %rsp
51465180 ; NoVLX-NEXT: popq %rbp
5181 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
51475182 ; NoVLX-NEXT: vzeroupper
51485183 ; NoVLX-NEXT: retq
51495184 entry:
52075242 ; NoVLX-NEXT: movl (%rsp), %eax
52085243 ; NoVLX-NEXT: movq %rbp, %rsp
52095244 ; NoVLX-NEXT: popq %rbp
5245 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
52105246 ; NoVLX-NEXT: vzeroupper
52115247 ; NoVLX-NEXT: retq
52125248 entry:
52545290 ; NoVLX-NEXT: movl (%rsp), %eax
52555291 ; NoVLX-NEXT: movq %rbp, %rsp
52565292 ; NoVLX-NEXT: popq %rbp
5293 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
52575294 ; NoVLX-NEXT: vzeroupper
52585295 ; NoVLX-NEXT: retq
52595296 entry:
53175354 ; NoVLX-NEXT: movl (%rsp), %eax
53185355 ; NoVLX-NEXT: movq %rbp, %rsp
53195356 ; NoVLX-NEXT: popq %rbp
5357 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
53205358 ; NoVLX-NEXT: vzeroupper
53215359 ; NoVLX-NEXT: retq
53225360 entry:
53705408 ; NoVLX-NEXT: orq %rcx, %rax
53715409 ; NoVLX-NEXT: movq %rbp, %rsp
53725410 ; NoVLX-NEXT: popq %rbp
5411 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
53735412 ; NoVLX-NEXT: vzeroupper
53745413 ; NoVLX-NEXT: retq
53755414 entry:
54175456 ; NoVLX-NEXT: orq %rcx, %rax
54185457 ; NoVLX-NEXT: movq %rbp, %rsp
54195458 ; NoVLX-NEXT: popq %rbp
5459 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
54205460 ; NoVLX-NEXT: vzeroupper
54215461 ; NoVLX-NEXT: retq
54225462 entry:
54845524 ; NoVLX-NEXT: orq %rcx, %rax
54855525 ; NoVLX-NEXT: movq %rbp, %rsp
54865526 ; NoVLX-NEXT: popq %rbp
5527 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
54875528 ; NoVLX-NEXT: vzeroupper
54885529 ; NoVLX-NEXT: retq
54895530 entry:
55535594 ; NoVLX-NEXT: orq %rcx, %rax
55545595 ; NoVLX-NEXT: movq %rbp, %rsp
55555596 ; NoVLX-NEXT: popq %rbp
5597 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
55565598 ; NoVLX-NEXT: vzeroupper
55575599 ; NoVLX-NEXT: retq
55585600 entry:
56065648 ; NoVLX-NEXT: orq %rcx, %rax
56075649 ; NoVLX-NEXT: movq %rbp, %rsp
56085650 ; NoVLX-NEXT: popq %rbp
5651 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
56095652 ; NoVLX-NEXT: vzeroupper
56105653 ; NoVLX-NEXT: retq
56115654 entry:
56755718 ; NoVLX-NEXT: orq %rcx, %rax
56765719 ; NoVLX-NEXT: movq %rbp, %rsp
56775720 ; NoVLX-NEXT: popq %rbp
5721 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
56785722 ; NoVLX-NEXT: vzeroupper
56795723 ; NoVLX-NEXT: retq
56805724 entry:
59485992 ; NoVLX-NEXT: movl (%rsp), %eax
59495993 ; NoVLX-NEXT: movq %rbp, %rsp
59505994 ; NoVLX-NEXT: popq %rbp
5995 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
59515996 ; NoVLX-NEXT: vzeroupper
59525997 ; NoVLX-NEXT: retq
59535998 entry:
60216066 ; NoVLX-NEXT: movl (%rsp), %eax
60226067 ; NoVLX-NEXT: movq %rbp, %rsp
60236068 ; NoVLX-NEXT: popq %rbp
6069 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
60246070 ; NoVLX-NEXT: vzeroupper
60256071 ; NoVLX-NEXT: retq
60266072 entry:
60976143 ; NoVLX-NEXT: movl (%rsp), %eax
60986144 ; NoVLX-NEXT: movq %rbp, %rsp
60996145 ; NoVLX-NEXT: popq %rbp
6146 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
61006147 ; NoVLX-NEXT: vzeroupper
61016148 ; NoVLX-NEXT: retq
61026149 entry:
61746221 ; NoVLX-NEXT: movl (%rsp), %eax
61756222 ; NoVLX-NEXT: movq %rbp, %rsp
61766223 ; NoVLX-NEXT: popq %rbp
6224 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
61776225 ; NoVLX-NEXT: vzeroupper
61786226 ; NoVLX-NEXT: retq
61796227 entry:
62516299 ; NoVLX-NEXT: movl (%rsp), %eax
62526300 ; NoVLX-NEXT: movq %rbp, %rsp
62536301 ; NoVLX-NEXT: popq %rbp
6302 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
62546303 ; NoVLX-NEXT: vzeroupper
62556304 ; NoVLX-NEXT: retq
62566305 entry:
63286377 ; NoVLX-NEXT: movl (%rsp), %eax
63296378 ; NoVLX-NEXT: movq %rbp, %rsp
63306379 ; NoVLX-NEXT: popq %rbp
6380 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
63316381 ; NoVLX-NEXT: vzeroupper
63326382 ; NoVLX-NEXT: retq
63336383 entry:
64116461 ; NoVLX-NEXT: orq %rcx, %rax
64126462 ; NoVLX-NEXT: movq %rbp, %rsp
64136463 ; NoVLX-NEXT: popq %rbp
6464 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
64146465 ; NoVLX-NEXT: vzeroupper
64156466 ; NoVLX-NEXT: retq
64166467 entry:
64896540 ; NoVLX-NEXT: orq %rcx, %rax
64906541 ; NoVLX-NEXT: movq %rbp, %rsp
64916542 ; NoVLX-NEXT: popq %rbp
6543 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
64926544 ; NoVLX-NEXT: vzeroupper
64936545 ; NoVLX-NEXT: retq
64946546 entry:
65706622 ; NoVLX-NEXT: orq %rcx, %rax
65716623 ; NoVLX-NEXT: movq %rbp, %rsp
65726624 ; NoVLX-NEXT: popq %rbp
6625 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
65736626 ; NoVLX-NEXT: vzeroupper
65746627 ; NoVLX-NEXT: retq
65756628 entry:
66526705 ; NoVLX-NEXT: orq %rcx, %rax
66536706 ; NoVLX-NEXT: movq %rbp, %rsp
66546707 ; NoVLX-NEXT: popq %rbp
6708 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
66556709 ; NoVLX-NEXT: vzeroupper
66566710 ; NoVLX-NEXT: retq
66576711 entry:
67346788 ; NoVLX-NEXT: orq %rcx, %rax
67356789 ; NoVLX-NEXT: movq %rbp, %rsp
67366790 ; NoVLX-NEXT: popq %rbp
6791 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
67376792 ; NoVLX-NEXT: vzeroupper
67386793 ; NoVLX-NEXT: retq
67396794 entry:
68166871 ; NoVLX-NEXT: orq %rcx, %rax
68176872 ; NoVLX-NEXT: movq %rbp, %rsp
68186873 ; NoVLX-NEXT: popq %rbp
6874 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
68196875 ; NoVLX-NEXT: vzeroupper
68206876 ; NoVLX-NEXT: retq
68216877 entry:
69376993 ; NoVLX-NEXT: popq %r14
69386994 ; NoVLX-NEXT: popq %r15
69396995 ; NoVLX-NEXT: popq %rbp
6996 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
69406997 ; NoVLX-NEXT: vzeroupper
69416998 ; NoVLX-NEXT: retq
69426999 entry:
70537110 ; NoVLX-NEXT: popq %r14
70547111 ; NoVLX-NEXT: popq %r15
70557112 ; NoVLX-NEXT: popq %rbp
7113 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
70567114 ; NoVLX-NEXT: vzeroupper
70577115 ; NoVLX-NEXT: retq
70587116 entry:
71727230 ; NoVLX-NEXT: popq %r14
71737231 ; NoVLX-NEXT: popq %r15
71747232 ; NoVLX-NEXT: popq %rbp
7233 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
71757234 ; NoVLX-NEXT: vzeroupper
71767235 ; NoVLX-NEXT: retq
71777236 entry:
72927351 ; NoVLX-NEXT: popq %r14
72937352 ; NoVLX-NEXT: popq %r15
72947353 ; NoVLX-NEXT: popq %rbp
7354 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
72957355 ; NoVLX-NEXT: vzeroupper
72967356 ; NoVLX-NEXT: retq
72977357 entry:
74127472 ; NoVLX-NEXT: popq %r14
74137473 ; NoVLX-NEXT: popq %r15
74147474 ; NoVLX-NEXT: popq %rbp
7475 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
74157476 ; NoVLX-NEXT: vzeroupper
74167477 ; NoVLX-NEXT: retq
74177478 entry:
75327593 ; NoVLX-NEXT: popq %r14
75337594 ; NoVLX-NEXT: popq %r15
75347595 ; NoVLX-NEXT: popq %rbp
7596 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
75357597 ; NoVLX-NEXT: vzeroupper
75367598 ; NoVLX-NEXT: retq
75377599 entry:
76587720 ; NoVLX-NEXT: popq %r14
76597721 ; NoVLX-NEXT: popq %r15
76607722 ; NoVLX-NEXT: popq %rbp
7723 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
76617724 ; NoVLX-NEXT: vzeroupper
76627725 ; NoVLX-NEXT: retq
76637726 entry:
77797842 ; NoVLX-NEXT: popq %r14
77807843 ; NoVLX-NEXT: popq %r15
77817844 ; NoVLX-NEXT: popq %rbp
7845 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
77827846 ; NoVLX-NEXT: vzeroupper
77837847 ; NoVLX-NEXT: retq
77847848 entry:
79037967 ; NoVLX-NEXT: popq %r14
79047968 ; NoVLX-NEXT: popq %r15
79057969 ; NoVLX-NEXT: popq %rbp
7970 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
79067971 ; NoVLX-NEXT: vzeroupper
79077972 ; NoVLX-NEXT: retq
79087973 entry:
80288093 ; NoVLX-NEXT: popq %r14
80298094 ; NoVLX-NEXT: popq %r15
80308095 ; NoVLX-NEXT: popq %rbp
8096 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
80318097 ; NoVLX-NEXT: vzeroupper
80328098 ; NoVLX-NEXT: retq
80338099 entry:
81538219 ; NoVLX-NEXT: popq %r14
81548220 ; NoVLX-NEXT: popq %r15
81558221 ; NoVLX-NEXT: popq %rbp
8222 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
81568223 ; NoVLX-NEXT: vzeroupper
81578224 ; NoVLX-NEXT: retq
81588225 entry:
82788345 ; NoVLX-NEXT: popq %r14
82798346 ; NoVLX-NEXT: popq %r15
82808347 ; NoVLX-NEXT: popq %rbp
8348 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
82818349 ; NoVLX-NEXT: vzeroupper
82828350 ; NoVLX-NEXT: retq
82838351 entry:
91229190 ; NoVLX-NEXT: movl (%rsp), %eax
91239191 ; NoVLX-NEXT: movq %rbp, %rsp
91249192 ; NoVLX-NEXT: popq %rbp
9193 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
91259194 ; NoVLX-NEXT: vzeroupper
91269195 ; NoVLX-NEXT: retq
91279196 entry:
91639232 ; NoVLX-NEXT: movl (%rsp), %eax
91649233 ; NoVLX-NEXT: movq %rbp, %rsp
91659234 ; NoVLX-NEXT: popq %rbp
9235 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
91669236 ; NoVLX-NEXT: vzeroupper
91679237 ; NoVLX-NEXT: retq
91689238 entry:
92169286 ; NoVLX-NEXT: movl (%rsp), %eax
92179287 ; NoVLX-NEXT: movq %rbp, %rsp
92189288 ; NoVLX-NEXT: popq %rbp
9289 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
92199290 ; NoVLX-NEXT: vzeroupper
92209291 ; NoVLX-NEXT: retq
92219292 entry:
92719342 ; NoVLX-NEXT: movl (%rsp), %eax
92729343 ; NoVLX-NEXT: movq %rbp, %rsp
92739344 ; NoVLX-NEXT: popq %rbp
9345 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
92749346 ; NoVLX-NEXT: vzeroupper
92759347 ; NoVLX-NEXT: retq
92769348 entry:
93189390 ; NoVLX-NEXT: movl (%rsp), %eax
93199391 ; NoVLX-NEXT: movq %rbp, %rsp
93209392 ; NoVLX-NEXT: popq %rbp
9393 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
93219394 ; NoVLX-NEXT: vzeroupper
93229395 ; NoVLX-NEXT: retq
93239396 entry:
93739446 ; NoVLX-NEXT: movl (%rsp), %eax
93749447 ; NoVLX-NEXT: movq %rbp, %rsp
93759448 ; NoVLX-NEXT: popq %rbp
9449 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
93769450 ; NoVLX-NEXT: vzeroupper
93779451 ; NoVLX-NEXT: retq
93789452 entry:
94269500 ; NoVLX-NEXT: orq %rcx, %rax
94279501 ; NoVLX-NEXT: movq %rbp, %rsp
94289502 ; NoVLX-NEXT: popq %rbp
9503 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
94299504 ; NoVLX-NEXT: vzeroupper
94309505 ; NoVLX-NEXT: retq
94319506 entry:
94739548 ; NoVLX-NEXT: orq %rcx, %rax
94749549 ; NoVLX-NEXT: movq %rbp, %rsp
94759550 ; NoVLX-NEXT: popq %rbp
9551 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
94769552 ; NoVLX-NEXT: vzeroupper
94779553 ; NoVLX-NEXT: retq
94789554 entry:
95329608 ; NoVLX-NEXT: orq %rcx, %rax
95339609 ; NoVLX-NEXT: movq %rbp, %rsp
95349610 ; NoVLX-NEXT: popq %rbp
9611 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
95359612 ; NoVLX-NEXT: vzeroupper
95369613 ; NoVLX-NEXT: retq
95379614 entry:
95939670 ; NoVLX-NEXT: orq %rcx, %rax
95949671 ; NoVLX-NEXT: movq %rbp, %rsp
95959672 ; NoVLX-NEXT: popq %rbp
9673 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
95969674 ; NoVLX-NEXT: vzeroupper
95979675 ; NoVLX-NEXT: retq
95989676 entry:
96469724 ; NoVLX-NEXT: orq %rcx, %rax
96479725 ; NoVLX-NEXT: movq %rbp, %rsp
96489726 ; NoVLX-NEXT: popq %rbp
9727 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
96499728 ; NoVLX-NEXT: vzeroupper
96509729 ; NoVLX-NEXT: retq
96519730 entry:
97079786 ; NoVLX-NEXT: orq %rcx, %rax
97089787 ; NoVLX-NEXT: movq %rbp, %rsp
97099788 ; NoVLX-NEXT: popq %rbp
9789 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
97109790 ; NoVLX-NEXT: vzeroupper
97119791 ; NoVLX-NEXT: retq
97129792 entry:
1059810678 ; NoVLX-NEXT: movl (%rsp), %eax
1059910679 ; NoVLX-NEXT: movq %rbp, %rsp
1060010680 ; NoVLX-NEXT: popq %rbp
10681 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1060110682 ; NoVLX-NEXT: vzeroupper
1060210683 ; NoVLX-NEXT: retq
1060310684 entry:
1064110722 ; NoVLX-NEXT: movl (%rsp), %eax
1064210723 ; NoVLX-NEXT: movq %rbp, %rsp
1064310724 ; NoVLX-NEXT: popq %rbp
10725 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1064410726 ; NoVLX-NEXT: vzeroupper
1064510727 ; NoVLX-NEXT: retq
1064610728 entry:
1070410786 ; NoVLX-NEXT: movl (%rsp), %eax
1070510787 ; NoVLX-NEXT: movq %rbp, %rsp
1070610788 ; NoVLX-NEXT: popq %rbp
10789 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1070710790 ; NoVLX-NEXT: vzeroupper
1070810791 ; NoVLX-NEXT: retq
1070910792 entry:
1076910852 ; NoVLX-NEXT: movl (%rsp), %eax
1077010853 ; NoVLX-NEXT: movq %rbp, %rsp
1077110854 ; NoVLX-NEXT: popq %rbp
10855 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1077210856 ; NoVLX-NEXT: vzeroupper
1077310857 ; NoVLX-NEXT: retq
1077410858 entry:
1081810902 ; NoVLX-NEXT: movl (%rsp), %eax
1081910903 ; NoVLX-NEXT: movq %rbp, %rsp
1082010904 ; NoVLX-NEXT: popq %rbp
10905 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1082110906 ; NoVLX-NEXT: vzeroupper
1082210907 ; NoVLX-NEXT: retq
1082310908 entry:
1088310968 ; NoVLX-NEXT: movl (%rsp), %eax
1088410969 ; NoVLX-NEXT: movq %rbp, %rsp
1088510970 ; NoVLX-NEXT: popq %rbp
10971 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1088610972 ; NoVLX-NEXT: vzeroupper
1088710973 ; NoVLX-NEXT: retq
1088810974 entry:
1093811024 ; NoVLX-NEXT: orq %rcx, %rax
1093911025 ; NoVLX-NEXT: movq %rbp, %rsp
1094011026 ; NoVLX-NEXT: popq %rbp
11027 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1094111028 ; NoVLX-NEXT: vzeroupper
1094211029 ; NoVLX-NEXT: retq
1094311030 entry:
1098711074 ; NoVLX-NEXT: orq %rcx, %rax
1098811075 ; NoVLX-NEXT: movq %rbp, %rsp
1098911076 ; NoVLX-NEXT: popq %rbp
11077 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1099011078 ; NoVLX-NEXT: vzeroupper
1099111079 ; NoVLX-NEXT: retq
1099211080 entry:
1105611144 ; NoVLX-NEXT: orq %rcx, %rax
1105711145 ; NoVLX-NEXT: movq %rbp, %rsp
1105811146 ; NoVLX-NEXT: popq %rbp
11147 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1105911148 ; NoVLX-NEXT: vzeroupper
1106011149 ; NoVLX-NEXT: retq
1106111150 entry:
1112711216 ; NoVLX-NEXT: orq %rcx, %rax
1112811217 ; NoVLX-NEXT: movq %rbp, %rsp
1112911218 ; NoVLX-NEXT: popq %rbp
11219 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1113011220 ; NoVLX-NEXT: vzeroupper
1113111221 ; NoVLX-NEXT: retq
1113211222 entry:
1118211272 ; NoVLX-NEXT: orq %rcx, %rax
1118311273 ; NoVLX-NEXT: movq %rbp, %rsp
1118411274 ; NoVLX-NEXT: popq %rbp
11275 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1118511276 ; NoVLX-NEXT: vzeroupper
1118611277 ; NoVLX-NEXT: retq
1118711278 entry:
1125311344 ; NoVLX-NEXT: orq %rcx, %rax
1125411345 ; NoVLX-NEXT: movq %rbp, %rsp
1125511346 ; NoVLX-NEXT: popq %rbp
11347 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1125611348 ; NoVLX-NEXT: vzeroupper
1125711349 ; NoVLX-NEXT: retq
1125811350 entry:
1150011592 ; NoVLX-NEXT: movl (%rsp), %eax
1150111593 ; NoVLX-NEXT: movq %rbp, %rsp
1150211594 ; NoVLX-NEXT: popq %rbp
11595 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1150311596 ; NoVLX-NEXT: vzeroupper
1150411597 ; NoVLX-NEXT: retq
1150511598 entry:
1157111664 ; NoVLX-NEXT: movl (%rsp), %eax
1157211665 ; NoVLX-NEXT: movq %rbp, %rsp
1157311666 ; NoVLX-NEXT: popq %rbp
11667 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1157411668 ; NoVLX-NEXT: vzeroupper
1157511669 ; NoVLX-NEXT: retq
1157611670 entry:
1164511739 ; NoVLX-NEXT: movl (%rsp), %eax
1164611740 ; NoVLX-NEXT: movq %rbp, %rsp
1164711741 ; NoVLX-NEXT: popq %rbp
11742 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1164811743 ; NoVLX-NEXT: vzeroupper
1164911744 ; NoVLX-NEXT: retq
1165011745 entry:
1172011815 ; NoVLX-NEXT: movl (%rsp), %eax
1172111816 ; NoVLX-NEXT: movq %rbp, %rsp
1172211817 ; NoVLX-NEXT: popq %rbp
11818 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1172311819 ; NoVLX-NEXT: vzeroupper
1172411820 ; NoVLX-NEXT: retq
1172511821 entry:
1179511891 ; NoVLX-NEXT: movl (%rsp), %eax
1179611892 ; NoVLX-NEXT: movq %rbp, %rsp
1179711893 ; NoVLX-NEXT: popq %rbp
11894 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1179811895 ; NoVLX-NEXT: vzeroupper
1179911896 ; NoVLX-NEXT: retq
1180011897 entry:
1187011967 ; NoVLX-NEXT: movl (%rsp), %eax
1187111968 ; NoVLX-NEXT: movq %rbp, %rsp
1187211969 ; NoVLX-NEXT: popq %rbp
11970 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1187311971 ; NoVLX-NEXT: vzeroupper
1187411972 ; NoVLX-NEXT: retq
1187511973 entry:
1195112049 ; NoVLX-NEXT: orq %rcx, %rax
1195212050 ; NoVLX-NEXT: movq %rbp, %rsp
1195312051 ; NoVLX-NEXT: popq %rbp
12052 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1195412053 ; NoVLX-NEXT: vzeroupper
1195512054 ; NoVLX-NEXT: retq
1195612055 entry:
1202712126 ; NoVLX-NEXT: orq %rcx, %rax
1202812127 ; NoVLX-NEXT: movq %rbp, %rsp
1202912128 ; NoVLX-NEXT: popq %rbp
12129 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1203012130 ; NoVLX-NEXT: vzeroupper
1203112131 ; NoVLX-NEXT: retq
1203212132 entry:
1210612206 ; NoVLX-NEXT: orq %rcx, %rax
1210712207 ; NoVLX-NEXT: movq %rbp, %rsp
1210812208 ; NoVLX-NEXT: popq %rbp
12209 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1210912210 ; NoVLX-NEXT: vzeroupper
1211012211 ; NoVLX-NEXT: retq
1211112212 entry:
1218612287 ; NoVLX-NEXT: orq %rcx, %rax
1218712288 ; NoVLX-NEXT: movq %rbp, %rsp
1218812289 ; NoVLX-NEXT: popq %rbp
12290 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1218912291 ; NoVLX-NEXT: vzeroupper
1219012292 ; NoVLX-NEXT: retq
1219112293 entry:
1226612368 ; NoVLX-NEXT: orq %rcx, %rax
1226712369 ; NoVLX-NEXT: movq %rbp, %rsp
1226812370 ; NoVLX-NEXT: popq %rbp
12371 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1226912372 ; NoVLX-NEXT: vzeroupper
1227012373 ; NoVLX-NEXT: retq
1227112374 entry:
1234612449 ; NoVLX-NEXT: orq %rcx, %rax
1234712450 ; NoVLX-NEXT: movq %rbp, %rsp
1234812451 ; NoVLX-NEXT: popq %rbp
12452 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1234912453 ; NoVLX-NEXT: vzeroupper
1235012454 ; NoVLX-NEXT: retq
1235112455 entry:
1246912573 ; NoVLX-NEXT: popq %r14
1247012574 ; NoVLX-NEXT: popq %r15
1247112575 ; NoVLX-NEXT: popq %rbp
12576 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1247212577 ; NoVLX-NEXT: vzeroupper
1247312578 ; NoVLX-NEXT: retq
1247412579 entry:
1258712692 ; NoVLX-NEXT: popq %r14
1258812693 ; NoVLX-NEXT: popq %r15
1258912694 ; NoVLX-NEXT: popq %rbp
12695 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1259012696 ; NoVLX-NEXT: vzeroupper
1259112697 ; NoVLX-NEXT: retq
1259212698 entry:
1270812814 ; NoVLX-NEXT: popq %r14
1270912815 ; NoVLX-NEXT: popq %r15
1271012816 ; NoVLX-NEXT: popq %rbp
12817 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1271112818 ; NoVLX-NEXT: vzeroupper
1271212819 ; NoVLX-NEXT: retq
1271312820 entry:
1283012937 ; NoVLX-NEXT: popq %r14
1283112938 ; NoVLX-NEXT: popq %r15
1283212939 ; NoVLX-NEXT: popq %rbp
12940 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1283312941 ; NoVLX-NEXT: vzeroupper
1283412942 ; NoVLX-NEXT: retq
1283512943 entry:
1295713065 ; NoVLX-NEXT: popq %r14
1295813066 ; NoVLX-NEXT: popq %r15
1295913067 ; NoVLX-NEXT: popq %rbp
13068 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1296013069 ; NoVLX-NEXT: vzeroupper
1296113070 ; NoVLX-NEXT: retq
1296213071 entry:
1308013189 ; NoVLX-NEXT: popq %r14
1308113190 ; NoVLX-NEXT: popq %r15
1308213191 ; NoVLX-NEXT: popq %rbp
13192 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1308313193 ; NoVLX-NEXT: vzeroupper
1308413194 ; NoVLX-NEXT: retq
1308513195 entry:
1320613316 ; NoVLX-NEXT: popq %r14
1320713317 ; NoVLX-NEXT: popq %r15
1320813318 ; NoVLX-NEXT: popq %rbp
13319 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1320913320 ; NoVLX-NEXT: vzeroupper
1321013321 ; NoVLX-NEXT: retq
1321113322 entry:
1333313444 ; NoVLX-NEXT: popq %r14
1333413445 ; NoVLX-NEXT: popq %r15
1333513446 ; NoVLX-NEXT: popq %rbp
13447 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1333613448 ; NoVLX-NEXT: vzeroupper
1333713449 ; NoVLX-NEXT: retq
1333813450 entry:
1338413496 ; NoVLX-NEXT: orq %rcx, %rax
1338513497 ; NoVLX-NEXT: movq %rbp, %rsp
1338613498 ; NoVLX-NEXT: popq %rbp
13499 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1338713500 ; NoVLX-NEXT: vzeroupper
1338813501 ; NoVLX-NEXT: retq
1338913502 entry:
1343113544 ; NoVLX-NEXT: orq %rcx, %rax
1343213545 ; NoVLX-NEXT: movq %rbp, %rsp
1343313546 ; NoVLX-NEXT: popq %rbp
13547 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1343413548 ; NoVLX-NEXT: vzeroupper
1343513549 ; NoVLX-NEXT: retq
1343613550 entry:
1348913603 ; NoVLX-NEXT: orq %rcx, %rax
1349013604 ; NoVLX-NEXT: movq %rbp, %rsp
1349113605 ; NoVLX-NEXT: popq %rbp
13606 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1349213607 ; NoVLX-NEXT: vzeroupper
1349313608 ; NoVLX-NEXT: retq
1349413609 entry:
1354813663 ; NoVLX-NEXT: orq %rcx, %rax
1354913664 ; NoVLX-NEXT: movq %rbp, %rsp
1355013665 ; NoVLX-NEXT: popq %rbp
13666 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1355113667 ; NoVLX-NEXT: vzeroupper
1355213668 ; NoVLX-NEXT: retq
1355313669 entry:
1374413860 ; NoVLX-NEXT: movl (%rsp), %eax
1374513861 ; NoVLX-NEXT: movq %rbp, %rsp
1374613862 ; NoVLX-NEXT: popq %rbp
13863 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1374713864 ; NoVLX-NEXT: vzeroupper
1374813865 ; NoVLX-NEXT: retq
1374913866 entry:
1381713934 ; NoVLX-NEXT: movl (%rsp), %eax
1381813935 ; NoVLX-NEXT: movq %rbp, %rsp
1381913936 ; NoVLX-NEXT: popq %rbp
13937 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1382013938 ; NoVLX-NEXT: vzeroupper
1382113939 ; NoVLX-NEXT: retq
1382213940 entry:
1389314011 ; NoVLX-NEXT: movl (%rsp), %eax
1389414012 ; NoVLX-NEXT: movq %rbp, %rsp
1389514013 ; NoVLX-NEXT: popq %rbp
14014 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1389614015 ; NoVLX-NEXT: vzeroupper
1389714016 ; NoVLX-NEXT: retq
1389814017 entry:
1397014089 ; NoVLX-NEXT: movl (%rsp), %eax
1397114090 ; NoVLX-NEXT: movq %rbp, %rsp
1397214091 ; NoVLX-NEXT: popq %rbp
14092 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1397314093 ; NoVLX-NEXT: vzeroupper
1397414094 ; NoVLX-NEXT: retq
1397514095 entry:
1405214172 ; NoVLX-NEXT: orq %rcx, %rax
1405314173 ; NoVLX-NEXT: movq %rbp, %rsp
1405414174 ; NoVLX-NEXT: popq %rbp
14175 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1405514176 ; NoVLX-NEXT: vzeroupper
1405614177 ; NoVLX-NEXT: retq
1405714178 entry:
1413014251 ; NoVLX-NEXT: orq %rcx, %rax
1413114252 ; NoVLX-NEXT: movq %rbp, %rsp
1413214253 ; NoVLX-NEXT: popq %rbp
14254 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1413314255 ; NoVLX-NEXT: vzeroupper
1413414256 ; NoVLX-NEXT: retq
1413514257 entry:
1421114333 ; NoVLX-NEXT: orq %rcx, %rax
1421214334 ; NoVLX-NEXT: movq %rbp, %rsp
1421314335 ; NoVLX-NEXT: popq %rbp
14336 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1421414337 ; NoVLX-NEXT: vzeroupper
1421514338 ; NoVLX-NEXT: retq
1421614339 entry:
1429314416 ; NoVLX-NEXT: orq %rcx, %rax
1429414417 ; NoVLX-NEXT: movq %rbp, %rsp
1429514418 ; NoVLX-NEXT: popq %rbp
14419 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1429614420 ; NoVLX-NEXT: vzeroupper
1429714421 ; NoVLX-NEXT: retq
1429814422 entry:
1441614540 ; NoVLX-NEXT: popq %r14
1441714541 ; NoVLX-NEXT: popq %r15
1441814542 ; NoVLX-NEXT: popq %rbp
14543 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1441914544 ; NoVLX-NEXT: vzeroupper
1442014545 ; NoVLX-NEXT: retq
1442114546 entry:
1453514660 ; NoVLX-NEXT: popq %r14
1453614661 ; NoVLX-NEXT: popq %r15
1453714662 ; NoVLX-NEXT: popq %rbp
14663 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1453814664 ; NoVLX-NEXT: vzeroupper
1453914665 ; NoVLX-NEXT: retq
1454014666 entry:
1465714783 ; NoVLX-NEXT: popq %r14
1465814784 ; NoVLX-NEXT: popq %r15
1465914785 ; NoVLX-NEXT: popq %rbp
14786 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1466014787 ; NoVLX-NEXT: vzeroupper
1466114788 ; NoVLX-NEXT: retq
1466214789 entry:
1478014907 ; NoVLX-NEXT: popq %r14
1478114908 ; NoVLX-NEXT: popq %r15
1478214909 ; NoVLX-NEXT: popq %rbp
14910 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1478314911 ; NoVLX-NEXT: vzeroupper
1478414912 ; NoVLX-NEXT: retq
1478514913 entry:
1490815036 ; NoVLX-NEXT: popq %r14
1490915037 ; NoVLX-NEXT: popq %r15
1491015038 ; NoVLX-NEXT: popq %rbp
15039 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1491115040 ; NoVLX-NEXT: vzeroupper
1491215041 ; NoVLX-NEXT: retq
1491315042 entry:
1503215161 ; NoVLX-NEXT: popq %r14
1503315162 ; NoVLX-NEXT: popq %r15
1503415163 ; NoVLX-NEXT: popq %rbp
15164 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1503515165 ; NoVLX-NEXT: vzeroupper
1503615166 ; NoVLX-NEXT: retq
1503715167 entry:
1515915289 ; NoVLX-NEXT: popq %r14
1516015290 ; NoVLX-NEXT: popq %r15
1516115291 ; NoVLX-NEXT: popq %rbp
15292 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1516215293 ; NoVLX-NEXT: vzeroupper
1516315294 ; NoVLX-NEXT: retq
1516415295 entry:
1528715418 ; NoVLX-NEXT: popq %r14
1528815419 ; NoVLX-NEXT: popq %r15
1528915420 ; NoVLX-NEXT: popq %rbp
15421 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1529015422 ; NoVLX-NEXT: vzeroupper
1529115423 ; NoVLX-NEXT: retq
1529215424 entry:
1564015772 ; NoVLX-NEXT: orq %rcx, %rax
1564115773 ; NoVLX-NEXT: movq %rbp, %rsp
1564215774 ; NoVLX-NEXT: popq %rbp
15775 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1564315776 ; NoVLX-NEXT: vzeroupper
1564415777 ; NoVLX-NEXT: retq
1564515778 entry:
1590416037 ; NoVLX-NEXT: orq %rcx, %rax
1590516038 ; NoVLX-NEXT: movq %rbp, %rsp
1590616039 ; NoVLX-NEXT: popq %rbp
16040 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1590716041 ; NoVLX-NEXT: vzeroupper
1590816042 ; NoVLX-NEXT: retq
1590916043 entry:
1626416398 ; NoVLX-NEXT: orq %rcx, %rax
1626516399 ; NoVLX-NEXT: movq %rbp, %rsp
1626616400 ; NoVLX-NEXT: popq %rbp
16401 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1626716402 ; NoVLX-NEXT: vzeroupper
1626816403 ; NoVLX-NEXT: retq
1626916404 entry:
1654016675 ; NoVLX-NEXT: orq %rcx, %rax
1654116676 ; NoVLX-NEXT: movq %rbp, %rsp
1654216677 ; NoVLX-NEXT: popq %rbp
16678 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1654316679 ; NoVLX-NEXT: vzeroupper
1654416680 ; NoVLX-NEXT: retq
1654516681 entry:
1740317539 ; NoVLX-NEXT: movl (%rsp), %eax
1740417540 ; NoVLX-NEXT: movq %rbp, %rsp
1740517541 ; NoVLX-NEXT: popq %rbp
17542 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1740617543 ; NoVLX-NEXT: vzeroupper
1740717544 ; NoVLX-NEXT: retq
1740817545 entry:
1744417581 ; NoVLX-NEXT: movl (%rsp), %eax
1744517582 ; NoVLX-NEXT: movq %rbp, %rsp
1744617583 ; NoVLX-NEXT: popq %rbp
17584 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1744717585 ; NoVLX-NEXT: vzeroupper
1744817586 ; NoVLX-NEXT: retq
1744917587 entry:
1750517643 ; NoVLX-NEXT: movl (%rsp), %eax
1750617644 ; NoVLX-NEXT: movq %rbp, %rsp
1750717645 ; NoVLX-NEXT: popq %rbp
17646 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1750817647 ; NoVLX-NEXT: vzeroupper
1750917648 ; NoVLX-NEXT: retq
1751017649 entry:
1756817707 ; NoVLX-NEXT: movl (%rsp), %eax
1756917708 ; NoVLX-NEXT: movq %rbp, %rsp
1757017709 ; NoVLX-NEXT: popq %rbp
17710 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1757117711 ; NoVLX-NEXT: vzeroupper
1757217712 ; NoVLX-NEXT: retq
1757317713 entry:
1761517755 ; NoVLX-NEXT: movl (%rsp), %eax
1761617756 ; NoVLX-NEXT: movq %rbp, %rsp
1761717757 ; NoVLX-NEXT: popq %rbp
17758 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1761817759 ; NoVLX-NEXT: vzeroupper
1761917760 ; NoVLX-NEXT: retq
1762017761 entry:
1767817819 ; NoVLX-NEXT: movl (%rsp), %eax
1767917820 ; NoVLX-NEXT: movq %rbp, %rsp
1768017821 ; NoVLX-NEXT: popq %rbp
17822 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1768117823 ; NoVLX-NEXT: vzeroupper
1768217824 ; NoVLX-NEXT: retq
1768317825 entry:
1773117873 ; NoVLX-NEXT: orq %rcx, %rax
1773217874 ; NoVLX-NEXT: movq %rbp, %rsp
1773317875 ; NoVLX-NEXT: popq %rbp
17876 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1773417877 ; NoVLX-NEXT: vzeroupper
1773517878 ; NoVLX-NEXT: retq
1773617879 entry:
1777817921 ; NoVLX-NEXT: orq %rcx, %rax
1777917922 ; NoVLX-NEXT: movq %rbp, %rsp
1778017923 ; NoVLX-NEXT: popq %rbp
17924 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1778117925 ; NoVLX-NEXT: vzeroupper
1778217926 ; NoVLX-NEXT: retq
1778317927 entry:
1784517989 ; NoVLX-NEXT: orq %rcx, %rax
1784617990 ; NoVLX-NEXT: movq %rbp, %rsp
1784717991 ; NoVLX-NEXT: popq %rbp
17992 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1784817993 ; NoVLX-NEXT: vzeroupper
1784917994 ; NoVLX-NEXT: retq
1785017995 entry:
1791418059 ; NoVLX-NEXT: orq %rcx, %rax
1791518060 ; NoVLX-NEXT: movq %rbp, %rsp
1791618061 ; NoVLX-NEXT: popq %rbp
18062 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1791718063 ; NoVLX-NEXT: vzeroupper
1791818064 ; NoVLX-NEXT: retq
1791918065 entry:
1796718113 ; NoVLX-NEXT: orq %rcx, %rax
1796818114 ; NoVLX-NEXT: movq %rbp, %rsp
1796918115 ; NoVLX-NEXT: popq %rbp
18116 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1797018117 ; NoVLX-NEXT: vzeroupper
1797118118 ; NoVLX-NEXT: retq
1797218119 entry:
1803618183 ; NoVLX-NEXT: orq %rcx, %rax
1803718184 ; NoVLX-NEXT: movq %rbp, %rsp
1803818185 ; NoVLX-NEXT: popq %rbp
18186 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1803918187 ; NoVLX-NEXT: vzeroupper
1804018188 ; NoVLX-NEXT: retq
1804118189 entry:
1830918457 ; NoVLX-NEXT: movl (%rsp), %eax
1831018458 ; NoVLX-NEXT: movq %rbp, %rsp
1831118459 ; NoVLX-NEXT: popq %rbp
18460 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1831218461 ; NoVLX-NEXT: vzeroupper
1831318462 ; NoVLX-NEXT: retq
1831418463 entry:
1838218531 ; NoVLX-NEXT: movl (%rsp), %eax
1838318532 ; NoVLX-NEXT: movq %rbp, %rsp
1838418533 ; NoVLX-NEXT: popq %rbp
18534 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1838518535 ; NoVLX-NEXT: vzeroupper
1838618536 ; NoVLX-NEXT: retq
1838718537 entry:
1845818608 ; NoVLX-NEXT: movl (%rsp), %eax
1845918609 ; NoVLX-NEXT: movq %rbp, %rsp
1846018610 ; NoVLX-NEXT: popq %rbp
18611 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1846118612 ; NoVLX-NEXT: vzeroupper
1846218613 ; NoVLX-NEXT: retq
1846318614 entry:
1853518686 ; NoVLX-NEXT: movl (%rsp), %eax
1853618687 ; NoVLX-NEXT: movq %rbp, %rsp
1853718688 ; NoVLX-NEXT: popq %rbp
18689 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1853818690 ; NoVLX-NEXT: vzeroupper
1853918691 ; NoVLX-NEXT: retq
1854018692 entry:
1861218764 ; NoVLX-NEXT: movl (%rsp), %eax
1861318765 ; NoVLX-NEXT: movq %rbp, %rsp
1861418766 ; NoVLX-NEXT: popq %rbp
18767 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1861518768 ; NoVLX-NEXT: vzeroupper
1861618769 ; NoVLX-NEXT: retq
1861718770 entry:
1868918842 ; NoVLX-NEXT: movl (%rsp), %eax
1869018843 ; NoVLX-NEXT: movq %rbp, %rsp
1869118844 ; NoVLX-NEXT: popq %rbp
18845 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1869218846 ; NoVLX-NEXT: vzeroupper
1869318847 ; NoVLX-NEXT: retq
1869418848 entry:
1877218926 ; NoVLX-NEXT: orq %rcx, %rax
1877318927 ; NoVLX-NEXT: movq %rbp, %rsp
1877418928 ; NoVLX-NEXT: popq %rbp
18929 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1877518930 ; NoVLX-NEXT: vzeroupper
1877618931 ; NoVLX-NEXT: retq
1877718932 entry:
1885019005 ; NoVLX-NEXT: orq %rcx, %rax
1885119006 ; NoVLX-NEXT: movq %rbp, %rsp
1885219007 ; NoVLX-NEXT: popq %rbp
19008 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1885319009 ; NoVLX-NEXT: vzeroupper
1885419010 ; NoVLX-NEXT: retq
1885519011 entry:
1893119087 ; NoVLX-NEXT: orq %rcx, %rax
1893219088 ; NoVLX-NEXT: movq %rbp, %rsp
1893319089 ; NoVLX-NEXT: popq %rbp
19090 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1893419091 ; NoVLX-NEXT: vzeroupper
1893519092 ; NoVLX-NEXT: retq
1893619093 entry:
1901319170 ; NoVLX-NEXT: orq %rcx, %rax
1901419171 ; NoVLX-NEXT: movq %rbp, %rsp
1901519172 ; NoVLX-NEXT: popq %rbp
19173 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1901619174 ; NoVLX-NEXT: vzeroupper
1901719175 ; NoVLX-NEXT: retq
1901819176 entry:
1909519253 ; NoVLX-NEXT: orq %rcx, %rax
1909619254 ; NoVLX-NEXT: movq %rbp, %rsp
1909719255 ; NoVLX-NEXT: popq %rbp
19256 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1909819257 ; NoVLX-NEXT: vzeroupper
1909919258 ; NoVLX-NEXT: retq
1910019259 entry:
1917719336 ; NoVLX-NEXT: orq %rcx, %rax
1917819337 ; NoVLX-NEXT: movq %rbp, %rsp
1917919338 ; NoVLX-NEXT: popq %rbp
19339 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1918019340 ; NoVLX-NEXT: vzeroupper
1918119341 ; NoVLX-NEXT: retq
1918219342 entry:
1929819458 ; NoVLX-NEXT: popq %r14
1929919459 ; NoVLX-NEXT: popq %r15
1930019460 ; NoVLX-NEXT: popq %rbp
19461 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1930119462 ; NoVLX-NEXT: vzeroupper
1930219463 ; NoVLX-NEXT: retq
1930319464 entry:
1941419575 ; NoVLX-NEXT: popq %r14
1941519576 ; NoVLX-NEXT: popq %r15
1941619577 ; NoVLX-NEXT: popq %rbp
19578 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1941719579 ; NoVLX-NEXT: vzeroupper
1941819580 ; NoVLX-NEXT: retq
1941919581 entry:
1953319695 ; NoVLX-NEXT: popq %r14
1953419696 ; NoVLX-NEXT: popq %r15
1953519697 ; NoVLX-NEXT: popq %rbp
19698 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1953619699 ; NoVLX-NEXT: vzeroupper
1953719700 ; NoVLX-NEXT: retq
1953819701 entry:
1965319816 ; NoVLX-NEXT: popq %r14
1965419817 ; NoVLX-NEXT: popq %r15
1965519818 ; NoVLX-NEXT: popq %rbp
19819 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1965619820 ; NoVLX-NEXT: vzeroupper
1965719821 ; NoVLX-NEXT: retq
1965819822 entry:
1977319937 ; NoVLX-NEXT: popq %r14
1977419938 ; NoVLX-NEXT: popq %r15
1977519939 ; NoVLX-NEXT: popq %rbp
19940 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1977619941 ; NoVLX-NEXT: vzeroupper
1977719942 ; NoVLX-NEXT: retq
1977819943 entry:
1989320058 ; NoVLX-NEXT: popq %r14
1989420059 ; NoVLX-NEXT: popq %r15
1989520060 ; NoVLX-NEXT: popq %rbp
20061 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
1989620062 ; NoVLX-NEXT: vzeroupper
1989720063 ; NoVLX-NEXT: retq
1989820064 entry:
2001920185 ; NoVLX-NEXT: popq %r14
2002020186 ; NoVLX-NEXT: popq %r15
2002120187 ; NoVLX-NEXT: popq %rbp
20188 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2002220189 ; NoVLX-NEXT: vzeroupper
2002320190 ; NoVLX-NEXT: retq
2002420191 entry:
2014020307 ; NoVLX-NEXT: popq %r14
2014120308 ; NoVLX-NEXT: popq %r15
2014220309 ; NoVLX-NEXT: popq %rbp
20310 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2014320311 ; NoVLX-NEXT: vzeroupper
2014420312 ; NoVLX-NEXT: retq
2014520313 entry:
2026420432 ; NoVLX-NEXT: popq %r14
2026520433 ; NoVLX-NEXT: popq %r15
2026620434 ; NoVLX-NEXT: popq %rbp
20435 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2026720436 ; NoVLX-NEXT: vzeroupper
2026820437 ; NoVLX-NEXT: retq
2026920438 entry:
2038920558 ; NoVLX-NEXT: popq %r14
2039020559 ; NoVLX-NEXT: popq %r15
2039120560 ; NoVLX-NEXT: popq %rbp
20561 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2039220562 ; NoVLX-NEXT: vzeroupper
2039320563 ; NoVLX-NEXT: retq
2039420564 entry:
2051420684 ; NoVLX-NEXT: popq %r14
2051520685 ; NoVLX-NEXT: popq %r15
2051620686 ; NoVLX-NEXT: popq %rbp
20687 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2051720688 ; NoVLX-NEXT: vzeroupper
2051820689 ; NoVLX-NEXT: retq
2051920690 entry:
2063920810 ; NoVLX-NEXT: popq %r14
2064020811 ; NoVLX-NEXT: popq %r15
2064120812 ; NoVLX-NEXT: popq %rbp
20813 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2064220814 ; NoVLX-NEXT: vzeroupper
2064320815 ; NoVLX-NEXT: retq
2064420816 entry:
2148321655 ; NoVLX-NEXT: movl (%rsp), %eax
2148421656 ; NoVLX-NEXT: movq %rbp, %rsp
2148521657 ; NoVLX-NEXT: popq %rbp
21658 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2148621659 ; NoVLX-NEXT: vzeroupper
2148721660 ; NoVLX-NEXT: retq
2148821661 entry:
2152421697 ; NoVLX-NEXT: movl (%rsp), %eax
2152521698 ; NoVLX-NEXT: movq %rbp, %rsp
2152621699 ; NoVLX-NEXT: popq %rbp
21700 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2152721701 ; NoVLX-NEXT: vzeroupper
2152821702 ; NoVLX-NEXT: retq
2152921703 entry:
2157721751 ; NoVLX-NEXT: movl (%rsp), %eax
2157821752 ; NoVLX-NEXT: movq %rbp, %rsp
2157921753 ; NoVLX-NEXT: popq %rbp
21754 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2158021755 ; NoVLX-NEXT: vzeroupper
2158121756 ; NoVLX-NEXT: retq
2158221757 entry:
2163221807 ; NoVLX-NEXT: movl (%rsp), %eax
2163321808 ; NoVLX-NEXT: movq %rbp, %rsp
2163421809 ; NoVLX-NEXT: popq %rbp
21810 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2163521811 ; NoVLX-NEXT: vzeroupper
2163621812 ; NoVLX-NEXT: retq
2163721813 entry:
2167921855 ; NoVLX-NEXT: movl (%rsp), %eax
2168021856 ; NoVLX-NEXT: movq %rbp, %rsp
2168121857 ; NoVLX-NEXT: popq %rbp
21858 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2168221859 ; NoVLX-NEXT: vzeroupper
2168321860 ; NoVLX-NEXT: retq
2168421861 entry:
2173421911 ; NoVLX-NEXT: movl (%rsp), %eax
2173521912 ; NoVLX-NEXT: movq %rbp, %rsp
2173621913 ; NoVLX-NEXT: popq %rbp
21914 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2173721915 ; NoVLX-NEXT: vzeroupper
2173821916 ; NoVLX-NEXT: retq
2173921917 entry:
2178721965 ; NoVLX-NEXT: orq %rcx, %rax
2178821966 ; NoVLX-NEXT: movq %rbp, %rsp
2178921967 ; NoVLX-NEXT: popq %rbp
21968 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2179021969 ; NoVLX-NEXT: vzeroupper
2179121970 ; NoVLX-NEXT: retq
2179221971 entry:
2183422013 ; NoVLX-NEXT: orq %rcx, %rax
2183522014 ; NoVLX-NEXT: movq %rbp, %rsp
2183622015 ; NoVLX-NEXT: popq %rbp
22016 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2183722017 ; NoVLX-NEXT: vzeroupper
2183822018 ; NoVLX-NEXT: retq
2183922019 entry:
2189322073 ; NoVLX-NEXT: orq %rcx, %rax
2189422074 ; NoVLX-NEXT: movq %rbp, %rsp
2189522075 ; NoVLX-NEXT: popq %rbp
22076 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2189622077 ; NoVLX-NEXT: vzeroupper
2189722078 ; NoVLX-NEXT: retq
2189822079 entry:
2195422135 ; NoVLX-NEXT: orq %rcx, %rax
2195522136 ; NoVLX-NEXT: movq %rbp, %rsp
2195622137 ; NoVLX-NEXT: popq %rbp
22138 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2195722139 ; NoVLX-NEXT: vzeroupper
2195822140 ; NoVLX-NEXT: retq
2195922141 entry:
2200722189 ; NoVLX-NEXT: orq %rcx, %rax
2200822190 ; NoVLX-NEXT: movq %rbp, %rsp
2200922191 ; NoVLX-NEXT: popq %rbp
22192 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2201022193 ; NoVLX-NEXT: vzeroupper
2201122194 ; NoVLX-NEXT: retq
2201222195 entry:
2206822251 ; NoVLX-NEXT: orq %rcx, %rax
2206922252 ; NoVLX-NEXT: movq %rbp, %rsp
2207022253 ; NoVLX-NEXT: popq %rbp
22254 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2207122255 ; NoVLX-NEXT: vzeroupper
2207222256 ; NoVLX-NEXT: retq
2207322257 entry:
2295923143 ; NoVLX-NEXT: movl (%rsp), %eax
2296023144 ; NoVLX-NEXT: movq %rbp, %rsp
2296123145 ; NoVLX-NEXT: popq %rbp
23146 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2296223147 ; NoVLX-NEXT: vzeroupper
2296323148 ; NoVLX-NEXT: retq
2296423149 entry:
2300223187 ; NoVLX-NEXT: movl (%rsp), %eax
2300323188 ; NoVLX-NEXT: movq %rbp, %rsp
2300423189 ; NoVLX-NEXT: popq %rbp
23190 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2300523191 ; NoVLX-NEXT: vzeroupper
2300623192 ; NoVLX-NEXT: retq
2300723193 entry:
2306523251 ; NoVLX-NEXT: movl (%rsp), %eax
2306623252 ; NoVLX-NEXT: movq %rbp, %rsp
2306723253 ; NoVLX-NEXT: popq %rbp
23254 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2306823255 ; NoVLX-NEXT: vzeroupper
2306923256 ; NoVLX-NEXT: retq
2307023257 entry:
2313023317 ; NoVLX-NEXT: movl (%rsp), %eax
2313123318 ; NoVLX-NEXT: movq %rbp, %rsp
2313223319 ; NoVLX-NEXT: popq %rbp
23320 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2313323321 ; NoVLX-NEXT: vzeroupper
2313423322 ; NoVLX-NEXT: retq
2313523323 entry:
2317923367 ; NoVLX-NEXT: movl (%rsp), %eax
2318023368 ; NoVLX-NEXT: movq %rbp, %rsp
2318123369 ; NoVLX-NEXT: popq %rbp
23370 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2318223371 ; NoVLX-NEXT: vzeroupper
2318323372 ; NoVLX-NEXT: retq
2318423373 entry:
2324423433 ; NoVLX-NEXT: movl (%rsp), %eax
2324523434 ; NoVLX-NEXT: movq %rbp, %rsp
2324623435 ; NoVLX-NEXT: popq %rbp
23436 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2324723437 ; NoVLX-NEXT: vzeroupper
2324823438 ; NoVLX-NEXT: retq
2324923439 entry:
2329923489 ; NoVLX-NEXT: orq %rcx, %rax
2330023490 ; NoVLX-NEXT: movq %rbp, %rsp
2330123491 ; NoVLX-NEXT: popq %rbp
23492 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2330223493 ; NoVLX-NEXT: vzeroupper
2330323494 ; NoVLX-NEXT: retq
2330423495 entry:
2334823539 ; NoVLX-NEXT: orq %rcx, %rax
2334923540 ; NoVLX-NEXT: movq %rbp, %rsp
2335023541 ; NoVLX-NEXT: popq %rbp
23542 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2335123543 ; NoVLX-NEXT: vzeroupper
2335223544 ; NoVLX-NEXT: retq
2335323545 entry:
2341723609 ; NoVLX-NEXT: orq %rcx, %rax
2341823610 ; NoVLX-NEXT: movq %rbp, %rsp
2341923611 ; NoVLX-NEXT: popq %rbp
23612 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2342023613 ; NoVLX-NEXT: vzeroupper
2342123614 ; NoVLX-NEXT: retq
2342223615 entry:
2348823681 ; NoVLX-NEXT: orq %rcx, %rax
2348923682 ; NoVLX-NEXT: movq %rbp, %rsp
2349023683 ; NoVLX-NEXT: popq %rbp
23684 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2349123685 ; NoVLX-NEXT: vzeroupper
2349223686 ; NoVLX-NEXT: retq
2349323687 entry:
2354323737 ; NoVLX-NEXT: orq %rcx, %rax
2354423738 ; NoVLX-NEXT: movq %rbp, %rsp
2354523739 ; NoVLX-NEXT: popq %rbp
23740 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2354623741 ; NoVLX-NEXT: vzeroupper
2354723742 ; NoVLX-NEXT: retq
2354823743 entry:
2361423809 ; NoVLX-NEXT: orq %rcx, %rax
2361523810 ; NoVLX-NEXT: movq %rbp, %rsp
2361623811 ; NoVLX-NEXT: popq %rbp
23812 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2361723813 ; NoVLX-NEXT: vzeroupper
2361823814 ; NoVLX-NEXT: retq
2361923815 entry:
2386124057 ; NoVLX-NEXT: movl (%rsp), %eax
2386224058 ; NoVLX-NEXT: movq %rbp, %rsp
2386324059 ; NoVLX-NEXT: popq %rbp
24060 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2386424061 ; NoVLX-NEXT: vzeroupper
2386524062 ; NoVLX-NEXT: retq
2386624063 entry:
2393224129 ; NoVLX-NEXT: movl (%rsp), %eax
2393324130 ; NoVLX-NEXT: movq %rbp, %rsp
2393424131 ; NoVLX-NEXT: popq %rbp
24132 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2393524133 ; NoVLX-NEXT: vzeroupper
2393624134 ; NoVLX-NEXT: retq
2393724135 entry:
2400624204 ; NoVLX-NEXT: movl (%rsp), %eax
2400724205 ; NoVLX-NEXT: movq %rbp, %rsp
2400824206 ; NoVLX-NEXT: popq %rbp
24207 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2400924208 ; NoVLX-NEXT: vzeroupper
2401024209 ; NoVLX-NEXT: retq
2401124210 entry:
2408124280 ; NoVLX-NEXT: movl (%rsp), %eax
2408224281 ; NoVLX-NEXT: movq %rbp, %rsp
2408324282 ; NoVLX-NEXT: popq %rbp
24283 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2408424284 ; NoVLX-NEXT: vzeroupper
2408524285 ; NoVLX-NEXT: retq
2408624286 entry:
2415624356 ; NoVLX-NEXT: movl (%rsp), %eax
2415724357 ; NoVLX-NEXT: movq %rbp, %rsp
2415824358 ; NoVLX-NEXT: popq %rbp
24359 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2415924360 ; NoVLX-NEXT: vzeroupper
2416024361 ; NoVLX-NEXT: retq
2416124362 entry:
2423124432 ; NoVLX-NEXT: movl (%rsp), %eax
2423224433 ; NoVLX-NEXT: movq %rbp, %rsp
2423324434 ; NoVLX-NEXT: popq %rbp
24435 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2423424436 ; NoVLX-NEXT: vzeroupper
2423524437 ; NoVLX-NEXT: retq
2423624438 entry:
2431224514 ; NoVLX-NEXT: orq %rcx, %rax
2431324515 ; NoVLX-NEXT: movq %rbp, %rsp
2431424516 ; NoVLX-NEXT: popq %rbp
24517 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2431524518 ; NoVLX-NEXT: vzeroupper
2431624519 ; NoVLX-NEXT: retq
2431724520 entry:
2438824591 ; NoVLX-NEXT: orq %rcx, %rax
2438924592 ; NoVLX-NEXT: movq %rbp, %rsp
2439024593 ; NoVLX-NEXT: popq %rbp
24594 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2439124595 ; NoVLX-NEXT: vzeroupper
2439224596 ; NoVLX-NEXT: retq
2439324597 entry:
2446724671 ; NoVLX-NEXT: orq %rcx, %rax
2446824672 ; NoVLX-NEXT: movq %rbp, %rsp
2446924673 ; NoVLX-NEXT: popq %rbp
24674 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2447024675 ; NoVLX-NEXT: vzeroupper
2447124676 ; NoVLX-NEXT: retq
2447224677 entry:
2454724752 ; NoVLX-NEXT: orq %rcx, %rax
2454824753 ; NoVLX-NEXT: movq %rbp, %rsp
2454924754 ; NoVLX-NEXT: popq %rbp
24755 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2455024756 ; NoVLX-NEXT: vzeroupper
2455124757 ; NoVLX-NEXT: retq
2455224758 entry:
2462724833 ; NoVLX-NEXT: orq %rcx, %rax
2462824834 ; NoVLX-NEXT: movq %rbp, %rsp
2462924835 ; NoVLX-NEXT: popq %rbp
24836 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2463024837 ; NoVLX-NEXT: vzeroupper
2463124838 ; NoVLX-NEXT: retq
2463224839 entry:
2470724914 ; NoVLX-NEXT: orq %rcx, %rax
2470824915 ; NoVLX-NEXT: movq %rbp, %rsp
2470924916 ; NoVLX-NEXT: popq %rbp
24917 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2471024918 ; NoVLX-NEXT: vzeroupper
2471124919 ; NoVLX-NEXT: retq
2471224920 entry:
2483225040 ; NoVLX-NEXT: popq %r14
2483325041 ; NoVLX-NEXT: popq %r15
2483425042 ; NoVLX-NEXT: popq %rbp
25043 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2483525044 ; NoVLX-NEXT: vzeroupper
2483625045 ; NoVLX-NEXT: retq
2483725046 entry:
2495325162 ; NoVLX-NEXT: popq %r14
2495425163 ; NoVLX-NEXT: popq %r15
2495525164 ; NoVLX-NEXT: popq %rbp
25165 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2495625166 ; NoVLX-NEXT: vzeroupper
2495725167 ; NoVLX-NEXT: retq
2495825168 entry:
2507625286 ; NoVLX-NEXT: popq %r14
2507725287 ; NoVLX-NEXT: popq %r15
2507825288 ; NoVLX-NEXT: popq %rbp
25289 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2507925290 ; NoVLX-NEXT: vzeroupper
2508025291 ; NoVLX-NEXT: retq
2508125292 entry:
2520125412 ; NoVLX-NEXT: popq %r14
2520225413 ; NoVLX-NEXT: popq %r15
2520325414 ; NoVLX-NEXT: popq %rbp
25415 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2520425416 ; NoVLX-NEXT: vzeroupper
2520525417 ; NoVLX-NEXT: retq
2520625418 entry:
2533025542 ; NoVLX-NEXT: popq %r14
2533125543 ; NoVLX-NEXT: popq %r15
2533225544 ; NoVLX-NEXT: popq %rbp
25545 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2533325546 ; NoVLX-NEXT: vzeroupper
2533425547 ; NoVLX-NEXT: retq
2533525548 entry:
2545625669 ; NoVLX-NEXT: popq %r14
2545725670 ; NoVLX-NEXT: popq %r15
2545825671 ; NoVLX-NEXT: popq %rbp
25672 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2545925673 ; NoVLX-NEXT: vzeroupper
2546025674 ; NoVLX-NEXT: retq
2546125675 entry:
2558425798 ; NoVLX-NEXT: popq %r14
2558525799 ; NoVLX-NEXT: popq %r15
2558625800 ; NoVLX-NEXT: popq %rbp
25801 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2558725802 ; NoVLX-NEXT: vzeroupper
2558825803 ; NoVLX-NEXT: retq
2558925804 entry:
2571425929 ; NoVLX-NEXT: popq %r14
2571525930 ; NoVLX-NEXT: popq %r15
2571625931 ; NoVLX-NEXT: popq %rbp
25932 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2571725933 ; NoVLX-NEXT: vzeroupper
2571825934 ; NoVLX-NEXT: retq
2571925935 entry:
2576725983 ; NoVLX-NEXT: orq %rcx, %rax
2576825984 ; NoVLX-NEXT: movq %rbp, %rsp
2576925985 ; NoVLX-NEXT: popq %rbp
25986 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2577025987 ; NoVLX-NEXT: vzeroupper
2577125988 ; NoVLX-NEXT: retq
2577225989 entry:
2581726034 ; NoVLX-NEXT: orq %rcx, %rax
2581826035 ; NoVLX-NEXT: movq %rbp, %rsp
2581926036 ; NoVLX-NEXT: popq %rbp
26037 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2582026038 ; NoVLX-NEXT: vzeroupper
2582126039 ; NoVLX-NEXT: retq
2582226040 entry:
2587726095 ; NoVLX-NEXT: orq %rcx, %rax
2587826096 ; NoVLX-NEXT: movq %rbp, %rsp
2587926097 ; NoVLX-NEXT: popq %rbp
26098 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2588026099 ; NoVLX-NEXT: vzeroupper
2588126100 ; NoVLX-NEXT: retq
2588226101 entry:
2593926158 ; NoVLX-NEXT: orq %rcx, %rax
2594026159 ; NoVLX-NEXT: movq %rbp, %rsp
2594126160 ; NoVLX-NEXT: popq %rbp
26161 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2594226162 ; NoVLX-NEXT: vzeroupper
2594326163 ; NoVLX-NEXT: retq
2594426164 entry:
2614726367 ; NoVLX-NEXT: movl (%rsp), %eax
2614826368 ; NoVLX-NEXT: movq %rbp, %rsp
2614926369 ; NoVLX-NEXT: popq %rbp
26370 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2615026371 ; NoVLX-NEXT: vzeroupper
2615126372 ; NoVLX-NEXT: retq
2615226373 entry:
2622326444 ; NoVLX-NEXT: movl (%rsp), %eax
2622426445 ; NoVLX-NEXT: movq %rbp, %rsp
2622526446 ; NoVLX-NEXT: popq %rbp
26447 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2622626448 ; NoVLX-NEXT: vzeroupper
2622726449 ; NoVLX-NEXT: retq
2622826450 entry:
2630126523 ; NoVLX-NEXT: movl (%rsp), %eax
2630226524 ; NoVLX-NEXT: movq %rbp, %rsp
2630326525 ; NoVLX-NEXT: popq %rbp
26526 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2630426527 ; NoVLX-NEXT: vzeroupper
2630526528 ; NoVLX-NEXT: retq
2630626529 entry:
2638126604 ; NoVLX-NEXT: movl (%rsp), %eax
2638226605 ; NoVLX-NEXT: movq %rbp, %rsp
2638326606 ; NoVLX-NEXT: popq %rbp
26607 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2638426608 ; NoVLX-NEXT: vzeroupper
2638526609 ; NoVLX-NEXT: retq
2638626610 entry:
2646526689 ; NoVLX-NEXT: orq %rcx, %rax
2646626690 ; NoVLX-NEXT: movq %rbp, %rsp
2646726691 ; NoVLX-NEXT: popq %rbp
26692 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2646826693 ; NoVLX-NEXT: vzeroupper
2646926694 ; NoVLX-NEXT: retq
2647026695 entry:
2654626771 ; NoVLX-NEXT: orq %rcx, %rax
2654726772 ; NoVLX-NEXT: movq %rbp, %rsp
2654826773 ; NoVLX-NEXT: popq %rbp
26774 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2654926775 ; NoVLX-NEXT: vzeroupper
2655026776 ; NoVLX-NEXT: retq
2655126777 entry:
2662926855 ; NoVLX-NEXT: orq %rcx, %rax
2663026856 ; NoVLX-NEXT: movq %rbp, %rsp
2663126857 ; NoVLX-NEXT: popq %rbp
26858 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2663226859 ; NoVLX-NEXT: vzeroupper
2663326860 ; NoVLX-NEXT: retq
2663426861 entry:
2671426941 ; NoVLX-NEXT: orq %rcx, %rax
2671526942 ; NoVLX-NEXT: movq %rbp, %rsp
2671626943 ; NoVLX-NEXT: popq %rbp
26944 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2671726945 ; NoVLX-NEXT: vzeroupper
2671826946 ; NoVLX-NEXT: retq
2671926947 entry:
2683927067 ; NoVLX-NEXT: popq %r14
2684027068 ; NoVLX-NEXT: popq %r15
2684127069 ; NoVLX-NEXT: popq %rbp
27070 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2684227071 ; NoVLX-NEXT: vzeroupper
2684327072 ; NoVLX-NEXT: retq
2684427073 entry:
2696127190 ; NoVLX-NEXT: popq %r14
2696227191 ; NoVLX-NEXT: popq %r15
2696327192 ; NoVLX-NEXT: popq %rbp
27193 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2696427194 ; NoVLX-NEXT: vzeroupper
2696527195 ; NoVLX-NEXT: retq
2696627196 entry:
2708527315 ; NoVLX-NEXT: popq %r14
2708627316 ; NoVLX-NEXT: popq %r15
2708727317 ; NoVLX-NEXT: popq %rbp
27318 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2708827319 ; NoVLX-NEXT: vzeroupper
2708927320 ; NoVLX-NEXT: retq
2709027321 entry:
2721127442 ; NoVLX-NEXT: popq %r14
2721227443 ; NoVLX-NEXT: popq %r15
2721327444 ; NoVLX-NEXT: popq %rbp
27445 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2721427446 ; NoVLX-NEXT: vzeroupper
2721527447 ; NoVLX-NEXT: retq
2721627448 entry:
2734127573 ; NoVLX-NEXT: popq %r14
2734227574 ; NoVLX-NEXT: popq %r15
2734327575 ; NoVLX-NEXT: popq %rbp
27576 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2734427577 ; NoVLX-NEXT: vzeroupper
2734527578 ; NoVLX-NEXT: retq
2734627579 entry:
2746827701 ; NoVLX-NEXT: popq %r14
2746927702 ; NoVLX-NEXT: popq %r15
2747027703 ; NoVLX-NEXT: popq %rbp
27704 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2747127705 ; NoVLX-NEXT: vzeroupper
2747227706 ; NoVLX-NEXT: retq
2747327707 entry:
2759727831 ; NoVLX-NEXT: popq %r14
2759827832 ; NoVLX-NEXT: popq %r15
2759927833 ; NoVLX-NEXT: popq %rbp
27834 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2760027835 ; NoVLX-NEXT: vzeroupper
2760127836 ; NoVLX-NEXT: retq
2760227837 entry:
2772827963 ; NoVLX-NEXT: popq %r14
2772927964 ; NoVLX-NEXT: popq %r15
2773027965 ; NoVLX-NEXT: popq %rbp
27966 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2773127967 ; NoVLX-NEXT: vzeroupper
2773227968 ; NoVLX-NEXT: retq
2773327969 entry:
2808428320 ; NoVLX-NEXT: orq %rcx, %rax
2808528321 ; NoVLX-NEXT: movq %rbp, %rsp
2808628322 ; NoVLX-NEXT: popq %rbp
28323 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2808728324 ; NoVLX-NEXT: vzeroupper
2808828325 ; NoVLX-NEXT: retq
2808928326 entry:
2835328590 ; NoVLX-NEXT: orq %rcx, %rax
2835428591 ; NoVLX-NEXT: movq %rbp, %rsp
2835528592 ; NoVLX-NEXT: popq %rbp
28593 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2835628594 ; NoVLX-NEXT: vzeroupper
2835728595 ; NoVLX-NEXT: retq
2835828596 entry:
2871628954 ; NoVLX-NEXT: orq %rcx, %rax
2871728955 ; NoVLX-NEXT: movq %rbp, %rsp
2871828956 ; NoVLX-NEXT: popq %rbp
28957 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2871928958 ; NoVLX-NEXT: vzeroupper
2872028959 ; NoVLX-NEXT: retq
2872128960 entry:
2899729236 ; NoVLX-NEXT: orq %rcx, %rax
2899829237 ; NoVLX-NEXT: movq %rbp, %rsp
2899929238 ; NoVLX-NEXT: popq %rbp
29239 ; NoVLX-NEXT: .cfi_def_cfa %rsp, 8
2900029240 ; NoVLX-NEXT: vzeroupper
2900129241 ; NoVLX-NEXT: retq
2900229242 entry:
2987830118 ; NoVLX-NEXT: movl (%rsp), %eax
2987930119