llvm.org GIT mirror llvm / 8c86ad5
AMDGPU: Insert wait at start of callee functions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300000 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 2 years ago
3 changed file(s) with 40 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
689689 for (MachineInstr *I : RemoveMI)
690690 I->eraseFromParent();
691691
692 if (!MFI->isEntryFunction()) {
693 // Wait for any outstanding memory operations that the input registers may
694 // depend on. We can't track them and it's better to to the wait after the
695 // costly call sequence.
696
697 // TODO: Could insert earlier and schedule more liberally with operations
698 // that only use caller preserved registers.
699 MachineBasicBlock &EntryBB = MF.front();
700 BuildMI(EntryBB, EntryBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WAITCNT))
701 .addImm(0);
702
703 Changes = true;
704 }
705
692706 return Changes;
693707 }
2525
2626 ; ELF: Symbol {
2727 ; ELF: Name: simple
28 ; ELF: Size: 288
28 ; ELF: Size: 292
2929 ; ELF: Type: Function (0x2)
3030 ; ELF: }
3131
0 # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -verify-machineinstrs -run-pass si-insert-waits -o - %s | FileCheck %s
1 --- |
2 define float @entry_callee_wait(float %arg) #0 {
3 ret float %arg
4 }
5
6 attributes #0 = { nounwind }
7 ...
8 ---
9 # CHECK-LABEL: name: entry_callee_wait{{$}}
10 # CHECK: bb.0:
11 # CHECK-NEXT: S_WAITCNT 0{{$}}
12 # CHECK-NEXT: V_ADD_F32
13 # CHECK-NEXT: S_SETPC_B64
14 liveins:
15 - { reg: '%sgpr0_sgpr1' }
16 - { reg: '%vgpr0' }
17
18 name: entry_callee_wait
19 body: |
20 bb.0:
21 %vgpr0 = V_ADD_F32_e32 %vgpr0, %vgpr0, implicit %exec
22 S_SETPC_B64 killed %sgpr0_sgpr1
23
24 ...