llvm.org GIT mirror llvm / 8c47ad8
Handle register masks in LiveVariables. A register mask operand kills any live physreg that isn't preserved. Unlike an implicit-def operand, the clobbered physregs are never live afterwards. This means LiveVariables has to track a much smaller number of live physregs, and it should spend much less time in addRegisterDead(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148609 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 8 years ago
2 changed file(s) with 33 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
159159 /// the last use of the whole register.
160160 bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI);
161161
162 /// HandleRegMask - Call HandlePhysRegKill for all registers clobbered by Mask.
163 void HandleRegMask(const MachineOperand&);
164
162165 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
163166 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI,
164167 SmallVector &Defs);
416416 return true;
417417 }
418418
419 void LiveVariables::HandleRegMask(const MachineOperand &MO) {
420 // Call HandlePhysRegKill() for all live registers clobbered by Mask.
421 // Clobbered registers are always dead, sp there is no need to use
422 // HandlePhysRegDef().
423 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) {
424 // Skip dead regs.
425 if (!PhysRegDef[Reg] && !PhysRegUse[Reg])
426 continue;
427 // Skip mask-preserved regs.
428 if (!MO.clobbersPhysReg(Reg));
429 continue;
430 // Kill the largest clobbered super-register.
431 // This avoids needless implicit operands.
432 unsigned Super = Reg;
433 for (const unsigned *SR = TRI->getSuperRegisters(Reg); *SR; ++SR)
434 if ((PhysRegDef[*SR] || PhysRegUse[*SR]) && MO.clobbersPhysReg(*SR))
435 Super = *SR;
436 HandlePhysRegKill(Super, 0);
437 }
438 }
439
419440 void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI,
420441 SmallVector &Defs) {
421442 // What parts of the register are previously defined?
533554 // Clear kill and dead markers. LV will recompute them.
534555 SmallVector UseRegs;
535556 SmallVector DefRegs;
557 SmallVector RegMasks;
536558 for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
537559 MachineOperand &MO = MI->getOperand(i);
560 if (MO.isRegMask()) {
561 RegMasks.push_back(i);
562 continue;
563 }
538564 if (!MO.isReg() || MO.getReg() == 0)
539565 continue;
540566 unsigned MOReg = MO.getReg();
555581 else if (!ReservedRegisters[MOReg])
556582 HandlePhysRegUse(MOReg, MI);
557583 }
584
585 // Process all masked registers. (Call clobbers).
586 for (unsigned i = 0, e = RegMasks.size(); i != e; ++i)
587 HandleRegMask(MI->getOperand(RegMasks[i]));
558588
559589 // Process all defs.
560590 for (unsigned i = 0, e = DefRegs.size(); i != e; ++i) {