llvm.org GIT mirror llvm / 8c07c4e
remove v[if]cmp functionality from the 2.4 release. These instructions will be removed or substantially changes in mainline after the 2.4 release and we don't want to have to support these for backwards compatibility purposes. Patch by Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_24@57732 91177308-0d34-0410-b5e6-96231b3b80d8 Tanya Lattner 10 years ago
6 changed file(s) with 1 addition(s) and 187 deletion(s). Raw diff Collapse all Expand all
146146
147147
  • 'icmp' Instruction
  • 148148
  • 'fcmp' Instruction
  • 149
  • 'vicmp' Instruction
  • 150
  • 'vfcmp' Instruction
  • 151149
  • 'phi' Instruction
  • 152150
  • 'select' Instruction
  • 153151
  • 'call' Instruction
  • 17771775
    fcmp COND ( VAL1, VAL2 )
    17781776
    Performs the fcmp operation on constants.
    17791777
    1780
    vicmp COND ( VAL1, VAL2 )
    1781
    Performs the vicmp operation on constants.
    1782
    1783
    vfcmp COND ( VAL1, VAL2 )
    1784
    Performs the vfcmp operation on constants.
    1785
    17861778
    extractelement ( VAL, IDX )
    17871779
    17881780
    Perform the extractelement
    40524044
    40534045
    40544046
    4055 'vicmp' Instruction
    4056
    4057
    4058
    Syntax:
    4059
      <result> = vicmp <cond> <ty> <op1>, <op2>   ; yields {ty}:result
    
                      
                    
    4060
    4061
    Overview:
    4062

    The 'vicmp' instruction returns an integer vector value based on

    4063 element-wise comparison of its two integer vector operands.

    4064
    Arguments:
    4065

    The 'vicmp' instruction takes three operands. The first operand is

    4066 the condition code indicating the kind of comparison to perform. It is not
    4067 a value, just a keyword. The possible condition code are:
    4068
    4069
  • eq: equal
  • 4070
  • ne: not equal
  • 4071
  • ugt: unsigned greater than
  • 4072
  • uge: unsigned greater or equal
  • 4073
  • ult: unsigned less than
  • 4074
  • ule: unsigned less or equal
  • 4075
  • sgt: signed greater than
  • 4076
  • sge: signed greater or equal
  • 4077
  • slt: signed less than
  • 4078
  • sle: signed less or equal
  • 4079
    4080

    The remaining two arguments must be vector or

    4081 integer typed. They must also be identical types.

    4082
    Semantics:
    4083

    The 'vicmp' instruction compares op1 and op2

    4084 according to the condition code given as cond. The comparison yields a
    4085 vector of integer result, of
    4086 identical type as the values being compared. The most significant bit in each
    4087 element is 1 if the element-wise comparison evaluates to true, and is 0
    4088 otherwise. All other bits of the result are undefined. The condition codes
    4089 are evaluated identically to the 'icmp'
    4090 instruction.
    4091
    4092
    Example:
    4093
    
                      
                    
    4094 <result> = vicmp eq <2 x i32> < i32 4, i32 0>, < i32 5, i32 0> ; yields: result=<2 x i32> < i32 0, i32 -1 >
    4095 <result> = vicmp ult <2 x i8 > < i8 1, i8 2>, < i8 2, i8 2 > ; yields: result=<2 x i8> < i8 -1, i8 0 >
    4096
    4097
    4098
    4099
    4100
    4101 'vfcmp' Instruction
    4102
    4103
    4104
    Syntax:
    4105
      <result> = vfcmp <cond> <ty> <op1>, <op2>
    4106
    Overview:
    4107

    The 'vfcmp' instruction returns an integer vector value based on

    4108 element-wise comparison of its two floating point vector operands. The output
    4109 elements have the same width as the input elements.

    4110
    Arguments:
    4111

    The 'vfcmp' instruction takes three operands. The first operand is

    4112 the condition code indicating the kind of comparison to perform. It is not
    4113 a value, just a keyword. The possible condition code are:
    4114
    4115
  • false: no comparison, always returns false
  • 4116
  • oeq: ordered and equal
  • 4117
  • ogt: ordered and greater than
  • 4118
  • oge: ordered and greater than or equal
  • 4119
  • olt: ordered and less than
  • 4120
  • ole: ordered and less than or equal
  • 4121
  • one: ordered and not equal
  • 4122
  • ord: ordered (no nans)
  • 4123
  • ueq: unordered or equal
  • 4124
  • ugt: unordered or greater than
  • 4125
  • uge: unordered or greater than or equal
  • 4126
  • ult: unordered or less than
  • 4127
  • ule: unordered or less than or equal
  • 4128
  • une: unordered or not equal
  • 4129
  • uno: unordered (either nans)
  • 4130
  • true: no comparison, always returns true
  • 4131
    4132

    The remaining two arguments must be vector of

    4133 floating point typed. They must also be identical
    4134 types.

    4135
    Semantics:
    4136

    The 'vfcmp' instruction compares op1 and op2

    4137 according to the condition code given as cond. The comparison yields a
    4138 vector of integer result, with
    4139 an identical number of elements as the values being compared, and each element
    4140 having identical with to the width of the floating point elements. The most
    4141 significant bit in each element is 1 if the element-wise comparison evaluates to
    4142 true, and is 0 otherwise. All other bits of the result are undefined. The
    4143 condition codes are evaluated identically to the
    4144 'fcmp' instruction.
    4145
    4146
    Example:
    4147
    
                      
                    
    4148 <result> = vfcmp oeq <2 x float> < float 4, float 0 >, < float 5, float 0 > ; yields: result=<2 x i32> < i32 0, i32 -1 >
    4149 <result> = vfcmp ult <2 x double> < double 1, double 2 >, < double 2, double 2> ; yields: result=<2 x i64> < i64 -1, i64 0 >
    4150
    4151
    4152
    4153
    4154
    41554047 'phi' Instruction
    41564048
    41574049
    571571 INSTKEYWORD("xor", BinaryOpVal, Xor, XOR);
    572572 INSTKEYWORD("icmp", OtherOpVal, ICmp, ICMP);
    573573 INSTKEYWORD("fcmp", OtherOpVal, FCmp, FCMP);
    574 INSTKEYWORD("vicmp", OtherOpVal, VICmp, VICMP);
    575 INSTKEYWORD("vfcmp", OtherOpVal, VFCmp, VFCMP);
    576574
    577575 INSTKEYWORD("phi", OtherOpVal, PHI, PHI_TOK);
    578576 INSTKEYWORD("call", OtherOpVal, Call, CALL);
    None ; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {global.*vicmp slt}
    1 ; PR2317
    0 ; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis
    21 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
    32 target triple = "i686-apple-darwin9.2.2"
    43
    5 define <4 x i32> @foo(<4 x float> %a, <4 x float> %b) nounwind {
    6 entry:
    7 %cmp = vfcmp olt <4 x float> %a, %b ; <4 x i32> [#uses=1]
    8 ret <4 x i32> %cmp
    9 }
    10
    11 global <4 x i32> vicmp slt ( <4 x i32> , <4 x i32> ) ;
    12
    13 @B = external global i32;
    14
    15 global <4 x i32> vicmp slt ( <4 x i32> , <4 x i32> ) ;
    0 ; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium
    1 ; PR2575
    2
    3 define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind {
    4 br i1 false, label %bb.nph, label %._crit_edge
    5
    6 bb.nph: ; preds = %bb.nph, %0
    7 vicmp sgt <4 x i32> zeroinitializer, < i32 -128, i32 -128, i32 -128, i32 -128 > ; <<4 x i32>>:1 [#uses=1]
    8 extractelement <4 x i32> %1, i32 3 ; :2 [#uses=1]
    9 lshr i32 %2, 31 ; :3 [#uses=1]
    10 trunc i32 %3 to i1 ; :4 [#uses=1]
    11 select i1 %4, i32 -1, i32 0 ; :5 [#uses=1]
    12 insertelement <4 x i32> zeroinitializer, i32 %5, i32 3 ; <<4 x i32>>:6 [#uses=1]
    13 and <4 x i32> zeroinitializer, %6 ; <<4 x i32>>:7 [#uses=1]
    14 bitcast <4 x i32> %7 to <4 x float> ; <<4 x float>>:8 [#uses=1]
    15 mul <4 x float> zeroinitializer, %8 ; <<4 x float>>:9 [#uses=1]
    16 bitcast <4 x float> %9 to <4 x i32> ; <<4 x i32>>:10 [#uses=1]
    17 or <4 x i32> %10, zeroinitializer ; <<4 x i32>>:11 [#uses=1]
    18 bitcast <4 x i32> %11 to <4 x float> ; <<4 x float>>:12 [#uses=1]
    19 mul <4 x float> %12, < float 1.000000e+02, float 1.000000e+02, float 1.000000e+02, float 1.000000e+02 > ; <<4 x float>>:13 [#uses=1]
    20 sub <4 x float> %13, < float 1.000000e+02, float 1.000000e+02, float 1.000000e+02, float 1.000000e+02 > ; <<4 x float>>:14 [#uses=1]
    21 extractelement <4 x float> %14, i32 3 ; :15 [#uses=1]
    22 call float @fmaxf( float 0.000000e+00, float %15 ) ; :16 [#uses=0]
    23 br label %bb.nph
    24
    25 ._crit_edge: ; preds = %0
    26 ret void
    27 }
    281
    292 declare float @fmaxf(float, float)
    0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
    1 ; PR2620
    2
    3 define void @t(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind {
    4 vfcmp olt <2 x double> zeroinitializer, zeroinitializer ; <<2 x i64>>:1 [#uses=1]
    5 extractelement <2 x i64> %1, i32 1 ; :2 [#uses=1]
    6 lshr i64 %2, 63 ; :3 [#uses=1]
    7 trunc i64 %3 to i1 ; :4 [#uses=1]
    8 zext i1 %4 to i8 ; :5 [#uses=1]
    9 insertelement <2 x i8> zeroinitializer, i8 %5, i32 1 ; <<2 x i8>>:6 [#uses=1]
    10 store <2 x i8> %6, <2 x i8>* null
    11 ret void
    12 }
    0 ; RUN: llvm-as < %s | opt -constprop -disable-output
    1 ; PR2529
    2 define <4 x i32> @test1(i32 %argc, i8** %argv) {
    3 entry:
    4 %foo = vicmp slt <4 x i32> undef,
    5 ret <4 x i32> %foo
    6 }
    7
    8 define <4 x i32> @test2(i32 %argc, i8** %argv) {
    9 entry:
    10 %foo = vicmp slt <4 x i32>
    11 undef>,
    12 ret <4 x i32> %foo
    13 }
    141
    152
    16 define <4 x i32> @test3() {
    17 %foo = vfcmp ueq <4 x float>
    18 undef>,
    19 ret <4 x i32> %foo
    20 }
    21
    22 define <4 x i32> @test4() {
    23 %foo = vfcmp ueq <4 x float> ,
    24
    25 ret <4 x i32> %foo
    26 }
    27