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[SLPVectorizer][X86] Add broadcast test case from D62427 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361805 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 3 months ago
1 changed file(s) with 124 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
0 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1 ; RUN: opt -slp-vectorizer -S -mtriple=x86_64-unknown-linux -mcpu=corei7-avx -slp-threshold=-999 < %s | FileCheck %s
2
3
4 ; S[0] = %v1 + %v2
5 ; S[1] = %v2 + %v1
6 ; S[2] = %v2 + %v1
7 ; S[3] = %v1 + %v2
8 ;
9 ; TODO: We should broadcast %v1 and %v2
10 ;
11 define void @bcast_vals(i64 *%A, i64 *%B, i64 *%S) {
12 ; CHECK-LABEL: @bcast_vals(
13 ; CHECK-NEXT: entry:
14 ; CHECK-NEXT: [[A0:%.*]] = load i64, i64* [[A:%.*]], align 8
15 ; CHECK-NEXT: [[B0:%.*]] = load i64, i64* [[B:%.*]], align 8
16 ; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[A0]], i32 0
17 ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B0]], i32 1
18 ; CHECK-NEXT: [[TMP2:%.*]] = sub <2 x i64> [[TMP1]],
19 ; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x i64> [[TMP2]], <2 x i64> undef, <4 x i32>
20 ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i64> [[SHUFFLE]], i32 1
21 ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i64> undef, i64 [[TMP3]], i32 0
22 ; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i64> [[SHUFFLE]], i32 0
23 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i64> [[TMP4]], i64 [[TMP5]], i32 1
24 ; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <2 x i64> [[TMP6]], <2 x i64> undef, <4 x i32>
25 ; CHECK-NEXT: [[TMP7:%.*]] = add <4 x i64> [[SHUFFLE]], [[SHUFFLE1]]
26 ; CHECK-NEXT: [[IDXS0:%.*]] = getelementptr inbounds i64, i64* [[S:%.*]], i64 0
27 ; CHECK-NEXT: [[IDXS1:%.*]] = getelementptr inbounds i64, i64* [[S]], i64 1
28 ; CHECK-NEXT: [[IDXS2:%.*]] = getelementptr inbounds i64, i64* [[S]], i64 2
29 ; CHECK-NEXT: [[IDXS3:%.*]] = getelementptr inbounds i64, i64* [[S]], i64 3
30 ; CHECK-NEXT: [[TMP8:%.*]] = bitcast i64* [[IDXS0]] to <4 x i64>*
31 ; CHECK-NEXT: store <4 x i64> [[TMP7]], <4 x i64>* [[TMP8]], align 8
32 ; CHECK-NEXT: ret void
33 ;
34 entry:
35 %A0 = load i64, i64 *%A, align 8
36 %B0 = load i64, i64 *%B, align 8
37
38 %v1 = sub i64 %A0, 1
39 %v2 = sub i64 %B0, 1
40
41 %Add0 = add i64 %v1, %v2
42 %Add1 = add i64 %v2, %v1
43 %Add2 = add i64 %v2, %v1
44 %Add3 = add i64 %v1, %v2
45
46 %idxS0 = getelementptr inbounds i64, i64* %S, i64 0
47 %idxS1 = getelementptr inbounds i64, i64* %S, i64 1
48 %idxS2 = getelementptr inbounds i64, i64* %S, i64 2
49 %idxS3 = getelementptr inbounds i64, i64* %S, i64 3
50
51 store i64 %Add0, i64 *%idxS0, align 8
52 store i64 %Add1, i64 *%idxS1, align 8
53 store i64 %Add2, i64 *%idxS2, align 8
54 store i64 %Add3, i64 *%idxS3, align 8
55 ret void
56 }
57
58 ; S[0] = %v1 + %v2
59 ; S[1] = %v3 + %v1
60 ; S[2] = %v5 + %v1
61 ; S[3] = %v1 + %v4
62 ;
63 ; TODO: We should broadcast %v1.
64 ;
65 define void @bcast_vals2(i16 *%A, i16 *%B, i16 *%C, i16 *%D, i16 *%E, i32 *%S) {
66 ; CHECK-LABEL: @bcast_vals2(
67 ; CHECK-NEXT: entry:
68 ; CHECK-NEXT: [[A0:%.*]] = load i16, i16* [[A:%.*]], align 8
69 ; CHECK-NEXT: [[B0:%.*]] = load i16, i16* [[B:%.*]], align 8
70 ; CHECK-NEXT: [[C0:%.*]] = load i16, i16* [[C:%.*]], align 8
71 ; CHECK-NEXT: [[D0:%.*]] = load i16, i16* [[D:%.*]], align 8
72 ; CHECK-NEXT: [[E0:%.*]] = load i16, i16* [[E:%.*]], align 8
73 ; CHECK-NEXT: [[V1:%.*]] = sext i16 [[A0]] to i32
74 ; CHECK-NEXT: [[V2:%.*]] = sext i16 [[B0]] to i32
75 ; CHECK-NEXT: [[V3:%.*]] = sext i16 [[C0]] to i32
76 ; CHECK-NEXT: [[V4:%.*]] = sext i16 [[D0]] to i32
77 ; CHECK-NEXT: [[V5:%.*]] = sext i16 [[E0]] to i32
78 ; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[V1]], i32 0
79 ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[V3]], i32 1
80 ; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[V5]], i32 2
81 ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[V1]], i32 3
82 ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[V2]], i32 0
83 ; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[V1]], i32 1
84 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[V1]], i32 2
85 ; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[V4]], i32 3
86 ; CHECK-NEXT: [[TMP8:%.*]] = add <4 x i32> [[TMP3]], [[TMP7]]
87 ; CHECK-NEXT: [[IDXS0:%.*]] = getelementptr inbounds i32, i32* [[S:%.*]], i64 0
88 ; CHECK-NEXT: [[IDXS1:%.*]] = getelementptr inbounds i32, i32* [[S]], i64 1
89 ; CHECK-NEXT: [[IDXS2:%.*]] = getelementptr inbounds i32, i32* [[S]], i64 2
90 ; CHECK-NEXT: [[IDXS3:%.*]] = getelementptr inbounds i32, i32* [[S]], i64 3
91 ; CHECK-NEXT: [[TMP9:%.*]] = bitcast i32* [[IDXS0]] to <4 x i32>*
92 ; CHECK-NEXT: store <4 x i32> [[TMP8]], <4 x i32>* [[TMP9]], align 8
93 ; CHECK-NEXT: ret void
94 ;
95 entry:
96 %A0 = load i16, i16 *%A, align 8
97 %B0 = load i16, i16 *%B, align 8
98 %C0 = load i16, i16 *%C, align 8
99 %D0 = load i16, i16 *%D, align 8
100 %E0 = load i16, i16 *%E, align 8
101
102 %v1 = sext i16 %A0 to i32
103 %v2 = sext i16 %B0 to i32
104 %v3 = sext i16 %C0 to i32
105 %v4 = sext i16 %D0 to i32
106 %v5 = sext i16 %E0 to i32
107
108 %Add0 = add i32 %v1, %v2
109 %Add1 = add i32 %v3, %v1
110 %Add2 = add i32 %v5, %v1
111 %Add3 = add i32 %v1, %v4
112
113 %idxS0 = getelementptr inbounds i32, i32* %S, i64 0
114 %idxS1 = getelementptr inbounds i32, i32* %S, i64 1
115 %idxS2 = getelementptr inbounds i32, i32* %S, i64 2
116 %idxS3 = getelementptr inbounds i32, i32* %S, i64 3
117
118 store i32 %Add0, i32 *%idxS0, align 8
119 store i32 %Add1, i32 *%idxS1, align 8
120 store i32 %Add2, i32 *%idxS2, align 8
121 store i32 %Add3, i32 *%idxS3, align 8
122 ret void
123 }