llvm.org GIT mirror llvm / 8b915b4
Remove and simplify some more machineinstr/machineoperand stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 14 years ago
7 changed file(s) with 28 addition(s) and 62 deletion(s). Raw diff Collapse all Expand all
260260
261261
262262 //===----------------------------------------------------------------------===//
263 // class MachineInstr
264 //
265 // Purpose:
266 // Representation of each machine instruction.
267 //
268 // MachineOpCode must be an enum, defined separately for each target.
269 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
270 //
271 // There are 2 kinds of operands:
272 //
273 // (1) Explicit operands of the machine instruction in vector operands[]
274 //
275 // (2) "Implicit operands" are values implicitly used or defined by the
276 // machine instruction, such as arguments to a CALL, return value of
277 // a CALL (if any), and return value of a RETURN.
278 //===----------------------------------------------------------------------===//
279
263 /// MachineInstr - Representation of each machine instruction.
264 ///
280265 class MachineInstr {
281266 short Opcode; // the opcode
282267 std::vector operands; // the operands
286271 // OperandComplete - Return true if it's illegal to add a new operand
287272 bool OperandsComplete() const;
288273
289 //Constructor used by clone() method
290274 MachineInstr(const MachineInstr&);
291
292275 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
293276
294277 // Intrusive list support
296279 friend struct ilist_traits;
297280
298281 public:
299 /// MachineInstr ctor - This constructor only does a _reserve_ of the
300 /// operands, not a resize for them. It is expected that if you use this that
301 /// you call add* methods below to fill up the operands, instead of the Set
302 /// methods. Eventually, the "resizing" ctors will be phased out.
303 ///
304 MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
282 /// MachineInstr ctor - This constructor reserve's space for numOperand
283 /// operands.
284 MachineInstr(short Opcode, unsigned numOperands);
305285
306286 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
307287 /// the MachineInstr is created and added to the end of the specified basic
4646 return *this;
4747 }
4848
49 /// addZImm - Add a new zero extended immediate operand...
50 ///
51 const MachineInstrBuilder &addZImm(unsigned Val) const {
52 MI->addImmOperand(Val);
53 return *this;
54 }
55
56 /// addImm64 - Add a new 64-bit immediate operand...
57 ///
58 const MachineInstrBuilder &addImm64(uint64_t Val) const {
59 MI->addImmOperand(Val);
60 return *this;
61 }
62
6349 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
6450 MI->addMachineBasicBlockOperand(MBB);
6551 return *this;
9884 /// allow for memory efficient representation of machine instructions.
9985 ///
10086 inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
101 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
87 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands));
10288 }
10389
10490 /// BuildMI - This version of the builder sets up the first operand as a
10995 int Opcode, unsigned NumOperands,
11096 unsigned DestReg,
11197 MachineOperand::UseType useType = MachineOperand::Def) {
112 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
113 true, true)).addReg(DestReg, useType);
98 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1))
99 .addReg(DestReg, useType);
114100 }
115101
116102 /// BuildMI - This version of the builder inserts the newly-built
123109 MachineBasicBlock::iterator I,
124110 int Opcode, unsigned NumOperands,
125111 unsigned DestReg) {
126 MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true);
112 MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1);
127113 BB.insert(I, MI);
128114 return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
129115 }
135121 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
136122 MachineBasicBlock::iterator I,
137123 int Opcode, unsigned NumOperands) {
138 MachineInstr *MI = new MachineInstr(Opcode, NumOperands, true, true);
124 MachineInstr *MI = new MachineInstr(Opcode, NumOperands);
139125 BB.insert(I, MI);
140126 return MachineInstrBuilder(MI);
141127 }
4646
4747
4848 MachineInstr* ilist_traits::createSentinel() {
49 MachineInstr* dummy = new MachineInstr(0, 0, true, true);
49 MachineInstr* dummy = new MachineInstr(0, 0);
5050 LeakDetector::removeGarbageObject(dummy);
5151 return dummy;
5252 }
4040 /// add* methods below to fill up the operands, instead of the Set methods.
4141 /// Eventually, the "resizing" ctors will be phased out.
4242 ///
43 MachineInstr::MachineInstr(short opcode, unsigned numOperands, bool XX, bool YY)
43 MachineInstr::MachineInstr(short opcode, unsigned numOperands)
4444 : Opcode(opcode), parent(0) {
4545 operands.reserve(numOperands);
4646 // Make sure that we get added to a machine basicblock
183183 #endif
184184
185185 // Create the new machine instruction.
186 MachineInstr *MI = new MachineInstr(Opc, NumMIOperands, true, true);
186 MachineInstr *MI = new MachineInstr(Opc, NumMIOperands);
187187
188188 // Add result register values for things that are defined by this
189189 // instruction.
6060 unsigned Reg) {
6161 // Because memory references are always represented with four
6262 // values, this adds: Reg, [1, NoReg, 0] to the instruction.
63 return MIB.addReg(Reg).addZImm(1).addReg(0).addImm(0);
63 return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0);
6464 }
6565
6666
7070 ///
7171 inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
7272 unsigned Reg, int Offset) {
73 return MIB.addReg(Reg).addZImm(1).addReg(0).addImm(Offset);
73 return MIB.addReg(Reg).addImm(1).addReg(0).addImm(Offset);
7474 }
7575
7676 /// addRegReg - This function is used to add a memory reference of the form:
7777 /// [Reg + Reg].
7878 inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
7979 unsigned Reg1, unsigned Reg2) {
80 return MIB.addReg(Reg1).addZImm(1).addReg(Reg2).addImm(0);
80 return MIB.addReg(Reg1).addImm(1).addReg(Reg2).addImm(0);
8181 }
8282
8383 inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
9090 MIB.addFrameIndex(AM.Base.FrameIndex);
9191 else
9292 assert (0);
93 MIB.addZImm(AM.Scale).addReg(AM.IndexReg);
93 MIB.addImm(AM.Scale).addReg(AM.IndexReg);
9494 if (AM.GV)
9595 return MIB.addGlobalAddress(AM.GV, AM.Disp);
9696 else
104104 ///
105105 inline const MachineInstrBuilder &
106106 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
107 return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addImm(Offset);
107 return MIB.addFrameIndex(FI).addImm(1).addReg(0).addImm(Offset);
108108 }
109109
110110 /// addConstantPoolReference - This function is used to add a reference to the
116116 inline const MachineInstrBuilder &
117117 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
118118 int Offset = 0) {
119 return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addImm(Offset);
119 return MIB.addConstantPoolIndex(CPI).addImm(1).addReg(0).addImm(Offset);
120120 }
121121
122122 } // End llvm namespace
138138 MachineInstr *MI) {
139139 return addFrameReference(BuildMI(Opcode, 6), FrameIndex)
140140 .addReg(MI->getOperand(1).getReg())
141 .addZImm(MI->getOperand(2).getImmedValue());
141 .addImm(MI->getOperand(2).getImmedValue());
142142 }
143143
144144 static MachineInstr *MakeMIInst(unsigned Opcode, unsigned FrameIndex,
145145 MachineInstr *MI) {
146146 if (MI->getOperand(1).isImmediate())
147147 return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
148 .addZImm(MI->getOperand(1).getImmedValue());
148 .addImm(MI->getOperand(1).getImmedValue());
149149 else if (MI->getOperand(1).isGlobalAddress())
150150 return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
151151 .addGlobalAddress(MI->getOperand(1).getGlobal(),
159159
160160 static MachineInstr *MakeM0Inst(unsigned Opcode, unsigned FrameIndex,
161161 MachineInstr *MI) {
162 return addFrameReference(BuildMI(Opcode, 5), FrameIndex).addZImm(0);
162 return addFrameReference(BuildMI(Opcode, 5), FrameIndex).addImm(0);
163163 }
164164
165165 static MachineInstr *MakeRMInst(unsigned Opcode, unsigned FrameIndex,
173173 MachineInstr *MI) {
174174 const MachineOperand& op = MI->getOperand(0);
175175 return addFrameReference(BuildMI(Opcode, 6, op.getReg(), op.getUseType()),
176 FrameIndex).addZImm(MI->getOperand(2).getImmedValue());
176 FrameIndex).addImm(MI->getOperand(2).getImmedValue());
177177 }
178178
179179
619619 MachineInstr *New = 0;
620620 if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
621621 New=BuildMI(X86::SUB32ri, 1, X86::ESP, MachineOperand::UseAndDef)
622 .addZImm(Amount);
622 .addImm(Amount);
623623 } else {
624624 assert(Old->getOpcode() == X86::ADJCALLSTACKUP);
625625 // factor out the amount the callee already popped.
628628 if (Amount) {
629629 unsigned Opc = Amount < 128 ? X86::ADD32ri8 : X86::ADD32ri;
630630 New = BuildMI(Opc, 1, X86::ESP,
631 MachineOperand::UseAndDef).addZImm(Amount);
631 MachineOperand::UseAndDef).addImm(Amount);
632632 }
633633 }
634634
643643 unsigned Opc = CalleeAmt < 128 ? X86::SUB32ri8 : X86::SUB32ri;
644644 MachineInstr *New =
645645 BuildMI(Opc, 1, X86::ESP,
646 MachineOperand::UseAndDef).addZImm(CalleeAmt);
646 MachineOperand::UseAndDef).addImm(CalleeAmt);
647647 MBB.insert(I, New);
648648 }
649649 }
792792 if (NumBytes > 0) {
793793 unsigned Opc = NumBytes < 128 ? X86::ADD32ri8 : X86::ADD32ri;
794794 BuildMI(MBB, MBBI, Opc, 2)
795 .addReg(X86::ESP, MachineOperand::UseAndDef).addZImm(NumBytes);
795 .addReg(X86::ESP, MachineOperand::UseAndDef).addImm(NumBytes);
796796 } else if ((int)NumBytes < 0) {
797797 unsigned Opc = -NumBytes < 128 ? X86::SUB32ri8 : X86::SUB32ri;
798798 BuildMI(MBB, MBBI, Opc, 2)
799 .addReg(X86::ESP, MachineOperand::UseAndDef).addZImm(-NumBytes);
799 .addReg(X86::ESP, MachineOperand::UseAndDef).addImm(-NumBytes);
800800 }
801801 }
802802 }