llvm.org GIT mirror llvm / 8a67530
Do a sweep of symbol internalization. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369803 91177308-0d34-0410-b5e6-96231b3b80d8 Benjamin Kramer 23 days ago
16 changed file(s) with 39 addition(s) and 33 deletion(s). Raw diff Collapse all Expand all
8585 cl::desc("Number of metadatas above which we emit an index "
8686 "to enable lazy-loading"));
8787
88 cl::opt WriteRelBFToSummary(
88 static cl::opt WriteRelBFToSummary(
8989 "write-relbf-to-summary", cl::Hidden, cl::init(false),
9090 cl::desc("Write relative block frequency to function summary "));
9191
53265326
53275327 // getUnderlyingArgRegs - Find underlying registers used for a truncated,
53285328 // bitcasted, or split argument. Returns a list of
5329 void getUnderlyingArgRegs(SmallVectorImpl> &Regs,
5330 const SDValue &N) {
5329 static void
5330 getUnderlyingArgRegs(SmallVectorImpl> &Regs,
5331 const SDValue &N) {
53315332 switch (N.getOpcode()) {
53325333 case ISD::CopyFromReg: {
53335334 SDValue Op = N.getOperand(1);
4848
4949 using namespace llvm;
5050
51 cl::opt EnableIPRA("enable-ipra", cl::init(false), cl::Hidden,
52 cl::desc("Enable interprocedural register allocation "
53 "to reduce load/store at procedure calls."));
51 static cl::opt
52 EnableIPRA("enable-ipra", cl::init(false), cl::Hidden,
53 cl::desc("Enable interprocedural register allocation "
54 "to reduce load/store at procedure calls."));
5455 static cl::opt DisablePostRASched("disable-post-ra", cl::Hidden,
5556 cl::desc("Disable Post Regalloc Scheduler"));
5657 static cl::opt DisableBranchFold("disable-branch-fold", cl::Hidden,
151152 // substitutePass(&PostRASchedulerID, &PostMachineSchedulerID).
152153 // Targets can return true in targetSchedulesPostRAScheduling() and
153154 // insert a PostRA scheduling pass wherever it wants.
154 cl::opt MISchedPostRA("misched-postra", cl::Hidden,
155 cl::desc("Run MachineScheduler post regalloc (independent of preRA sched)"));
155 static cl::opt MISchedPostRA(
156 "misched-postra", cl::Hidden,
157 cl::desc(
158 "Run MachineScheduler post regalloc (independent of preRA sched)"));
156159
157160 // Experimental option to run live interval analysis early.
158161 static cl::opt EarlyLiveIntervals("early-live-intervals", cl::Hidden,
174177 /// Option names for limiting the codegen pipeline.
175178 /// Those are used in error reporting and we didn't want
176179 /// to duplicate their names all over the place.
177 const char *StartAfterOptName = "start-after";
178 const char *StartBeforeOptName = "start-before";
179 const char *StopAfterOptName = "stop-after";
180 const char *StopBeforeOptName = "stop-before";
180 static const char *StartAfterOptName = "start-after";
181 static const char *StartBeforeOptName = "start-before";
182 static const char *StopAfterOptName = "stop-after";
183 static const char *StopBeforeOptName = "stop-before";
181184
182185 static cl::opt
183186 StartAfterOpt(StringRef(StartAfterOptName),
2424 using namespace llvm;
2525 using namespace llvm::dwarf;
2626
27 cl::opt
27 static cl::opt
2828 UseDbgAddr("use-dbg-addr",
2929 llvm::cl::desc("Use llvm.dbg.addr for all local variables"),
3030 cl::init(false), cl::Hidden);
1717
1818 using namespace llvm;
1919
20 cl::opt ThinLTOSynthesizeEntryCounts(
20 static cl::opt ThinLTOSynthesizeEntryCounts(
2121 "thinlto-synthesize-entry-counts", cl::init(false), cl::Hidden,
2222 cl::desc("Synthesize entry counts based on the summary"));
2323
543543 FileNumber);
544544 }
545545
546 bool isRootFile(const MCDwarfFile &RootFile, StringRef &Directory,
547 StringRef &FileName, Optional Checksum) {
546 static bool isRootFile(const MCDwarfFile &RootFile, StringRef &Directory,
547 StringRef &FileName, Optional Checksum) {
548548 if (RootFile.Name.empty() || RootFile.Name != FileName.data())
549549 return false;
550550 return RootFile.Checksum == Checksum;
104104 llvm_unreachable("unhandled ParseFormat");
105105 }
106106
107 namespace {
107108 // Wrapper that holds the state needed to interact with the C API.
108109 struct CParser {
109110 std::unique_ptr TheParser;
119120 bool hasError() const { return Err.hasValue(); }
120121 const char *getMessage() const { return Err ? Err->c_str() : nullptr; };
121122 };
123 } // namespace
122124
123125 // Create wrappers for C Binding types (see CBindingWrapping.h).
124126 DEFINE_SIMPLE_CONVERSION_FUNCTIONS(CParser, LLVMRemarkParserRef)
124124
125125 // StringRef holding all characters considered as horizontal whitespaces by
126126 // FileCheck input canonicalization.
127 StringRef SpaceChars = " \t";
127 constexpr StringLiteral SpaceChars = " \t";
128128
129129 // Parsing helper function that strips the first character in S and returns it.
130130 static char popFront(StringRef &S) {
114114
115115 #define AARCH64_SPECULATION_HARDENING_NAME "AArch64 speculation hardening pass"
116116
117 cl::opt HardenLoads("aarch64-slh-loads", cl::Hidden,
118 cl::desc("Sanitize loads from memory."),
119 cl::init(true));
117 static cl::opt HardenLoads("aarch64-slh-loads", cl::Hidden,
118 cl::desc("Sanitize loads from memory."),
119 cl::init(true));
120120
121121 namespace {
122122
9292 cl::Hidden, cl::init(true),
9393 cl::desc("Only enable generating memmove in non-nested loops"));
9494
95 cl::opt HexagonVolatileMemcpy("disable-hexagon-volatile-memcpy",
96 cl::Hidden, cl::init(false),
97 cl::desc("Enable Hexagon-specific memcpy for volatile destination."));
95 static cl::opt HexagonVolatileMemcpy(
96 "disable-hexagon-volatile-memcpy", cl::Hidden, cl::init(false),
97 cl::desc("Enable Hexagon-specific memcpy for volatile destination."));
9898
9999 static cl::opt SimplifyLimit("hlir-simplify-limit", cl::init(10000),
100100 cl::Hidden, cl::desc("Maximum number of simplification steps in HLIR"));
5656 cl::ZeroOrMore, cl::init(false),
5757 cl::desc("Disable Hexagon packetizer pass"));
5858
59 cl::opt Slot1Store("slot1-store-slot0-load", cl::Hidden,
60 cl::ZeroOrMore, cl::init(true),
61 cl::desc("Allow slot1 store and slot0 load"));
59 static cl::opt Slot1Store("slot1-store-slot0-load", cl::Hidden,
60 cl::ZeroOrMore, cl::init(true),
61 cl::desc("Allow slot1 store and slot0 load"));
6262
6363 static cl::opt PacketizeVolatiles("hexagon-packetize-volatiles",
6464 cl::ZeroOrMore, cl::Hidden, cl::init(true),
7171 cl::init(false));
7272 cl::opt MV66("mv66", cl::Hidden, cl::desc("Build for Hexagon V66"),
7373 cl::init(false));
74 } // namespace
7574
7675 cl::opt
7776 EnableHVX("mhvx",
8584 clEnumValN(Hexagon::ArchEnum::Generic, "", "")),
8685 // Sentinel for flag not present.
8786 cl::init(Hexagon::ArchEnum::NoArch), cl::ValueOptional);
87 } // namespace
8888
8989 static cl::opt
9090 DisableHVX("mno-hvx", cl::Hidden,
743743 // Return the matching FPR64 register for the given FPR32.
744744 // FIXME: Ideally this function could be removed in favour of using
745745 // information from TableGen.
746 Register convertFPR32ToFPR64(Register Reg) {
746 static Register convertFPR32ToFPR64(Register Reg) {
747747 switch (Reg) {
748748 default:
749749 llvm_unreachable("Not a recognised FPR32 register");
10771077 return 1;
10781078 }
10791079
1080 MachineBasicBlock *emitReadCycleWidePseudo(MachineInstr &MI,
1081 MachineBasicBlock *BB) {
1080 static MachineBasicBlock *emitReadCycleWidePseudo(MachineInstr &MI,
1081 MachineBasicBlock *BB) {
10821082 assert(MI.getOpcode() == RISCV::ReadCycleWide && "Unexpected instruction");
10831083
10841084 // To read the 64-bit cycle CSR on a 32-bit target, we read the two halves.
8383 return false;
8484 }
8585
86 bool IsCallReturnTwice(llvm::MachineOperand &MOp) {
86 static bool IsCallReturnTwice(llvm::MachineOperand &MOp) {
8787 if (!MOp.isGlobal())
8888 return false;
8989 auto *CalleeFn = dyn_cast(MOp.getGlobal());
109109 cl::Hidden, cl::init(false), cl::ZeroOrMore);
110110 #endif
111111
112 namespace {
112113 /// This class is used to represent a candidate for loop fusion. When it is
113114 /// constructed, it checks the conditions for loop fusion to ensure that it
114115 /// represents a valid candidate. It caches several parts of a loop that are
337338 }
338339 };
339340
340 namespace {
341341 using LoopVector = SmallVector;
342342
343343 // Set of Control Flow Equivalent (CFE) Fusion Candidates, sorted in dominance
352352 // keeps the FusionCandidateSet sorted will also simplify the implementation.
353353 using FusionCandidateSet = std::set;
354354 using FusionCandidateCollection = SmallVector;
355 } // namespace
356355
357356 inline llvm::raw_ostream &operator<<(llvm::raw_ostream &OS,
358357 const FusionCandidateSet &CandSet) {
12101209 return LF.fuseLoops(F);
12111210 }
12121211 };
1212 } // namespace
12131213
12141214 PreservedAnalyses LoopFusePass::run(Function &F, FunctionAnalysisManager &AM) {
12151215 auto &LI = AM.getResult(F);