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[AMDGPU][MC][GFX9] Added support of 'inst_offset' modifier for compatibility with SP3 See bug 35329: https://bugs.llvm.org//show_bug.cgi?id=35329 Reviewers: arsenm, vpykhtin, artem.tamazov Differential Revision: https://reviews.llvm.org/D40350 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318947 91177308-0d34-0410-b5e6-96231b3b80d8 Dmitry Preobrazhensky 2 years ago
2 changed file(s) with 9 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
131131 ImmTyIdxen,
132132 ImmTyAddr64,
133133 ImmTyOffset,
134 ImmTyInstOffset,
134135 ImmTyOffset0,
135136 ImmTyOffset1,
136137 ImmTyGLC,
293294 bool isOffset0() const { return isImmTy(ImmTyOffset0) && isUInt<16>(getImm()); }
294295 bool isOffset1() const { return isImmTy(ImmTyOffset1) && isUInt<8>(getImm()); }
295296
296 bool isOffsetU12() const { return isImmTy(ImmTyOffset) && isUInt<12>(getImm()); }
297 bool isOffsetS13() const { return isImmTy(ImmTyOffset) && isInt<13>(getImm()); }
297 bool isOffsetU12() const { return (isImmTy(ImmTyOffset) || isImmTy(ImmTyInstOffset)) && isUInt<12>(getImm()); }
298 bool isOffsetS13() const { return (isImmTy(ImmTyOffset) || isImmTy(ImmTyInstOffset)) && isInt<13>(getImm()); }
298299 bool isGDS() const { return isImmTy(ImmTyGDS); }
299300 bool isGLC() const { return isImmTy(ImmTyGLC); }
300301 bool isSLC() const { return isImmTy(ImmTySLC); }
641642 case ImmTyIdxen: OS << "Idxen"; break;
642643 case ImmTyAddr64: OS << "Addr64"; break;
643644 case ImmTyOffset: OS << "Offset"; break;
645 case ImmTyInstOffset: OS << "InstOffset"; break;
644646 case ImmTyOffset0: OS << "Offset0"; break;
645647 case ImmTyOffset1: OS << "Offset1"; break;
646648 case ImmTyGLC: OS << "GLC"; break;
41064108 {"offset1", AMDGPUOperand::ImmTyOffset1, false, nullptr},
41074109 {"gds", AMDGPUOperand::ImmTyGDS, true, nullptr},
41084110 {"offset", AMDGPUOperand::ImmTyOffset, false, nullptr},
4111 {"inst_offset", AMDGPUOperand::ImmTyInstOffset, false, nullptr},
41094112 {"dfmt", AMDGPUOperand::ImmTyDFMT, false, nullptr},
41104113 {"nfmt", AMDGPUOperand::ImmTyNFMT, false, nullptr},
41114114 {"glc", AMDGPUOperand::ImmTyGLC, true, nullptr},
2727 // VIERR: :1: error: invalid operand for instruction
2828
2929 flat_atomic_add v[3:4], v5 offset:8 slc
30 // GFX9: flat_atomic_add v[3:4], v5 offset:8 slc ; encoding: [0x08,0x00,0x0a,0xdd,0x03,0x05,0x00,0x00]
31 // VIERR: :1: error: invalid operand for instruction
32
33 flat_atomic_add v[3:4], v5 inst_offset:8 slc
3034 // GFX9: flat_atomic_add v[3:4], v5 offset:8 slc ; encoding: [0x08,0x00,0x0a,0xdd,0x03,0x05,0x00,0x00]
3135 // VIERR: :1: error: invalid operand for instruction
3236