llvm.org GIT mirror llvm / 890a876
Print "lock \t foo" instead of "lock \n foo". This gets gas and llc -filetype=obj to agree on the order of prefixes. For llvm-mc we need to fix the asm parser to know that it makes a difference on which line the "lock" is in. Part of pr23594. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238232 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 5 years ago
12 changed file(s) with 20 addition(s) and 39 deletion(s). Raw diff Collapse all Expand all
4747 EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
4848
4949 if (TSFlags & X86II::LOCK)
50 OS << "\tlock\n";
50 OS << "\tlock\t";
5151
5252 // Output CALLpcrel32 as "callq" in 64-bit mode.
5353 // In Intel annotation it's always emitted as "call".
3636 %4 = call i64 @llvm.readcyclecounter() nounwind ; [#uses=1]
3737 %5 = sub i64 %4, %2 ; [#uses=1]
3838 %6 = atomicrmw add i64* getelementptr inbounds ([1216 x i64], [1216 x i64]* @__profiling_callsite_timestamps_live, i32 0, i32 51), i64 %5 monotonic
39 ;CHECK: lock
40 ;CHECK-NEXT: {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live
39 ;CHECK: lock {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live
4140 ;CHECK-NEXT: cmpl $0,
4241 ;CHECK-NEXT: jne
4342 %cmp = icmp eq i32 %3, 0 ; [#uses=1]
1313 ; CHECK: addl $1, %ebx
1414 ; CHECK: movl %edx, %ecx
1515 ; CHECK: adcl $0, %ecx
16 ; CHECK: lock
17 ; CHECK-NEXT: cmpxchg8b ([[REG]])
16 ; CHECK: lock cmpxchg8b ([[REG]])
1817 ; CHECK-NEXT: jne
1918 %0 = atomicrmw add i64* %p, i64 1 seq_cst
2019 ret void
1515 entry:
1616 br label %loop
1717 loop:
18 ; CHECK: lock
19 ; CHECK-NEXT: cmpxchg8b
18 ; CHECK: lock cmpxchg8b
2019 %pair = cmpxchg i64* %ptr, i64 0, i64 1 monotonic monotonic
2120 %r = extractvalue { i64, i1 } %pair, 0
2221 %stored1 = icmp eq i64 %r, 0
1212 ; Make sure the fence comes before the comparison, since it
1313 ; clobbers EFLAGS.
1414
15 ; CHECK: lock
16 ; CHECK-NEXT: orl {{.*}}, (%esp)
15 ; CHECK: lock orl {{.*}}, (%esp)
1716 ; CHECK-NEXT: testl [[REG:%e[a-z]+]], [[REG]]
1817
1918 if.then: ; preds = %entry
44
55 define void @test1(i64* %ptr, i64 %val1) {
66 ; CHECK-LABEL: test1
7 ; CHECK: lock
8 ; CHECK-NEXT: cmpxchg8b
7 ; CHECK: lock cmpxchg8b
98 ; CHECK-NEXT: jne
109 store atomic i64 %val1, i64* %ptr seq_cst, align 8
1110 ret void
1312
1413 define i64 @test2(i64* %ptr) {
1514 ; CHECK-LABEL: test2
16 ; CHECK: lock
17 ; CHECK-NEXT: cmpxchg8b
15 ; CHECK: lock cmpxchg8b
1816 %val = load atomic i64, i64* %ptr seq_cst, align 8
1917 ret i64 %val
2018 }
1010 ; LINUX: seta
1111 ; LINUX: cmovne
1212 ; LINUX: cmovne
13 ; LINUX: lock
14 ; LINUX-NEXT: cmpxchg8b
13 ; LINUX: lock cmpxchg8b
1514 ; LINUX: jne [[LABEL]]
1615 %2 = atomicrmw min i64* @sc64, i64 6 acquire
1716 ; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
1918 ; LINUX: setb
2019 ; LINUX: cmovne
2120 ; LINUX: cmovne
22 ; LINUX: lock
23 ; LINUX-NEXT: cmpxchg8b
21 ; LINUX: lock cmpxchg8b
2422 ; LINUX: jne [[LABEL]]
2523 %3 = atomicrmw umax i64* @sc64, i64 7 acquire
2624 ; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
2826 ; LINUX: seta
2927 ; LINUX: cmovne
3028 ; LINUX: cmovne
31 ; LINUX: lock
32 ; LINUX-NEXT: cmpxchg8b
29 ; LINUX: lock cmpxchg8b
3330 ; LINUX: jne [[LABEL]]
3431 %4 = atomicrmw umin i64* @sc64, i64 8 acquire
3532 ; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
3734 ; LINUX: setb
3835 ; LINUX: cmovne
3936 ; LINUX: cmovne
40 ; LINUX: lock
41 ; LINUX-NEXT: cmpxchg8b
37 ; LINUX: lock cmpxchg8b
4238 ; LINUX: jne [[LABEL]]
4339 ret void
4440 }
88 %tmp = load i64*, i64** %p.addr, align 8
99 ; CHECK-LABEL: t1:
1010 ; CHECK: movl $2147483648, %eax
11 ; CHECK: lock
12 ; CHECK-NEXT: orq %r{{.*}}, (%r{{.*}})
11 ; CHECK: lock orq %r{{.*}}, (%r{{.*}})
1312 %0 = atomicrmw or i64* %tmp, i64 2147483648 seq_cst
1413 ret void
1514 }
2019 store i64* %p, i64** %p.addr, align 8
2120 %tmp = load i64*, i64** %p.addr, align 8
2221 ; CHECK-LABEL: t2:
23 ; CHECK: lock
24 ; CHECK-NEXT: orq $2147483644, (%r{{.*}})
22 ; CHECK: lock orq $2147483644, (%r{{.*}})
2523 %0 = atomicrmw or i64* %tmp, i64 2147483644 seq_cst
2624 ret void
2725 }
33 define void @t1(i128* nocapture %p) nounwind ssp {
44 entry:
55 ; CHECK: movl $1, %ebx
6 ; CHECK: lock
7 ; CHECK-NEXT: cmpxchg16b
6 ; CHECK: lock cmpxchg16b
87 %r = cmpxchg i128* %p, i128 0, i128 1 seq_cst seq_cst
98 ret void
109 }
66 define void @gst_atomic_queue_push(i32* %addr) {
77 ; CHECK-LABEL: gst_atomic_queue_push:
88 ; CHECK: movl (%eax), [[LHS:%e[a-z]+]]
9 ; CHECK: lock
10 ; CHECK-NEXT: orl
9 ; CHECK: lock orl
1110 ; CHECK: movl (%eax), [[RHS:%e[a-z]+]]
1211 ; CHECK: cmpl [[LHS]], [[RHS]]
1312
11
22 define void @pr21099(i64* %p) {
33 ; CHECK-LABEL: pr21099
4 ; CHECK: lock
5 ; CHECK-NEXT: addq $-2147483648
4 ; CHECK: lock addq $-2147483648
65 ; This number is INT32_MIN: 0x80000000UL
76 %1 = atomicrmw add i64* %p, i64 -2147483648 seq_cst
87 ret void
66 ; CHECK: [[LABEL1:\.?LBB[0-9]+_[0-9]+]]:
77 ; CHECK: movsbl
88 ; CHECK: cmpl
9 ; CHECK: lock
10 ; CHECK-NEXT: cmpxchgb
9 ; CHECK: lock cmpxchgb
1110 ; CHECK: jne [[LABEL1]]
1211 %2 = atomicrmw min i8* @sc8, i8 6 acquire
1312 ; CHECK: [[LABEL3:\.?LBB[0-9]+_[0-9]+]]:
1413 ; CHECK: movsbl
1514 ; CHECK: cmpl
16 ; CHECK: lock
17 ; CHECK-NEXT: cmpxchgb
15 ; CHECK: lock cmpxchgb
1816 ; CHECK: jne [[LABEL3]]
1917 %3 = atomicrmw umax i8* @sc8, i8 7 acquire
2018 ; CHECK: [[LABEL5:\.?LBB[0-9]+_[0-9]+]]:
2119 ; CHECK: movzbl
2220 ; CHECK: cmpl
23 ; CHECK: lock
24 ; CHECK-NEXT: cmpxchgb
21 ; CHECK: lock cmpxchgb
2522 ; CHECK: jne [[LABEL5]]
2623 %4 = atomicrmw umin i8* @sc8, i8 8 acquire
2724 ; CHECK: [[LABEL7:\.?LBB[0-9]+_[0-9]+]]:
2825 ; CHECK: movzbl
2926 ; CHECK: cmpl
30 ; CHECK: lock
31 ; CHECK-NEXT: cmpxchgb
27 ; CHECK: lock cmpxchgb
3228 ; CHECK: jne [[LABEL7]]
3329 ret void
3430 }