llvm.org GIT mirror llvm / 887a5c7
Move ARMJITInfo off of the TargetMachine and down onto the subtarget. This required untangling a mess of headers that included around. This a recommit of r210953 with a fix for the removed accessor for JITInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211233 91177308-0d34-0410-b5e6-96231b3b80d8 Eric Christopher 6 years ago
9 changed file(s) with 28 addition(s) and 24 deletion(s). Raw diff Collapse all Expand all
1414 #include "ARM.h"
1515 #include "ARMBaseInstrInfo.h"
1616 #include "ARMConstantPoolValue.h"
17 #include "ARMMachineFunctionInfo.h"
1718 #include "ARMRelocations.h"
1819 #include "ARMSubtarget.h"
1920 #include "ARMTargetMachine.h"
1212
1313 #include "ARMJITInfo.h"
1414 #include "ARMConstantPoolValue.h"
15 #include "ARMMachineFunctionInfo.h"
1516 #include "ARMRelocations.h"
1617 #include "MCTargetDesc/ARMBaseInfo.h"
1718 #include "llvm/CodeGen/JITCodeEmitter.h"
333334 }
334335 }
335336 }
337
338 void ARMJITInfo::Initialize(const MachineFunction &MF, bool isPIC) {
339 const ARMFunctionInfo *AFI = MF.getInfo();
340 ConstPoolId2AddrMap.resize(AFI->getNumPICLabels());
341 JumpTableId2AddrMap.resize(AFI->getNumJumpTables());
342 IsPIC = isPIC;
343 }
1313 #ifndef ARMJITINFO_H
1414 #define ARMJITINFO_H
1515
16 #include "ARMMachineFunctionInfo.h"
1716 #include "llvm/ADT/DenseMap.h"
1817 #include "llvm/ADT/SmallVector.h"
1918 #include "llvm/CodeGen/MachineConstantPool.h"
102101 /// Resize constant pool ids to CONSTPOOL_ENTRY addresses map; resize
103102 /// jump table ids to jump table bases map; remember if codegen relocation
104103 /// model is PIC.
105 void Initialize(const MachineFunction &MF, bool isPIC) {
106 const ARMFunctionInfo *AFI = MF.getInfo();
107 ConstPoolId2AddrMap.resize(AFI->getNumPICLabels());
108 JumpTableId2AddrMap.resize(AFI->getNumJumpTables());
109 IsPIC = isPIC;
110 }
104 void Initialize(const MachineFunction &MF, bool isPIC);
111105
112106 /// getConstantPoolEntryAddr - The ARM target puts all constant
113107 /// pool entries into constant islands. This returns the address of the
1111 using namespace llvm;
1212
1313 void ARMFunctionInfo::anchor() { }
14
15 ARMFunctionInfo::ARMFunctionInfo(MachineFunction &MF)
16 : isThumb(MF.getTarget().getSubtarget().isThumb()),
17 hasThumb2(MF.getTarget().getSubtarget().hasThumb2()),
18 StByValParamsPadding(0), ArgRegsSaveSize(0), HasStackFrame(false),
19 RestoreSPFromFP(false), LRSpilledForFarJump(false),
20 FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
21 GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0), JumpTableUId(0),
22 PICLabelUId(0), VarArgsFrameIndex(0), HasITBlocks(false),
23 GlobalBaseReg(0) {}
129129 JumpTableUId(0), PICLabelUId(0),
130130 VarArgsFrameIndex(0), HasITBlocks(false), GlobalBaseReg(0) {}
131131
132 explicit ARMFunctionInfo(MachineFunction &MF) :
133 isThumb(MF.getTarget().getSubtarget().isThumb()),
134 hasThumb2(MF.getTarget().getSubtarget().hasThumb2()),
135 StByValParamsPadding(0),
136 ArgRegsSaveSize(0), HasStackFrame(false), RestoreSPFromFP(false),
137 LRSpilledForFarJump(false),
138 FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
139 GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0),
140 JumpTableUId(0), PICLabelUId(0),
141 VarArgsFrameIndex(0), HasITBlocks(false), GlobalBaseReg(0) {}
132 explicit ARMFunctionInfo(MachineFunction &MF);
142133
143134 bool isThumbFunction() const { return isThumb; }
144135 bool isThumb1OnlyFunction() const { return isThumb && !hasThumb2; }
147147 ARMProcClass(None), stackAlignment(4), CPUString(CPU), IsLittle(IsLittle),
148148 TargetTriple(TT), Options(Options), TargetABI(ARM_ABI_UNKNOWN),
149149 DL(computeDataLayout(initializeSubtargetDependencies(CPU, FS))),
150 TSInfo(DL) {}
150 TSInfo(DL), JITInfo() {}
151151
152152 void ARMSubtarget::initializeEnvironment() {
153153 HasV4TOps = false;
1313 #ifndef ARMSUBTARGET_H
1414 #define ARMSUBTARGET_H
1515
16 #include "ARMJITInfo.h"
1617 #include "ARMSelectionDAGInfo.h"
1718 #include "MCTargetDesc/ARMMCTargetDesc.h"
1819 #include "llvm/ADT/Triple.h"
255256
256257 const DataLayout *getDataLayout() const { return &DL; }
257258 const ARMSelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
259 ARMJITInfo *getJITInfo() { return &JITInfo; }
258260
259261 private:
260262 const DataLayout DL;
261263 ARMSelectionDAGInfo TSInfo;
264 ARMJITInfo JITInfo;
262265
263266 void initializeEnvironment();
264267 void resetSubtargetFeatures(StringRef CPU, StringRef FS);
5151 CodeGenOpt::Level OL,
5252 bool isLittle)
5353 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
54 Subtarget(TT, CPU, FS, isLittle, Options), JITInfo() {
54 Subtarget(TT, CPU, FS, isLittle, Options) {
5555
5656 // Default to triple-appropriate float ABI
5757 if (Options.FloatABIType == FloatABI::Default)
3131 class ARMBaseTargetMachine : public LLVMTargetMachine {
3232 protected:
3333 ARMSubtarget Subtarget;
34
35 private:
36 ARMJITInfo JITInfo;
37
3834 public:
3935 ARMBaseTargetMachine(const Target &T, StringRef TT,
4036 StringRef CPU, StringRef FS,
4339 CodeGenOpt::Level OL,
4440 bool isLittle);
4541
46 ARMJITInfo *getJITInfo() override { return &JITInfo; }
4742 const ARMSubtarget *getSubtargetImpl() const override { return &Subtarget; }
4843 const ARMTargetLowering *getTargetLowering() const override {
4944 // Implemented by derived classes
5550 const DataLayout *getDataLayout() const override {
5651 return getSubtargetImpl()->getDataLayout();
5752 }
53 ARMJITInfo *getJITInfo() override { return Subtarget.getJITInfo(); }
54
5855 /// \brief Register ARM analysis passes with a pass manager.
5956 void addAnalysisPasses(PassManagerBase &PM) override;
6057