llvm.org GIT mirror llvm / 8777d80
[X86] Remove memory instructions form isUseDefConvertible. The caller of this is looking for comparisons of the input to these instructions with 0. But the memory instructions input is an addess not a value input in a register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363907 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 2 months ago
1 changed file(s) with 15 addition(s) and 15 deletion(s). Raw diff Collapse all Expand all
33493349 static X86::CondCode isUseDefConvertible(const MachineInstr &MI) {
33503350 switch (MI.getOpcode()) {
33513351 default: return X86::COND_INVALID;
3352 case X86::LZCNT16rr: case X86::LZCNT16rm:
3353 case X86::LZCNT32rr: case X86::LZCNT32rm:
3354 case X86::LZCNT64rr: case X86::LZCNT64rm:
3352 case X86::LZCNT16rr:
3353 case X86::LZCNT32rr:
3354 case X86::LZCNT64rr:
33553355 return X86::COND_B;
3356 case X86::POPCNT16rr:case X86::POPCNT16rm:
3357 case X86::POPCNT32rr:case X86::POPCNT32rm:
3358 case X86::POPCNT64rr:case X86::POPCNT64rm:
3356 case X86::POPCNT16rr:
3357 case X86::POPCNT32rr:
3358 case X86::POPCNT64rr:
33593359 return X86::COND_E;
3360 case X86::TZCNT16rr: case X86::TZCNT16rm:
3361 case X86::TZCNT32rr: case X86::TZCNT32rm:
3362 case X86::TZCNT64rr: case X86::TZCNT64rm:
3360 case X86::TZCNT16rr:
3361 case X86::TZCNT32rr:
3362 case X86::TZCNT64rr:
33633363 return X86::COND_B;
3364 case X86::BSF16rr: case X86::BSF16rm:
3365 case X86::BSF32rr: case X86::BSF32rm:
3366 case X86::BSF64rr: case X86::BSF64rm:
3367 case X86::BSR16rr: case X86::BSR16rm:
3368 case X86::BSR32rr: case X86::BSR32rm:
3369 case X86::BSR64rr: case X86::BSR64rm:
3364 case X86::BSF16rr:
3365 case X86::BSF32rr:
3366 case X86::BSF64rr:
3367 case X86::BSR16rr:
3368 case X86::BSR32rr:
3369 case X86::BSR64rr:
33703370 return X86::COND_E;
33713371 }
33723372 }