llvm.org GIT mirror llvm / 8625c79
Merging r353865, r353866, and r353874: ------------------------------------------------------------------------ r353865 | sfertile | 2019-02-12 09:48:22 -0800 (Tue, 12 Feb 2019) | 1 line [PowerPC] Fix printing of negative offsets in call instruction dissasembly. ------------------------------------------------------------------------ ------------------------------------------------------------------------ r353866 | sfertile | 2019-02-12 09:49:04 -0800 (Tue, 12 Feb 2019) | 4 lines [PPC64] Update tests to reflect change in printing of call operand. [NFC] The printing of branch operands for call instructions was changed to properly handle negative offsets. Updating the tests to reflect that. ------------------------------------------------------------------------ ------------------------------------------------------------------------ r353874 | sfertile | 2019-02-12 12:03:04 -0800 (Tue, 12 Feb 2019) | 5 lines Fix undefined behaviour in PPCInstPrinter::printBranchOperand. Fix the undefined behaviour introduced by my previous patch r353865 (left shifting a potentially negative value), which was caught by the bots that run UBSan. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_80@362043 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 2 months ago
5 changed file(s) with 60 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
5858 createPPCDisassembler);
5959 TargetRegistry::RegisterMCDisassembler(getThePPC64LETarget(),
6060 createPPCLEDisassembler);
61 }
62
63 static DecodeStatus DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm,
64 uint64_t Addr,
65 const void *Decoder) {
66 int32_t Offset = SignExtend32<24>(Imm);
67 Inst.addOperand(MCOperand::createImm(Offset));
68 return MCDisassembler::Success;
6169 }
6270
6371 // FIXME: These can be generated by TableGen from the existing register
381381
382382 // Branches can take an immediate operand. This is used by the branch
383383 // selection pass to print .+8, an eight byte displacement from the PC.
384 O << ".+";
385 printAbsBranchOperand(MI, OpNo, O);
384 O << ".";
385 int32_t Imm = SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2);
386 if (Imm >= 0)
387 O << "+";
388 O << Imm;
386389 }
387390
388391 void PPCInstPrinter::printAbsBranchOperand(const MCInst *MI, unsigned OpNo,
736736 def calltarget : Operand {
737737 let PrintMethod = "printBranchOperand";
738738 let EncoderMethod = "getDirectBrEncoding";
739 let DecoderMethod = "DecodePCRel24BranchTarget";
739740 let ParserMatchClass = PPCDirectBrAsmOperand;
741 let OperandType = "OPERAND_PCREL";
740742 }
741743 def abscalltarget : Operand {
742744 let PrintMethod = "printAbsBranchOperand";
0 # RUN: llvm-mc -triple=powerpc64le-unknown-linux -filetype=obj %s -o %t.o
1 # RUN: llvm-objdump -d %t.o | FileCheck %s
2
3 # RUN: llvm-mc -triple=powerpc64-unknown-linux -filetype=obj %s -o %t.o
4 # RUN: llvm-objdump -d %t.o | FileCheck %s
5
6 # RUN: llvm-mc -triple=powerpc-unknown-linux -filetype=obj %s -o %t.o
7 # RUN: llvm-objdump -d %t.o | FileCheck %s
8
9 # CHECK: 0000000000000000 callee_back:
10 # CHECK: 18: {{.*}} bl .-24
11 # CHECK: 20: {{.*}} bl .+16
12 # CHECK: 0000000000000030 callee_forward:
13
14 .text
15 .global caller
16 .type caller,@function
17 .type callee_forward,@function
18 .type callee_back,@function
19
20 .p2align 4
21 callee_back:
22 li 3, 55
23 blr
24
25 .p2align 4
26 caller:
27 .Lgep:
28 addis 2, 12, .TOC.-.Lgep@ha
29 addi 2, 2, .TOC.-.Lgep@l
30 .Llep:
31 .localentry caller, .Llep-.Lgep
32 bl callee_back
33 mr 31, 3
34 bl callee_forward
35 add 3, 3, 31
36 blr
37
38 .p2align 4
39 callee_forward:
40 li 3, 66
41 blr
42
0 if not 'PowerPC' in config.root.targets:
1 config.unsupported = True