llvm.org GIT mirror llvm / 861d296
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models. Patch [4/5] in a series to add assembler/disassembler support for AArch64 SVE unpredicated ADD/SUB instructions. We add SVE as unsupported feature for CPUs that don't have SVE to prevent errors from scheduler models saying it lacks information for these instructions. Patch by Sander De Smalen. Reviewed by: rengolin Differential Revision: https://reviews.llvm.org/D39090 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317582 91177308-0d34-0410-b5e6-96231b3b80d8 Florian Hahn 1 year, 11 months ago
8 changed file(s) with 16 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
2525 // Specification - Instruction Timings"
2626 // v 1.0 Spreadsheet
2727 let CompleteModel = 1;
28
29 list UnsupportedFeatures = [HasSVE];
2830 }
2931
3032
3030 // experiments and benchmarking data.
3131 let LoopMicroOpBufferSize = 16;
3232 let CompleteModel = 1;
33
34 list UnsupportedFeatures = [HasSVE];
3335 }
3436
3537 //===----------------------------------------------------------------------===//
1717 let LoadLatency = 4; // Optimistic load latency.
1818 let MispredictPenalty = 16; // 14-19 cycles are typical.
1919 let CompleteModel = 1;
20
21 list UnsupportedFeatures = [HasSVE];
2022 }
2123
2224 //===----------------------------------------------------------------------===//
2222 let LoadLatency = 3; // Optimistic load latency.
2323 let MispredictPenalty = 11; // Minimum branch misprediction penalty.
2424 let CompleteModel = 1;
25
26 list UnsupportedFeatures = [HasSVE];
2527 }
2628
2729 //===----------------------------------------------------------------------===//
2626 // experiments and benchmarking data.
2727 let LoopMicroOpBufferSize = 16;
2828 let CompleteModel = 1;
29
30 list UnsupportedFeatures = [HasSVE];
2931 }
3032
3133 //===----------------------------------------------------------------------===//
2323 let LoadLatency = 4; // Optimistic load cases.
2424 let MispredictPenalty = 14; // Minimum branch misprediction penalty.
2525 let CompleteModel = 1; // Use the default model otherwise.
26
27 list UnsupportedFeatures = [HasSVE];
2628 }
2729
2830 //===----------------------------------------------------------------------===//
2424 let MispredictPenalty = 8; // Branch mispredict penalty.
2525 let PostRAScheduler = 1; // Use PostRA scheduler.
2626 let CompleteModel = 1;
27
28 list UnsupportedFeatures = [HasSVE];
2729 }
2830
2931 // Modeling each pipeline with BufferSize == 0 since T8X is in-order.
2424 let LoopMicroOpBufferSize = 32;
2525 let PostRAScheduler = 1; // Using PostRA sched.
2626 let CompleteModel = 1;
27
28 list UnsupportedFeatures = [HasSVE];
2729 }
2830
2931 // Define the issue ports.