llvm.org GIT mirror llvm / 85d2541
[AMDGPU] Enable absolute expression initializer for amd_kernel_code_t fields. Differential Revision: http://reviews.llvm.org/D21380 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273561 91177308-0d34-0410-b5e6-96231b3b80d8 Valery Pykhtin 3 years ago
5 changed file(s) with 155 addition(s) and 23 deletion(s). Raw diff Collapse all Expand all
12761276 amd_kernel_code_t &Header) {
12771277 SmallString<40> ErrStr;
12781278 raw_svector_ostream Err(ErrStr);
1279 if (!parseAmdKernelCodeField(ID, getLexer(), Header, Err)) {
1279 if (!parseAmdKernelCodeField(ID, getParser(), Header, Err)) {
12801280 return TokError(Err.str());
12811281 }
12821282 Lex();
12891289 AMDGPU::initDefaultAMDKernelCodeT(Header, getSTI().getFeatureBits());
12901290
12911291 while (true) {
1292
1293 if (getLexer().isNot(AsmToken::EndOfStatement))
1294 return TokError("amd_kernel_code_t values must begin on a new line");
12951292
12961293 // Lex EndOfStatement. This is in a while loop, because lexing a comment
12971294 // will set the current token to EndOfStatement.
3636
3737 // have to define these lambdas because of Set/GetMacro
3838 #define PRINTCOMP(GetMacro, Shift) \
39 [](StringRef Name, const amd_kernel_code_t& C, raw_ostream& OS) { \
39 [](StringRef Name, const amd_kernel_code_t &C, raw_ostream &OS) { \
4040 printName(OS, Name) << \
4141 (int)GetMacro(C.compute_pgm_resource_registers >> Shift); \
4242 }
4343 #define PARSECOMP(SetMacro, Shift) \
44 [](amd_kernel_code_t& C, MCAsmLexer& Lexer, raw_ostream& Err) { \
45 if (!expectEqualInt(Lexer, Err)) \
44 [](amd_kernel_code_t &C, MCAsmParser &MCParser, raw_ostream &Err) { \
45 int64_t Value = 0; \
46 if (!expectAbsExpression(MCParser, Value, Err)) \
4647 return false; \
47 const uint64_t Value = Lexer.getTok().getIntVal(); \
4848 C.compute_pgm_resource_registers |= SetMacro(Value) << Shift; \
4949 return true; \
5050 }
1515 #include "AMDKernelCodeTUtils.h"
1616 #include "SIDefines.h"
1717 #include
18 #include
1819 #include
1920
2021 using namespace llvm;
100101
101102 // Field parsing
102103
103 static bool expectEqualInt(MCAsmLexer &Lexer, raw_ostream &Err) {
104 if (Lexer.isNot(AsmToken::Equal)) {
104 static bool expectAbsExpression(MCAsmParser &MCParser, int64_t &Value, raw_ostream& Err) {
105
106 if (MCParser.getLexer().isNot(AsmToken::Equal)) {
105107 Err << "expected '='";
106108 return false;
107109 }
108 Lexer.Lex();
109 if (Lexer.isNot(AsmToken::Integer)) {
110 Err << "integer literal expected";
110 MCParser.getLexer().Lex();
111
112 if (MCParser.parseAbsoluteExpression(Value)) {
113 Err << "integer absolute expression expected";
111114 return false;
112115 }
113116 return true;
114117 }
115118
116119 template
117 static bool parseField(amd_kernel_code_t &C, MCAsmLexer &Lexer,
120 static bool parseField(amd_kernel_code_t &C, MCAsmParser &MCParser,
118121 raw_ostream &Err) {
119 if (!expectEqualInt(Lexer, Err))
122 int64_t Value = 0;
123 if (!expectAbsExpression(MCParser, Value, Err))
120124 return false;
121 C.*ptr = (T)Lexer.getTok().getIntVal();
125 C.*ptr = (T)Value;
122126 return true;
123127 }
124128
125129 template
126 static bool parseBitField(amd_kernel_code_t &C, MCAsmLexer &Lexer,
130 static bool parseBitField(amd_kernel_code_t &C, MCAsmParser &MCParser,
127131 raw_ostream &Err) {
128 if (!expectEqualInt(Lexer, Err))
132 int64_t Value = 0;
133 if (!expectAbsExpression(MCParser, Value, Err))
129134 return false;
130135 const uint64_t Mask = ((UINT64_C(1) << width) - 1) << shift;
131136 C.*ptr &= (T)~Mask;
132 C.*ptr |= (T)((Lexer.getTok().getIntVal() << shift) & Mask);
137 C.*ptr |= (T)((Value << shift) & Mask);
133138 return true;
134139 }
135140
136141 typedef bool(*ParseFx)(amd_kernel_code_t &,
137 MCAsmLexer &Lexer,
142 MCAsmParser &MCParser,
138143 raw_ostream &Err);
139144
140145 static ArrayRef getParserTable() {
147152 }
148153
149154 bool llvm::parseAmdKernelCodeField(StringRef ID,
150 MCAsmLexer &Lexer,
155 MCAsmParser &MCParser,
151156 amd_kernel_code_t &C,
152157 raw_ostream &Err) {
153158 const int Idx = get_amd_kernel_code_t_FieldIndex(ID);
156161 return false;
157162 }
158163 auto Parser = getParserTable()[Idx];
159 return Parser ? Parser(C, Lexer, Err) : false;
164 return Parser ? Parser(C, MCParser, Err) : false;
160165 }
1616 namespace llvm {
1717
1818 class MCAsmLexer;
19 class MCAsmParser;
1920 class raw_ostream;
2021 class StringRef;
2122
2829 const char *tab);
2930
3031 bool parseAmdKernelCodeField(StringRef ID,
31 MCAsmLexer &Lexer,
32 MCAsmParser &Parser,
3233 amd_kernel_code_t &C,
3334 raw_ostream &Err);
3435
0 // RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | FileCheck %s --check-prefix=ASM
1 // RUN: llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | llvm-readobj -symbols -s -sd | FileCheck %s --check-prefix=ELF
2
3 // ELF: Section {
4 // ELF: Name: .text
5 // ELF: Type: SHT_PROGBITS (0x1)
6 // ELF: Flags [ (0x6)
7 // ELF: SHF_ALLOC (0x2)
8 // ELF: SHF_EXECINSTR (0x4)
9
10 // ELF: SHT_NOTE
11 // ELF: 0000: 04000000 08000000 01000000 414D4400
12 // ELF: 0010: 02000000 00000000 04000000 1B000000
13 // ELF: 0020: 03000000 414D4400 04000700 07000000
14 // ELF: 0030: 00000000 00000000 414D4400 414D4447
15 // ELF: 0040: 50550000
16
17 // ELF: Symbol {
18 // ELF: Name: amd_kernel_code_t_minimal
19 // ELF: Type: AMDGPU_HSA_KERNEL (0xA)
20 // ELF: Section: .text
21 // ELF: }
22
23 .text
24 // ASM: .text
25
26 .hsa_code_object_version 2,0
27 // ASM: .hsa_code_object_version 2,0
28
29 .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
30 // ASM: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
31
32 .amdgpu_hsa_kernel amd_kernel_code_t_minimal
33
34 .set my_is_ptr64, 1
35
36 .if my_is_ptr64 == 0
37 .set my_kernarg_segment_byte_size, 32
38 .else
39 .set my_kernarg_segment_byte_size, 16
40 .endif
41
42 .set my_sgpr, 8
43
44
45 amd_kernel_code_t_minimal:
46 .amd_kernel_code_t
47 kernel_code_version_major = .option.machine_version_major
48 enable_sgpr_kernarg_segment_ptr = 1
49 is_ptr64 = my_is_ptr64
50 compute_pgm_rsrc1_vgprs = 1
51 compute_pgm_rsrc1_sgprs = 1+(my_sgpr-1)/8
52 compute_pgm_rsrc2_user_sgpr = 2
53 kernarg_segment_byte_size = my_kernarg_segment_byte_size
54 wavefront_sgpr_count = my_sgpr
55 // wavefront_sgpr_count = 7
56 ; wavefront_sgpr_count = 7
57 // Make sure a blank line won't break anything:
58
59 // Make sure a line with whitespace won't break anything:
60
61 workitem_vgpr_count = 16
62 .end_amd_kernel_code_t
63
64 // ASM-LABEL: {{^}}amd_kernel_code_t_minimal:
65 // ASM: .amd_kernel_code_t
66 // ASM: kernel_code_version_major = 7
67 // ASM: kernel_code_version_minor = 0
68 // ASM: machine_kind = 1
69 // ASM: machine_version_major = 7
70 // ASM: machine_version_minor = 0
71 // ASM: machine_version_stepping = 0
72 // ASM: kernel_code_entry_byte_offset = 256
73 // ASM: kernel_code_prefetch_byte_size = 0
74 // ASM: max_scratch_backing_memory_byte_size = 0
75 // ASM: compute_pgm_rsrc1_vgprs = 1
76 // ASM: compute_pgm_rsrc1_sgprs = 1
77 // ASM: compute_pgm_rsrc1_priority = 0
78 // ASM: compute_pgm_rsrc1_float_mode = 0
79 // ASM: compute_pgm_rsrc1_priv = 0
80 // ASM: compute_pgm_rsrc1_dx10_clamp = 0
81 // ASM: compute_pgm_rsrc1_debug_mode = 0
82 // ASM: compute_pgm_rsrc1_ieee_mode = 0
83 // ASM: compute_pgm_rsrc2_scratch_en = 0
84 // ASM: compute_pgm_rsrc2_user_sgpr = 2
85 // ASM: compute_pgm_rsrc2_tgid_x_en = 0
86 // ASM: compute_pgm_rsrc2_tgid_y_en = 0
87 // ASM: compute_pgm_rsrc2_tgid_z_en = 0
88 // ASM: compute_pgm_rsrc2_tg_size_en = 0
89 // ASM: compute_pgm_rsrc2_tidig_comp_cnt = 0
90 // ASM: compute_pgm_rsrc2_excp_en_msb = 0
91 // ASM: compute_pgm_rsrc2_lds_size = 0
92 // ASM: compute_pgm_rsrc2_excp_en = 0
93 // ASM: enable_sgpr_private_segment_buffer = 0
94 // ASM: enable_sgpr_dispatch_ptr = 0
95 // ASM: enable_sgpr_queue_ptr = 0
96 // ASM: enable_sgpr_kernarg_segment_ptr = 1
97 // ASM: enable_sgpr_dispatch_id = 0
98 // ASM: enable_sgpr_flat_scratch_init = 0
99 // ASM: enable_sgpr_private_segment_size = 0
100 // ASM: enable_sgpr_grid_workgroup_count_x = 0
101 // ASM: enable_sgpr_grid_workgroup_count_y = 0
102 // ASM: enable_sgpr_grid_workgroup_count_z = 0
103 // ASM: enable_ordered_append_gds = 0
104 // ASM: private_element_size = 0
105 // ASM: is_ptr64 = 1
106 // ASM: is_dynamic_callstack = 0
107 // ASM: is_debug_enabled = 0
108 // ASM: is_xnack_enabled = 0
109 // ASM: workitem_private_segment_byte_size = 0
110 // ASM: workgroup_group_segment_byte_size = 0
111 // ASM: gds_segment_byte_size = 0
112 // ASM: kernarg_segment_byte_size = 16
113 // ASM: workgroup_fbarrier_count = 0
114 // ASM: wavefront_sgpr_count = 8
115 // ASM: workitem_vgpr_count = 16
116 // ASM: reserved_vgpr_first = 0
117 // ASM: reserved_vgpr_count = 0
118 // ASM: reserved_sgpr_first = 0
119 // ASM: reserved_sgpr_count = 0
120 // ASM: debug_wavefront_private_segment_offset_sgpr = 0
121 // ASM: debug_private_segment_buffer_sgpr = 0
122 // ASM: kernarg_segment_alignment = 4
123 // ASM: group_segment_alignment = 4
124 // ASM: private_segment_alignment = 4
125 // ASM: wavefront_size = 6
126 // ASM: call_convention = 0
127 // ASM: runtime_loader_kernel_symbol = 0
128 // ASM: .end_amd_kernel_code_t