llvm.org GIT mirror llvm / 84d682d
Fix some broken CHECK lines. The colon is important. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292761 91177308-0d34-0410-b5e6-96231b3b80d8 Benjamin Kramer 2 years ago
28 changed file(s) with 54 addition(s) and 54 deletion(s). Raw diff Collapse all Expand all
22 ; CHECK: DIVERGENT:
33 ; CHECK-NOT: %arg0
44 ; CHECK-NOT: %arg1
5 ; CHECK-NOT; %arg2
5 ; CHECK-NOT: %arg2
66 ; CHECK: <2 x i32> %arg3
77 ; CHECK: DIVERGENT: <3 x i32> %arg4
88 ; CHECK: DIVERGENT: float %arg5
3535 %r4 = mul i64 %r3, %r0
3636 %r5 = add i64 %r2, %r4
3737 %r6 = icmp ult i64 %r5, undef
38 ; CHECK %2 = mul i64 %lsr.iv, %r3
39 ; CHECK %3 = add i64 %1, -1
40 ; CHECK %4 = add i64 %0, %r3
41 ; CHECK %r6
38 ; CHECK: %2 = mul i64 %lsr.iv, %r3
39 ; CHECK: %3 = add i64 %2, -1
40 ; CHECK: %4 = add i64 %0, %3
41 ; CHECK: %r6
4242 %r7 = getelementptr i64, i64* undef, i64 %r5
4343 store i64 1, i64* %r7, align 8
44 ; CHECK %5 = mul i64 %lsr.iv, %r3
45 ; CHECK %6 = add i64 %5, -1
44 ; CHECK: %5 = mul i64 %lsr.iv, %r3
45 ; CHECK: %6 = add i64 %5, -1
4646 br label %L
4747 }
5656 ; CHECK: %0(s32) = G_FCONSTANT float 1.000000e+00
5757 ; CHECK: %1(s64) = G_FCONSTANT double 2.000000e+00
5858 ; CHECK: [[TMP:%[0-9]+]](s32) = G_FCONSTANT half 0xH0000
59 ; CHECK; %2(s16) = G_FPTRUNC [[TMP]]
59 ; CHECK: %2(s16) = G_FPTRUNC [[TMP]]
6060
6161 %0(s32) = G_FCONSTANT float 1.0
6262 %1(s64) = G_FCONSTANT double 2.0
235235 define <2 x float> @test_vreg_64bit(<2 x float> %in) nounwind {
236236 ; CHECK-LABEL: test_vreg_64bit:
237237 %1 = tail call <2 x float> asm sideeffect "fadd ${0}.2s, ${1}.2s, ${1}.2s", "={v14},w"(<2 x float> %in) nounwind
238 ; CHECK fadd v14.2s, v0.2s, v0.2s:
238 ; CHECK: fadd v14.2s, v0.2s, v0.2s
239239 ret <2 x float> %1
240240 }
241241
242242 define <4 x float> @test_vreg_128bit(<4 x float> %in) nounwind {
243243 ; CHECK-LABEL: test_vreg_128bit:
244244 %1 = tail call <4 x float> asm sideeffect "fadd ${0}.4s, ${1}.4s, ${1}.4s", "={v14},w"(<4 x float> %in) nounwind
245 ; CHECK fadd v14.4s, v0.4s, v0.4s:
245 ; CHECK: fadd v14.4s, v0.4s, v0.4s
246246 ret <4 x float> %1
247247 }
248248
2727 ; CHECK: ldurb {{w[0-9]+}}, [x29, [[LOCADDR:#-?[0-9]+]]]
2828 ; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #1
2929 ; CHECK: sturb w[[STRVAL:[0-9]+]], [x29, [[LOCADDR]]]
30 ; CHECK; and w0, w[[STRVAL]], #0xff
30 ; CHECK: and w0, w[[STRVAL]], #0xff
3131
3232 %ret.1 = load i8, i8* %locvar
3333 %ret.2 = zext i8 %ret.1 to i64
1111 ; for local memory globals.
1212
1313 ; CHECK-LABEL: lds_no_offset:
14 ; CHECK ds_write_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:4
14 ; CHECK: ds_write_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:4
1515 define void @lds_no_offset() {
1616 entry:
1717 %ptr = getelementptr [4 x i32], [4 x i32] addrspace(3)* @lds, i32 0, i32 1
11
22 ; CHECK-LABEL: @volatile_load(
33 ; CHECK: alloca [5 x i32]
4 ; CHECK load volatile i32, i32*
4 ; CHECK: load volatile i32, i32*
55 define void @volatile_load(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) {
66 entry:
77 %stack = alloca [5 x i32], align 4
1414
1515 ; CHECK-LABEL: @volatile_store(
1616 ; CHECK: alloca [5 x i32]
17 ; CHECK store volatile i32 %tmp, i32*
17 ; CHECK: store volatile i32 %tmp, i32*
1818 define void @volatile_store(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) {
1919 entry:
2020 %stack = alloca [5 x i32], align 4
3737 ; PIC: jalrc $25
3838 %call1 = tail call i32 @i()
3939 %cmp = icmp eq i32 %call, %call1
40 ; CHECK beqc
40 ; CHECK: beqc
4141 br i1 %cmp, label %if.end, label %if.then
4242
4343 if.then: ; preds = %entry:
6060 ; PIC: jalrc $25
6161 %call = tail call i32 @k()
6262 %cmp = icmp slt i32 %call, 0
63 ; CHECK : bgez
63 ; CHECK: bgez
6464 br i1 %cmp, label %if.then, label %if.end
6565
6666 if.then: ; preds = %entry:
2323
2424 ; CHECK-LABEL: test_llvm_sqrt(
2525 define float @test_llvm_sqrt(float %a) {
26 ; CHECK sqrt.rn.f32
26 ; CHECK: sqrt.rn.f32
2727 %val = call float @llvm.sqrt.f32(float %a)
2828 ret float %val
2929 }
402402 ; CHECK: [[ELSE_LABEL]]
403403 ; CHECK-NEXT: slwi 3, 4, 1
404404 ; DISABLE: ld 14, -[[STACK_OFFSET]](1) # 8-byte Folded Reload
405 ; CHECK-NEXT blr
405 ; CHECK-NEXT: blr
406406 ;
407407 define i32 @inlineAsm(i32 %cond, i32 %N) {
408408 entry:
1717 ret <16 x i8> %res
1818 ; CHECK-LABEL: @test_byte
1919 ; CHECK: vabsdub 2, 2, 3
20 ; CHECK blr
20 ; CHECK: blr
2121 }
2222
2323 define <8 x i16> @test_half(<8 x i16> %a, <8 x i16> %b) {
2626 ret <8 x i16> %res
2727 ; CHECK-LABEL: @test_half
2828 ; CHECK: vabsduh 2, 2, 3
29 ; CHECK blr
29 ; CHECK: blr
3030 }
3131
3232 define <4 x i32> @test_word(<4 x i32> %a, <4 x i32> %b) {
276276 %0 = tail call <2 x i64> @llvm.ppc.vsx.xvxexpdp(<2 x double> %a)
277277 ret <2 x i64> %0
278278 ; CHECK-LABEL: testXVXEXPDP
279 ; CHECK xvxexpdp 34, 34
280 ; CHECK blr
279 ; CHECK: xvxexpdp 34, 34
280 ; CHECK: blr
281281 }
282282 ; Function Attrs: nounwind readnone
283283 declare <2 x i64>@llvm.ppc.vsx.xvxexpdp(<2 x double>)
288288 %0 = tail call <4 x i32> @llvm.ppc.vsx.xvxsigsp(<4 x float> %a)
289289 ret <4 x i32> %0
290290 ; CHECK-LABEL: testXVXSIGSP
291 ; CHECK xvxsigsp 34, 34
292 ; CHECK blr
291 ; CHECK: xvxsigsp 34, 34
292 ; CHECK: blr
293293 }
294294 ; Function Attrs: nounwind readnone
295295 declare <4 x i32> @llvm.ppc.vsx.xvxsigsp(<4 x float>)
300300 %0 = tail call <2 x i64> @llvm.ppc.vsx.xvxsigdp(<2 x double> %a)
301301 ret <2 x i64> %0
302302 ; CHECK-LABEL: testXVXSIGDP
303 ; CHECK xvxsigdp 34, 34
304 ; CHECK blr
303 ; CHECK: xvxsigdp 34, 34
304 ; CHECK: blr
305305 }
306306 ; Function Attrs: nounwind readnone
307307 declare <2 x i64> @llvm.ppc.vsx.xvxsigdp(<2 x double>)
1212
1313 !0 = !{!"clang version 4.0.0 (trunk 279683)"}
1414 !1 = !{!"branch_weights", i32 1000, i32 1 }
15 ; CHECK ![[WT]] = !{!"branch_weights", i32 1000, i32 1 }
15 ; CHECK: ![[WT]] = !{!"branch_weights", i32 1000, i32 1}
2828 ; CHECK: [[JUMP_TABLE_BLOCK]]:
2929 ; CHECK: btl
3030 ; CHECK: jae [[UNREACHABLE_BLOCK:[.][A-Za-z0-9_]+]]
31 ; CHECK [[UNREACHABLE_BLOCK]]:
31 ; CHECK: [[UNREACHABLE_BLOCK]]:
3232 ; CHECK: .Lfunc_end0
3333 }
66 declare void @abort()
77
88 ; CHECK-LABEL: @foo(
9 ; CHECK-NOT return:
9 ; CHECK-NOT: return:
1010 define void @foo(i32* %p) {
1111 entry:
1212 %p.addr = alloca i32*, align 8
1111 ; CHECK: popq
1212 ; CHECK-NEXT: retq
1313 ; CHECK: movl $40, %edi
14 ; CHECK-NEXT callq ___asan_report_load4
14 ; CHECK-NEXT: callq ___asan_report_load4
1515 define void @sanitize() #0 {
1616 entry:
1717 %tmp = load i8, i8* inttoptr (i64 17592186044421 to i8*)
3838 ret void
3939
4040 ; CHECK: tail call void @f() [ "deopt"(i8* %m) ]
41 ; CHECK-NEXT ret void
41 ; CHECK-NEXT: ret void
4242 }
4343
4444 define i8* @test_3() {
6666 fsub v0.2d, v1.2d, v2.2d
6767
6868 // CHECK: fsub v0.4h, v1.4h, v2.4h // encoding: [0x20,0x14,0xc2,0x0e]
69 // CHECK; fsub v0.8h, v1.8h, v2.8h // encoding: [0x20,0x14,0xc2,0x4e]
69 // CHECK: fsub v0.8h, v1.8h, v2.8h // encoding: [0x20,0x14,0xc2,0x4e]
7070 // CHECK: fsub v0.2s, v1.2s, v2.2s // encoding: [0x20,0xd4,0xa2,0x0e]
7171 // CHECK: fsub v0.4s, v1.4s, v2.4s // encoding: [0x20,0xd4,0xa2,0x4e]
7272 // CHECK: fsub v0.2d, v1.2d, v2.2d // encoding: [0x20,0xd4,0xe2,0x4e]
3636 @ CHECK-ARM moveq r2, #520093696
3737 @ CHECK-THUMB2 moveq.w r2, #520093696
3838 ldrne r3, = 0x00001234
39 @ CHECK movwne r2, #4660
39 @ CHECK: movwne r3, #4660
4040
4141 @
4242 @ Constant Pools
3636 @ CHECK-ARM moveq r2, #520093696
3737 @ CHECK-THUMB2 moveq.w r2, #520093696
3838 ldrne r3, = 0x00001234
39 @ CHECK movwne r2, #4660
39 @ CHECK: movwne r3, #4660
4040
4141 @
4242 @ Constant Pools
6464 # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00]
6565 li $5, 0x80008000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00]
6666 # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00]
67 li $4, ~0xffffffff # CHECK; addiu $4, $zero, 0 # encoding: [0x24,0x04,0x00,0x00]
67 li $4, ~0xffffffff # CHECK: addiu $4, $zero, 0 # encoding: [0x24,0x04,0x00,0x00]
6868 li $4, ~0x80000001 # CHECK: lui $4, 32767 # encoding: [0x3c,0x04,0x7f,0xff]
6969 # CHECK: ori $4, $4, 65534 # encoding: [0x34,0x84,0xff,0xfe]
7070 li $4, ~0x80000000 # CHECK: lui $4, 32767 # encoding: [0x3c,0x04,0x7f,0xff]
9999 syscall 396 # CHECK: syscall 396 # encoding: [0x01,0x8c,0x8b,0x7c]
100100 mod $3, $4, $5 # CHECK: mod $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x58]
101101 modu $3, $4, $5 # CHECK: modu $3, $4, $5 # encoding: [0x00,0xa4,0x19,0xd8]
102 mul $3, $4, $5 # CHECK mul $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x18]
103 muh $3, $4, $5 # CHECK muh $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x58]
104 mulu $3, $4, $5 # CHECK mulu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x98]
105 muhu $3, $4, $5 # CHECK muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
102 mul $3, $4, $5 # CHECK: mul $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x18]
103 muh $3, $4, $5 # CHECK: muh $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x58]
104 mulu $3, $4, $5 # CHECK: mulu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x98]
105 muhu $3, $4, $5 # CHECK: muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
106106 nop # CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
107107 nor $3, $4, $5 # CHECK: nor $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0xd0]
108108 or $3, $4, $5 # CHECK: or $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0x90]
268268 dneg $10 # CHECK: dneg $10, $10 # encoding: [0x59,0x40,0x51,0x90]
269269 dnegu $1, $11 # CHECK: dnegu $1, $11 # encoding: [0x59,0x60,0x09,0xd0]
270270 dnegu $5 # CHECK: dnegu $5, $5 # encoding: [0x58,0xa0,0x29,0xd0]
271 mul $3, $4, $5 # CHECK mul $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x18]
272 muh $3, $4, $5 # CHECK muh $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x58]
273 mulu $3, $4, $5 # CHECK mulu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x98]
274 muhu $3, $4, $5 # CHECK muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
275 dmul $3, $4, $5 # CHECK dmul $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x18]
276 dmuh $3, $4, $5 # CHECK dmuh $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x58]
277 dmulu $3, $4, $5 # CHECK dmulu $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x98]
278 dmuhu $3, $4, $5 # CHECK dmuhu $3, $4, $5 # encoding: [0x58,0xa4,0x18,0xd8]
271 mul $3, $4, $5 # CHECK: mul $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x18]
272 muh $3, $4, $5 # CHECK: muh $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x58]
273 mulu $3, $4, $5 # CHECK: mulu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x98]
274 muhu $3, $4, $5 # CHECK: muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
275 dmul $3, $4, $5 # CHECK: dmul $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x18]
276 dmuh $3, $4, $5 # CHECK: dmuh $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x58]
277 dmulu $3, $4, $5 # CHECK: dmulu $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x98]
278 dmuhu $3, $4, $5 # CHECK: dmuhu $3, $4, $5 # encoding: [0x58,0xa4,0x18,0xd8]
279279 lwp $16, 8($4) # CHECK: lwp $16, 8($4) # encoding: [0x22,0x04,0x10,0x08]
280280 swp $16, 8($4) # CHECK: swp $16, 8($4) # encoding: [0x22,0x04,0x90,0x08]
281281 dsbh $3, $4 # CHECK: dsbh $3, $4 # encoding: [0x58,0x64,0x7b,0x3c]
44 ; store to @a[0] from being constant propagated to the load in @foo, but will not
55 ; prevent @a[1] from being removed since it is dead.
66 ; CHECK: @a.0 = internal unnamed_addr externally_initialized global i32 undef
7 ; CHECK-NOT @a.1
7 ; CHECK-NOT: @a.1
88 @a = internal externally_initialized global [2 x i32] undef, align 4
99 ; This is the same, but a struct rather than an array.
1010 ; CHECK: @b.0 = internal unnamed_addr externally_initialized global i32 undef
11 ; CHECK-NOT @b.1
11 ; CHECK-NOT: @b.1
1212 @b = internal externally_initialized global {i32, i32} undef, align 4
1313
1414 define i32 @foo() {
2626 }
2727
2828 define i32 @indirect_call(i32 ()* %f) {
29 ; CHECK call i32 %f() [[CONVERGENT_ATTR]]
29 ; CHECK: call i32 %f() [[CONVERGENT_ATTR]]
3030 %a = call i32 %f() convergent
3131 ret i32 %a
3232 }
0 ; RUN: opt -basicaa -loop-idiom < %s -S | FileCheck %s
11 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
22
3 ; CHECK @.memset_pattern = private unnamed_addr constant [4 x i32] [i32 2, i32 2, i32 2, i32 2], align 16
3 ; CHECK: @.memset_pattern = private unnamed_addr constant [4 x i32] [i32 2, i32 2, i32 2, i32 2], align 16
44
55 target triple = "x86_64-apple-darwin10.0.0"
66
2626 %cmp.i = icmp sgt i32 %i, 2
2727 %mul.i = select i1 %cmp.i, i32 1, i32 %i
2828 ; CHECK: %mul.i = select i1 %cmp.i, i32 1, i32 %i
29 ; CHECK-SAME !prof ![[BW:[0-9]+]]
30 ; CHECK ![[BW]] = !{!"branch_weights", i32 12, i32 6}
29 ; CHECK-SAME: !prof ![[BW:[0-9]+]]
30 ; CHECK: ![[BW]] = !{!"branch_weights", i32 12, i32 6}
3131 %retval.0.i = mul nsw i32 %mul.i, %i
3232 ret i32 %retval.0.i
3333 }
1818 unreachable
1919
2020 idxend: ; preds = %top
21 ; CHECK-NOT call void @llvm.dbg.value(metadata %foo* %cp,
21 ; CHECK-NOT: call void @llvm.dbg.value(metadata %foo* %cp,
2222 %0 = load volatile %foo, %foo* %cp, align 8
2323 ; CHECK: call void @llvm.dbg.value(metadata %foo %0,
2424 store volatile %foo %0, %foo* undef, align 8