llvm.org GIT mirror llvm / 84125ca
[ms-inline asm] Remove the MatchInstruction() function. Previously, this was the interface between the front-end and the MC layer when parsing inline assembly. Unfortunately, this is too deep into the parsing stack. Specifically, we're unable to handle target-independent assembly (i.e., assembly directives, labels, etc.). Note the MatchAndEmitInstruction() isn't the correct abstraction either. I'll be exposing target-independent hooks shortly, so this is really just a cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165858 91177308-0d34-0410-b5e6-96231b3b80d8 Chad Rosier 7 years ago
7 changed file(s) with 51 addition(s) and 64 deletion(s). Raw diff Collapse all Expand all
7272 /// Run - Run the parser on the input source buffer.
7373 virtual bool Run(bool NoInitialTextSection, bool NoFinalize = false) = 0;
7474
75 virtual void setParsingInlineAsm(bool V) = 0;
76
7577 /// Warning - Emit a warning at the location \p L, with the message \p Msg.
7678 ///
7779 /// \return The return value is true, if warnings are fatal.
8181 /// otherwise.
8282 virtual bool mnemonicIsValid(StringRef Mnemonic) = 0;
8383
84 /// MatchInstruction - Recognize a series of operands of a parsed instruction
85 /// as an actual MCInst. This returns false on success and returns true on
86 /// failure to match.
87 ///
88 /// On failure, the target parser is responsible for emitting a diagnostic
89 /// explaining the match failure.
90 virtual bool
91 MatchInstruction(SMLoc IDLoc,
92 SmallVectorImpl &Operands,
93 MCStreamer &Out, unsigned &Opcode, unsigned &OrigErrorInfo,
94 bool MatchingInlineAsm = false) {
95 OrigErrorInfo = ~0x0;
96 return true;
97 }
98
9984 /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
10085 /// instruction as an actual MCInst and emit it to the specified MCStreamer.
10186 /// This returns false on success and returns true on failure to match.
10388 /// On failure, the target parser is responsible for emitting a diagnostic
10489 /// explaining the match failure.
10590 virtual bool
106 MatchAndEmitInstruction(SMLoc IDLoc,
91 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
10792 SmallVectorImpl &Operands,
108 MCStreamer &Out) = 0;
93 MCStreamer &Out, unsigned &ErrorInfo,
94 bool MatchingInlineAsm) = 0;
10995
11096 /// checkTargetMatchPredicate - Validate the instruction match against
11197 /// any complex target predicates not expressible via match classes.
114100 }
115101
116102 virtual void convertToMapAndConstraints(unsigned Kind,
117 const SmallVectorImpl &Operands) = 0;
103 const SmallVectorImpl &Operands) = 0;
118104 };
119105
120106 } // End llvm namespace
132132 /// IsDarwin - is Darwin compatibility enabled?
133133 bool IsDarwin;
134134
135 /// ParsingInlineAsm - are we parsing ms-style inline assembly?
136 bool ParsingInlineAsm;
137
135138 public:
136139 AsmParser(SourceMgr &SM, MCContext &Ctx, MCStreamer &Out,
137140 const MCAsmInfo &MAI);
169172 ArrayRef Ranges = ArrayRef());
170173
171174 virtual const AsmToken &Lex();
175
176 void setParsingInlineAsm(bool V) { ParsingInlineAsm = V; }
172177
173178 bool ParseExpression(const MCExpr *&Res);
174179 virtual bool ParseExpression(const MCExpr *&Res, SMLoc &EndLoc);
411416 : Lexer(_MAI), Ctx(_Ctx), Out(_Out), MAI(_MAI), SrcMgr(_SM),
412417 GenericParser(new GenericAsmParser), PlatformParser(0),
413418 CurBuffer(0), MacrosEnabled(true), CppHashLineNumber(0),
414 AssemblerDialect(~0U), IsDarwin(false) {
419 AssemblerDialect(~0U), IsDarwin(false), ParsingInlineAsm(false) {
415420 // Save the old handler.
416421 SavedDiagHandler = SrcMgr.getDiagHandler();
417422 SavedDiagContext = SrcMgr.getDiagContext();
603608 }
604609
605610 void AsmParser::CheckForValidSection() {
606 if (!getStreamer().getCurrentSection()) {
611 if (!ParsingInlineAsm && !getStreamer().getCurrentSection()) {
607612 TokError("expected section directive before assembly directive");
608613 Out.SwitchSection(Ctx.getMachOSection(
609614 "__TEXT", "__text",
13451350 }
13461351
13471352 // If parsing succeeded, match the instruction.
1348 if (!HadError)
1349 HadError = getTargetParser().MatchAndEmitInstruction(IDLoc, ParsedOperands,
1350 Out);
1353 if (!HadError) {
1354 unsigned Opcode;
1355 unsigned ErrorInfo;
1356 HadError = getTargetParser().MatchAndEmitInstruction(IDLoc, Opcode,
1357 ParsedOperands,
1358 Out, ErrorInfo,
1359 ParsingInlineAsm);
1360 }
13511361
13521362 // Free any parsed operands.
13531363 for (unsigned i = 0, e = ParsedOperands.size(); i != e; ++i)
258258
259259 unsigned checkTargetMatchPredicate(MCInst &Inst);
260260
261 bool MatchAndEmitInstruction(SMLoc IDLoc,
261 bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
262262 SmallVectorImpl &Operands,
263 MCStreamer &Out);
263 MCStreamer &Out, unsigned &ErrorInfo,
264 bool MatchingInlineAsm);
264265 };
265266 } // end anonymous namespace
266267
74737474
74747475 static const char *getSubtargetFeatureName(unsigned Val);
74757476 bool ARMAsmParser::
7476 MatchAndEmitInstruction(SMLoc IDLoc,
7477 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
74777478 SmallVectorImpl &Operands,
7478 MCStreamer &Out) {
7479 MCStreamer &Out, unsigned &ErrorInfo,
7480 bool MatchingInlineAsm) {
74797481 MCInst Inst;
7480 unsigned ErrorInfo;
74817482 unsigned MatchResult;
74827483 MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo,
7483 /*matchingInlineAsm*/ false);
7484 MatchingInlineAsm);
74847485 switch (MatchResult) {
74857486 default: break;
74867487 case Match_Success:
4343
4444 bool ParseDirectiveWord(unsigned Size, SMLoc L);
4545
46 bool MatchAndEmitInstruction(SMLoc IDLoc,
46 bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
4747 SmallVectorImpl &Operands,
48 MCStreamer &Out);
48 MCStreamer &Out, unsigned &ErrorInfo,
49 bool MatchingInlineAsm);
4950
5051 /// @name Auto-generated Match Functions
5152 /// {
311312 /// }
312313 //
313314 bool MBlazeAsmParser::
314 MatchAndEmitInstruction(SMLoc IDLoc,
315 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
315316 SmallVectorImpl &Operands,
316 MCStreamer &Out) {
317 MCStreamer &Out, unsigned &ErrorInfo,
318 bool MatchingInlineAsm) {
317319 MCInst Inst;
318 unsigned ErrorInfo;
319320 switch (MatchInstructionImpl(Operands, Inst, ErrorInfo,
320321 /*matchingInlineAsm*/ false)) {
321322 default: break;
6666 #define GET_ASSEMBLER_HEADER
6767 #include "MipsGenAsmMatcher.inc"
6868
69 bool MatchAndEmitInstruction(SMLoc IDLoc,
69 bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
7070 SmallVectorImpl &Operands,
71 MCStreamer &Out);
71 MCStreamer &Out, unsigned &ErrorInfo,
72 bool MatchingInlineAsm);
7273
7374 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
7475
451452 }
452453
453454 bool MipsAsmParser::
454 MatchAndEmitInstruction(SMLoc IDLoc,
455 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
455456 SmallVectorImpl &Operands,
456 MCStreamer &Out) {
457 MCStreamer &Out, unsigned &ErrorInfo,
458 bool MatchingInlineAsm) {
457459 MCInst Inst;
458 unsigned ErrorInfo;
459460 unsigned MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo,
460 /*matchingInlineAsm*/ false);
461 MatchingInlineAsm);
461462
462463 switch (MatchResult) {
463464 default: break;
6262 bool processInstruction(MCInst &Inst,
6363 const SmallVectorImpl &Ops);
6464
65 bool MatchAndEmitInstruction(SMLoc IDLoc,
65 bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
6666 SmallVectorImpl &Operands,
67 MCStreamer &Out);
68 bool MatchInstruction(SMLoc IDLoc,
69 SmallVectorImpl &Operands,
70 MCStreamer &Out, unsigned &Opcode,
71 unsigned &OrigErrorInfo, bool MatchingInlineAsm = false);
67 MCStreamer &Out, unsigned &ErrorInfo,
68 bool MatchingInlineAsm);
7269
7370 /// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi)
7471 /// in 64bit mode or (%esi) or %es:(%esi) in 32bit mode.
15181515 }
15191516
15201517 bool X86AsmParser::
1521 MatchAndEmitInstruction(SMLoc IDLoc,
1518 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
15221519 SmallVectorImpl &Operands,
1523 MCStreamer &Out) {
1524 unsigned Opcode;
1525 unsigned ErrorInfo;
1526 bool Error = MatchInstruction(IDLoc, Operands, Out, Opcode, ErrorInfo);
1527 return Error;
1528 }
1529
1530 bool X86AsmParser::
1531 MatchInstruction(SMLoc IDLoc,
1532 SmallVectorImpl &Operands,
1533 MCStreamer &Out, unsigned &Opcode, unsigned &OrigErrorInfo,
1534 bool MatchingInlineAsm) {
1520 MCStreamer &Out, unsigned &ErrorInfo,
1521 bool MatchingInlineAsm) {
15351522 assert(!Operands.empty() && "Unexpect empty operand list!");
15361523 X86Operand *Op = static_cast(Operands[0]);
15371524 assert(Op->isToken() && "Leading operand should always be a mnemonic!");
15721559
15731560 // First, try a direct match.
15741561 switch (MatchInstructionImpl(Operands, Inst,
1575 OrigErrorInfo, MatchingInlineAsm,
1562 ErrorInfo, MatchingInlineAsm,
15761563 isParsingIntelSyntax())) {
15771564 default: break;
15781565 case Match_Success:
16501637 if (!MatchingInlineAsm)
16511638 Out.EmitInstruction(Inst);
16521639 Opcode = Inst.getOpcode();
1653 // FIXME: Handle the map and constraints.
16541640 return false;
16551641 }
16561642
16951681 }
16961682
16971683 // Recover location info for the operand if we know which was the problem.
1698 if (OrigErrorInfo != ~0U) {
1699 if (OrigErrorInfo >= Operands.size())
1684 if (ErrorInfo != ~0U) {
1685 if (ErrorInfo >= Operands.size())
17001686 return Error(IDLoc, "too few operands for instruction",
17011687 EmptyRanges, MatchingInlineAsm);
17021688
1703 X86Operand *Operand = (X86Operand*)Operands[OrigErrorInfo];
1689 X86Operand *Operand = (X86Operand*)Operands[ErrorInfo];
17041690 if (Operand->getStartLoc().isValid()) {
17051691 SMRange OperandRange = Operand->getLocRange();
17061692 return Error(Operand->getStartLoc(), "invalid operand for instruction",