llvm.org GIT mirror llvm / 833c93c
Mark ARM subtarget features that are available for the assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8 Jim Grosbach 9 years ago
23 changed file(s) with 42 addition(s) and 36 deletion(s). Raw diff Collapse all Expand all
141141 //===----------------------------------------------------------------------===//
142142 // ARM Instruction Predicate Definitions.
143143 //
144 def HasV4T : Predicate<"Subtarget->hasV4TOps()">;
144 def HasV4T : Predicate<"Subtarget->hasV4TOps()">, AssemblerPredicate;
145145 def NoV4T : Predicate<"!Subtarget->hasV4TOps()">;
146146 def HasV5T : Predicate<"Subtarget->hasV5TOps()">;
147 def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">;
148 def HasV6 : Predicate<"Subtarget->hasV6Ops()">;
149 def HasV6T2 : Predicate<"Subtarget->hasV6T2Ops()">;
147 def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">, AssemblerPredicate;
148 def HasV6 : Predicate<"Subtarget->hasV6Ops()">, AssemblerPredicate;
149 def HasV6T2 : Predicate<"Subtarget->hasV6T2Ops()">, AssemblerPredicate;
150150 def NoV6T2 : Predicate<"!Subtarget->hasV6T2Ops()">;
151 def HasV7 : Predicate<"Subtarget->hasV7Ops()">;
151 def HasV7 : Predicate<"Subtarget->hasV7Ops()">, AssemblerPredicate;
152152 def NoVFP : Predicate<"!Subtarget->hasVFP2()">;
153 def HasVFP2 : Predicate<"Subtarget->hasVFP2()">;
154 def HasVFP3 : Predicate<"Subtarget->hasVFP3()">;
155 def HasNEON : Predicate<"Subtarget->hasNEON()">;
156 def HasDivide : Predicate<"Subtarget->hasDivide()">;
157 def HasT2ExtractPack : Predicate<"Subtarget->hasT2ExtractPack()">;
158 def HasDB : Predicate<"Subtarget->hasDataBarrier()">;
153 def HasVFP2 : Predicate<"Subtarget->hasVFP2()">, AssemblerPredicate;
154 def HasVFP3 : Predicate<"Subtarget->hasVFP3()">, AssemblerPredicate;
155 def HasNEON : Predicate<"Subtarget->hasNEON()">, AssemblerPredicate;
156 def HasDivide : Predicate<"Subtarget->hasDivide()">, AssemblerPredicate;
157 def HasT2ExtractPack : Predicate<"Subtarget->hasT2ExtractPack()">,
158 AssemblerPredicate;
159 def HasDB : Predicate<"Subtarget->hasDataBarrier()">,
160 AssemblerPredicate;
159161 def UseNEONForFP : Predicate<"Subtarget->useNEONForSinglePrecisionFP()">;
160162 def DontUseNEONForFP : Predicate<"!Subtarget->useNEONForSinglePrecisionFP()">;
161 def IsThumb : Predicate<"Subtarget->isThumb()">;
163 def IsThumb : Predicate<"Subtarget->isThumb()">, AssemblerPredicate;
162164 def IsThumb1Only : Predicate<"Subtarget->isThumb1Only()">;
163 def IsThumb2 : Predicate<"Subtarget->isThumb2()">;
164 def IsARM : Predicate<"!Subtarget->isThumb()">;
165 def IsThumb2 : Predicate<"Subtarget->isThumb2()">, AssemblerPredicate;
166 def IsARM : Predicate<"!Subtarget->isThumb()">, AssemblerPredicate;
165167 def IsDarwin : Predicate<"Subtarget->isTargetDarwin()">;
166168 def IsNotDarwin : Predicate<"!Subtarget->isTargetDarwin()">;
167169
9191
9292 public:
9393 ARMAsmParser(const Target &T, MCAsmParser &_Parser, TargetMachine &_TM)
94 : TargetAsmParser(T), Parser(_Parser), TM(_TM) {}
94 : TargetAsmParser(T), Parser(_Parser), TM(_TM) {
95 // Initialize the set of available features.
96 setAvailableFeatures(ComputeAvailableFeatures(
97 &TM.getSubtarget()));
98 }
9599
96100 virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc,
97101 SmallVectorImpl &Operands);
None @ RUN: llvm-mc -triple arm-unknown-unknown -show-encoding %s | FileCheck %s
0 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s | FileCheck %s
11
22 @ CHECK: nop
33 @ CHECK: encoding: [0x00,0xf0,0x20,0xe3]
None @ RUN: llvm-mc -triple arm-unknown-unknown %s | FileCheck %s
0 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown %s | FileCheck %s
11
22 @ CHECK: TEST0:
33 @ CHECK: .long 3
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11
22 // CHECK: vabs.s8 d16, d16 @ encoding: [0x20,0x03,0xf1,0xf3]
33 vabs.s8 d16, d16
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11 // XFAIL: *
22 // NOTE: This currently fails because the ASM parser doesn't parse vabal.
33
None // RUN: llvm-mc -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
11
22
33 // CHECK: vadd.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf2]
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11 // XFAIL: *
22
33 // CHECK: vcnt.8 d16, d16 @ encoding: [0x20,0x05,0xf0,0xf3]
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11
22 // CHECK: vand d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xf2]
33 vand d16, d17, d16
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11 // XFAIL: *
22
33 // FIXME: We cannot currently test the following instructions, which are
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11
22 // CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xf3]
33 vcvt.s32.f32 d16, d16
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11 // XFAIL: *
22
33 // CHECK: vdup.8 d16, r0 @ encoding: [0x90,0x0b,0xc0,0xee]
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11
22 // CHECK: vmin.s8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xf2]
33 vmin.s8 d16, d16, d17
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11 // XFAIL: *
22
33 // CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xf2]
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11 // XFAIL: *
22
33 // CHECK: vmla.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xf2]
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11
22 // CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf2]
33 vmul.i8 d16, d16, d17
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11
22 // CHECK: vneg.s8 d16, d16 @ encoding: [0xa0,0x03,0xf1,0xf3]
33 vneg.s8 d16, d16
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11 // XFAIL: *
22
33 // CHECK: vpadd.i8 d16, d17, d16 @ encoding: [0xb0,0x0b,0x41,0xf2]
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11
22 // CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xf3]
33 vrecpe.u32 d16, d16
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11
22 // CHECK: vrev64.8 d16, d16 @ encoding: [0x20,0x00,0xf0,0xf3]
33 vrev64.8 d16, d16
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11
22 // CHECK: vqshl.s8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xf2]
33 vqshl.s8 d16, d16, d17
None // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
11
22 // CHECK: vshl.u8 d16, d17, d16 @ encoding: [0xa1,0x04,0x40,0xf3]
33 vshl.u8 d16, d17, d16
None // RUN: llvm-mc -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
0 // RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
11
22 // CHECK: vadd.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x71,0xee]
33 vadd.f64 d16, d17, d16