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Switch over to tablegen generated header files git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7512 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 17 years ago
1 changed file(s) with 6 addition(s) and 9 deletion(s). Raw diff Collapse all Expand all
1212 class Pass;
1313
1414 /// createX86SimpleInstructionSelector - This pass converts an LLVM function
15 /// into a machine code representation is a very simple peep-hole fashion. The
15 /// into a machine code representation in a very simple peep-hole fashion. The
1616 /// generated code sucks but the implementation is nice and simple.
1717 ///
1818 Pass *createX86SimpleInstructionSelector(TargetMachine &TM);
4141 ///
4242 Pass *createEmitX86CodeToMemory();
4343
44 // Defines symbolic names for X86 registers. This defines a mapping from
45 // register name to register number.
46 //
47 #include "X86GenRegisterNames.inc"
48
4449 /// X86 namespace - This namespace contains all of the register and opcode enums
4550 /// used by the X86 backend.
4651 ///
4752 namespace X86 {
48 // Defines a large number of symbolic names for X86 registers. This defines a
49 // mapping from register name to register number.
50 //
51 enum Register {
52 #define R(ENUM, NAME, FLAGS, TSFLAGS, ALIAS_SET) ENUM,
53 #include "X86RegisterInfo.def"
54 };
55
5653 // This defines a large number of symbolic names for X86 instruction opcodes.
5754 enum Opcode {
5855 #define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS, IMPDEFS, IMPUSES) ENUM,