llvm.org GIT mirror llvm / 82a644a
Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201641 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 5 years ago
11 changed file(s) with 122 addition(s) and 120 deletion(s). Raw diff Collapse all Expand all
7272 case THREEBYTE_3A:
7373 decision = &THREEBYTE3A_SYM;
7474 break;
75 case THREEBYTE_A6:
76 decision = &THREEBYTEA6_SYM;
77 break;
78 case THREEBYTE_A7:
79 decision = &THREEBYTEA7_SYM;
80 break;
8175 case XOP8_MAP:
8276 decision = &XOP8_MAP_SYM;
8377 break;
121115 break;
122116 case THREEBYTE_3A:
123117 dec = &THREEBYTE3A_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
124 break;
125 case THREEBYTE_A6:
126 dec = &THREEBYTEA6_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
127 break;
128 case THREEBYTE_A7:
129 dec = &THREEBYTEA7_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
130118 break;
131119 case XOP8_MAP:
132120 dec = &XOP8_MAP_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
767755 return -1;
768756
769757 insn->opcodeType = THREEBYTE_3A;
770 } else if (current == 0xa6) {
771 dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
772
773 if (consumeByte(insn, ¤t))
774 return -1;
775
776 insn->opcodeType = THREEBYTE_A6;
777 } else if (current == 0xa7) {
778 dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
779
780 if (consumeByte(insn, ¤t))
781 return -1;
782
783 insn->opcodeType = THREEBYTE_A7;
784758 } else {
785759 dbgprintf(insn, "Didn't find a three-byte escape prefix");
786760
2929 #define TWOBYTE_SYM x86DisassemblerTwoByteOpcodes
3030 #define THREEBYTE38_SYM x86DisassemblerThreeByte38Opcodes
3131 #define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes
32 #define THREEBYTEA6_SYM x86DisassemblerThreeByteA6Opcodes
33 #define THREEBYTEA7_SYM x86DisassemblerThreeByteA7Opcodes
3432 #define XOP8_MAP_SYM x86DisassemblerXOP8Opcodes
3533 #define XOP9_MAP_SYM x86DisassemblerXOP9Opcodes
3634 #define XOPA_MAP_SYM x86DisassemblerXOPAOpcodes
4139 #define TWOBYTE_STR "x86DisassemblerTwoByteOpcodes"
4240 #define THREEBYTE38_STR "x86DisassemblerThreeByte38Opcodes"
4341 #define THREEBYTE3A_STR "x86DisassemblerThreeByte3AOpcodes"
44 #define THREEBYTEA6_STR "x86DisassemblerThreeByteA6Opcodes"
45 #define THREEBYTEA7_STR "x86DisassemblerThreeByteA7Opcodes"
4642 #define XOP8_MAP_STR "x86DisassemblerXOP8Opcodes"
4743 #define XOP9_MAP_STR "x86DisassemblerXOP9Opcodes"
4844 #define XOPA_MAP_STR "x86DisassemblerXOPAOpcodes"
292288 TWOBYTE = 1,
293289 THREEBYTE_38 = 2,
294290 THREEBYTE_3A = 3,
295 THREEBYTE_A6 = 4,
296 THREEBYTE_A7 = 5,
297 XOP8_MAP = 6,
298 XOP9_MAP = 7,
299 XOPA_MAP = 8
291 XOP8_MAP = 4,
292 XOP9_MAP = 5,
293 XOPA_MAP = 6
300294 } OpcodeType;
301295
302296 /*
289289 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, // Format /4 /5 /6 /7
290290
291291 //// MRM_XX - A mod/rm byte of exactly 0xXX.
292 MRM_C1 = 33, MRM_C2 = 34, MRM_C3 = 35, MRM_C4 = 36,
293 MRM_C8 = 37, MRM_C9 = 38, MRM_CA = 39, MRM_CB = 40,
294 MRM_E8 = 41, MRM_F0 = 42, MRM_F8 = 45, MRM_F9 = 46,
295 MRM_D0 = 47, MRM_D1 = 48, MRM_D4 = 49, MRM_D5 = 50,
296 MRM_D6 = 51, MRM_D8 = 52, MRM_D9 = 53, MRM_DA = 54,
297 MRM_DB = 55, MRM_DC = 56, MRM_DD = 57, MRM_DE = 58,
298 MRM_DF = 59,
292 MRM_C0 = 32, MRM_C1 = 33, MRM_C2 = 34, MRM_C3 = 35,
293 MRM_C4 = 36, MRM_C8 = 37, MRM_C9 = 38, MRM_CA = 39,
294 MRM_CB = 40, MRM_E8 = 41, MRM_F0 = 42, MRM_F8 = 45,
295 MRM_F9 = 46, MRM_D0 = 47, MRM_D1 = 48, MRM_D4 = 49,
296 MRM_D5 = 50, MRM_D6 = 51, MRM_D8 = 52, MRM_D9 = 53,
297 MRM_DA = 54, MRM_DB = 55, MRM_DC = 56, MRM_DD = 57,
298 MRM_DE = 58, MRM_DF = 59, MRM_E0 = 60,
299299
300300 /// RawFrmImm8 - This is used for the ENTER instruction, which has two
301301 /// immediates, the first of which is a 16-bit immediate (specified by
376376 DA = 9 << OpMapShift, DB = 10 << OpMapShift,
377377 DC = 11 << OpMapShift, DD = 12 << OpMapShift,
378378 DE = 13 << OpMapShift, DF = 14 << OpMapShift,
379
380 // A6, A7 - Prefix after the 0x0F prefix.
381 A6 = 15 << OpMapShift, A7 = 16 << OpMapShift,
382379
383380 //===------------------------------------------------------------------===//
384381 // REX_W - REX prefixes are instruction prefixes used in 64-bit mode.
694691 ++FirstMemOp;// Skip the register dest (which is encoded in VEX_VVVV).
695692 return FirstMemOp;
696693 }
697 case X86II::MRM_C1: case X86II::MRM_C2: case X86II::MRM_C3:
698 case X86II::MRM_C4: case X86II::MRM_C8: case X86II::MRM_C9:
699 case X86II::MRM_CA: case X86II::MRM_CB: case X86II::MRM_E8:
700 case X86II::MRM_F0: case X86II::MRM_F8: case X86II::MRM_F9:
701 case X86II::MRM_D0: case X86II::MRM_D1: case X86II::MRM_D4:
702 case X86II::MRM_D5: case X86II::MRM_D6: case X86II::MRM_D8:
703 case X86II::MRM_D9: case X86II::MRM_DA: case X86II::MRM_DB:
704 case X86II::MRM_DC: case X86II::MRM_DD: case X86II::MRM_DE:
705 case X86II::MRM_DF:
694 case X86II::MRM_C0: case X86II::MRM_C1: case X86II::MRM_C2:
695 case X86II::MRM_C3: case X86II::MRM_C4: case X86II::MRM_C8:
696 case X86II::MRM_C9: case X86II::MRM_CA: case X86II::MRM_CB:
697 case X86II::MRM_E8: case X86II::MRM_F0: case X86II::MRM_F8:
698 case X86II::MRM_F9: case X86II::MRM_D0: case X86II::MRM_D1:
699 case X86II::MRM_D4: case X86II::MRM_D5: case X86II::MRM_D6:
700 case X86II::MRM_D8: case X86II::MRM_D9: case X86II::MRM_DA:
701 case X86II::MRM_DB: case X86II::MRM_DC: case X86II::MRM_DD:
702 case X86II::MRM_DE: case X86II::MRM_DF: case X86II::MRM_E0:
706703 return -1;
707704 }
708705 }
11491149 case X86II::TB: // Two-byte opcode map
11501150 case X86II::T8: // 0F 38
11511151 case X86II::TA: // 0F 3A
1152 case X86II::A6: // 0F A6
1153 case X86II::A7: // 0F A7
11541152 EmitByte(0x0F, CurByte, OS);
11551153 break;
11561154 case X86II::D8: case X86II::D9: case X86II::DA: case X86II::DB:
11661164 break;
11671165 case X86II::TA: // 0F 3A
11681166 EmitByte(0x3A, CurByte, OS);
1169 break;
1170 case X86II::A6: // 0F A6
1171 EmitByte(0xA6, CurByte, OS);
1172 break;
1173 case X86II::A7: // 0F A7
1174 EmitByte(0xA7, CurByte, OS);
11751167 break;
11761168 }
11771169 }
14551447 CurOp += X86::AddrNumOperands;
14561448 break;
14571449 }
1458 case X86II::MRM_C1: case X86II::MRM_C2: case X86II::MRM_C3:
1459 case X86II::MRM_C4: case X86II::MRM_C8: case X86II::MRM_C9:
1460 case X86II::MRM_CA: case X86II::MRM_CB: case X86II::MRM_D0:
1461 case X86II::MRM_D1: case X86II::MRM_D4: case X86II::MRM_D5:
1462 case X86II::MRM_D6: case X86II::MRM_D8: case X86II::MRM_D9:
1463 case X86II::MRM_DA: case X86II::MRM_DB: case X86II::MRM_DC:
1464 case X86II::MRM_DD: case X86II::MRM_DE: case X86II::MRM_DF:
1465 case X86II::MRM_E8: case X86II::MRM_F0: case X86II::MRM_F8:
1466 case X86II::MRM_F9:
1450 case X86II::MRM_C0: case X86II::MRM_C1: case X86II::MRM_C2:
1451 case X86II::MRM_C3: case X86II::MRM_C4: case X86II::MRM_C8:
1452 case X86II::MRM_C9: case X86II::MRM_CA: case X86II::MRM_CB:
1453 case X86II::MRM_D0: case X86II::MRM_D1: case X86II::MRM_D4:
1454 case X86II::MRM_D5: case X86II::MRM_D6: case X86II::MRM_D8:
1455 case X86II::MRM_D9: case X86II::MRM_DA: case X86II::MRM_DB:
1456 case X86II::MRM_DC: case X86II::MRM_DD: case X86II::MRM_DE:
1457 case X86II::MRM_DF: case X86II::MRM_E0: case X86II::MRM_E8:
1458 case X86II::MRM_F0: case X86II::MRM_F8: case X86II::MRM_F9:
14671459 EmitByte(BaseOpcode, CurByte, OS);
14681460
14691461 unsigned char MRM;
14701462 switch (TSFlags & X86II::FormMask) {
14711463 default: llvm_unreachable("Invalid Form");
1464 case X86II::MRM_C0: MRM = 0xC0; break;
14721465 case X86II::MRM_C1: MRM = 0xC1; break;
14731466 case X86II::MRM_C2: MRM = 0xC2; break;
14741467 case X86II::MRM_C3: MRM = 0xC3; break;
14901483 case X86II::MRM_DD: MRM = 0xDD; break;
14911484 case X86II::MRM_DE: MRM = 0xDE; break;
14921485 case X86II::MRM_DF: MRM = 0xDF; break;
1486 case X86II::MRM_E0: MRM = 0xE0; break;
14931487 case X86II::MRM_E8: MRM = 0xE8; break;
14941488 case X86II::MRM_F0: MRM = 0xF0; break;
14951489 case X86II::MRM_F8: MRM = 0xF8; break;
681681 case X86II::TB: // Two-byte opcode map
682682 case X86II::T8: // 0F 38
683683 case X86II::TA: // 0F 3A
684 case X86II::A6: // 0F A6
685 case X86II::A7: // 0F A7
686684 MCE.emitByte(0x0F);
687685 break;
688686 case X86II::D8: case X86II::D9: case X86II::DA: case X86II::DB:
699697 break;
700698 case X86II::TA: // 0F 3A
701699 MCE.emitByte(0x3A);
702 break;
703 case X86II::A6: // 0F A6
704 MCE.emitByte(0xA6);
705 break;
706 case X86II::A7: // 0F A7
707 MCE.emitByte(0xA7);
708700 break;
709701 }
710702 }
13781370 break;
13791371 }
13801372
1381 case X86II::MRM_C1: case X86II::MRM_C2: case X86II::MRM_C3:
1382 case X86II::MRM_C4: case X86II::MRM_C8: case X86II::MRM_C9:
1383 case X86II::MRM_CA: case X86II::MRM_CB: case X86II::MRM_D0:
1384 case X86II::MRM_D1: case X86II::MRM_D4: case X86II::MRM_D5:
1385 case X86II::MRM_D6: case X86II::MRM_D8: case X86II::MRM_D9:
1386 case X86II::MRM_DA: case X86II::MRM_DB: case X86II::MRM_DC:
1387 case X86II::MRM_DD: case X86II::MRM_DE: case X86II::MRM_DF:
1388 case X86II::MRM_E8: case X86II::MRM_F0: case X86II::MRM_F8:
1373 case X86II::MRM_C0: case X86II::MRM_C1: case X86II::MRM_C2:
1374 case X86II::MRM_C3: case X86II::MRM_C4: case X86II::MRM_C8:
1375 case X86II::MRM_C9: case X86II::MRM_CA: case X86II::MRM_CB:
1376 case X86II::MRM_D0: case X86II::MRM_D1: case X86II::MRM_D4:
1377 case X86II::MRM_D5: case X86II::MRM_D6: case X86II::MRM_D8:
1378 case X86II::MRM_D9: case X86II::MRM_DA: case X86II::MRM_DB:
1379 case X86II::MRM_DC: case X86II::MRM_DD: case X86II::MRM_DE:
1380 case X86II::MRM_DF: case X86II::MRM_E0: case X86II::MRM_E8:
1381 case X86II::MRM_F0: case X86II::MRM_F8:
13891382 MCE.emitByte(BaseOpcode);
13901383
13911384 unsigned char MRM;
13921385 switch (TSFlags & X86II::FormMask) {
13931386 default: llvm_unreachable("Invalid Form");
1387 case X86II::MRM_C0: MRM = 0xC0; break;
13941388 case X86II::MRM_C1: MRM = 0xC1; break;
13951389 case X86II::MRM_C2: MRM = 0xC2; break;
13961390 case X86II::MRM_C3: MRM = 0xC3; break;
14121406 case X86II::MRM_DD: MRM = 0xDD; break;
14131407 case X86II::MRM_DE: MRM = 0xDE; break;
14141408 case X86II::MRM_DF: MRM = 0xDF; break;
1409 case X86II::MRM_E0: MRM = 0xE0; break;
14151410 case X86II::MRM_E8: MRM = 0xE8; break;
14161411 case X86II::MRM_F0: MRM = 0xF0; break;
14171412 case X86II::MRM_F8: MRM = 0xF8; break;
3030 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
3131 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
3232 def MRM6m : Format<30>; def MRM7m : Format<31>;
33 def MRM_C0 : Format<32>;
3334 def MRM_C1 : Format<33>;
3435 def MRM_C2 : Format<34>;
3536 def MRM_C3 : Format<35>;
5758 def MRM_DD : Format<57>;
5859 def MRM_DE : Format<58>;
5960 def MRM_DF : Format<59>;
61 def MRM_E0 : Format<60>;
6062
6163 // ImmType - This specifies the immediate type used by an instruction. This is
6264 // part of the ad-hoc solution used to emit machine instruction encodings by our
141143 def DD : Map<12>;
142144 def DE : Map<13>;
143145 def DF : Map<14>;
144 def A6 : Map<15>;
145 def A7 : Map<16>;
146146
147147 // Class specifying the encoding
148148 class Encoding val> {
180180 class DF { Map OpMap = DF; }
181181 class T8 { Map OpMap = T8; }
182182 class TA { Map OpMap = TA; }
183 class A6 { Map OpMap = A6; }
184 class A7 { Map OpMap = A7; }
185183 class XOP8 { Map OpMap = XOP8; Prefix OpPrefix = PS; }
186184 class XOP9 { Map OpMap = XOP9; Prefix OpPrefix = PS; }
187185 class XOPA { Map OpMap = XOPA; Prefix OpPrefix = PS; }
506506 //===----------------------------------------------------------------------===//
507507 // VIA PadLock crypto instructions
508508 let Defs = [RAX, RDI], Uses = [RDX, RDI] in
509 def XSTORE : I<0xc0, RawFrm, (outs), (ins), "xstore", []>, A7;
509 def XSTORE : I<0xa7, MRM_C0, (outs), (ins), "xstore", []>, TB;
510510
511511 def : InstAlias<"xstorerng", (XSTORE)>;
512512
513513 let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
514 def XCRYPTECB : I<0xc8, RawFrm, (outs), (ins), "xcryptecb", []>, A7;
515 def XCRYPTCBC : I<0xd0, RawFrm, (outs), (ins), "xcryptcbc", []>, A7;
516 def XCRYPTCTR : I<0xd8, RawFrm, (outs), (ins), "xcryptctr", []>, A7;
517 def XCRYPTCFB : I<0xe0, RawFrm, (outs), (ins), "xcryptcfb", []>, A7;
518 def XCRYPTOFB : I<0xe8, RawFrm, (outs), (ins), "xcryptofb", []>, A7;
514 def XCRYPTECB : I<0xa7, MRM_C8, (outs), (ins), "xcryptecb", []>, TB;
515 def XCRYPTCBC : I<0xa7, MRM_D0, (outs), (ins), "xcryptcbc", []>, TB;
516 def XCRYPTCTR : I<0xa7, MRM_D8, (outs), (ins), "xcryptctr", []>, TB;
517 def XCRYPTCFB : I<0xa7, MRM_E0, (outs), (ins), "xcryptcfb", []>, TB;
518 def XCRYPTOFB : I<0xa7, MRM_E8, (outs), (ins), "xcryptofb", []>, TB;
519519 }
520520
521521 let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in {
522 def XSHA1 : I<0xc8, RawFrm, (outs), (ins), "xsha1", []>, A6;
523 def XSHA256 : I<0xd0, RawFrm, (outs), (ins), "xsha256", []>, A6;
522 def XSHA1 : I<0xa6, MRM_C8, (outs), (ins), "xsha1", []>, TB;
523 def XSHA256 : I<0xa6, MRM_D0, (outs), (ins), "xsha256", []>, TB;
524524 }
525525 let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
526 def MONTMUL : I<0xc0, RawFrm, (outs), (ins), "montmul", []>, A6;
526 def MONTMUL : I<0xa6, MRM_C0, (outs), (ins), "montmul", []>, TB;
527527
528528 //===----------------------------------------------------------------------===//
529529 // FS/GS Base Instructions
0 # RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
1
2 # CHECK: xstore
3 0x0f 0xa7 0xc0
4
5 # CHECK: xcryptecb
6 0x0f 0xa7 0xc8
7
8 # CHECK: xcryptcbc
9 0x0f 0xa7 0xd0
10
11 # CHECK: xcryptctr
12 0x0f 0xa7 0xd8
13
14 # CHECK: xcryptcfb
15 0x0f 0xa7 0xe0
16
17 # CHECK: xcryptofb
18 0x0f 0xa7 0xe8
19
20 # CHECK: xsha1
21 0x0f 0xa6 0xc8
22
23 # CHECK: xsha256
24 0x0f 0xa6 0xd0
25
26 # CHECK: montmul
27 0x0f 0xa6 0xc0
28 # RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
29
30 # CHECK: xstore
31 0x0f 0xa7 0xc0
32
33 # CHECK: xcryptecb
34 0x0f 0xa7 0xc8
35
36 # CHECK: xcryptcbc
37 0x0f 0xa7 0xd0
38
39 # CHECK: xcryptctr
40 0x0f 0xa7 0xd8
41
42 # CHECK: xcryptcfb
43 0x0f 0xa7 0xe0
44
45 # CHECK: xcryptofb
46 0x0f 0xa7 0xe8
47
48 # CHECK: xsha1
49 0x0f 0xa6 0xc8
50
51 # CHECK: xsha256
52 0x0f 0xa6 0xd0
53
54 # CHECK: montmul
55 0x0f 0xa6 0xc0
736736 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR);
737737 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR);
738738 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR);
739 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], THREEBYTEA6_STR);
740 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], THREEBYTEA7_STR);
741 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOP8_MAP_STR);
742 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], XOP9_MAP_STR);
743 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[8], XOPA_MAP_STR);
739 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR);
740 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR);
741 emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR);
744742 }
745743
746744 void DisassemblerTables::emit(raw_ostream &o) const {
3737 /// [1] two-byte opcodes of the form 0f __
3838 /// [2] three-byte opcodes of the form 0f 38 __
3939 /// [3] three-byte opcodes of the form 0f 3a __
40 /// [4] three-byte opcodes of the form 0f a6 __
41 /// [5] three-byte opcodes of the form 0f a7 __
42 /// [6] XOP8 map opcode
43 /// [7] XOP9 map opcode
44 /// [8] XOPA map opcode
45 ContextDecision* Tables[9];
40 /// [4] XOP8 map opcode
41 /// [5] XOP9 map opcode
42 /// [6] XOPA map opcode
43 ContextDecision* Tables[7];
4644
4745 // Table of ModRM encodings.
4846 typedef std::map, unsigned> ModRMMapTy;
131129 /// }
132130 ///
133131 /// NAME is the name of the ContextDecision (typically one of the four names
134 /// ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM,
135 /// THREEBYTEA6_SYM, and THREEBYTEA7_SYM from
132 /// ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM from
136133 /// X86DisassemblerDecoderCommon.h).
137134 /// IC is one of the contexts in InstructionContext. There is an opcode
138135 /// decision for each possible context.
2222 using namespace llvm;
2323
2424 #define MRM_MAPPING \
25 MAP(C0, 32) \
2526 MAP(C1, 33) \
2627 MAP(C2, 34) \
2728 MAP(C3, 35) \
4647 MAP(DC, 56) \
4748 MAP(DD, 57) \
4849 MAP(DE, 58) \
49 MAP(DF, 59)
50 MAP(DF, 59) \
51 MAP(E0, 60)
5052
5153 // A clone of X86 since we can't depend on something that is generated.
5254 namespace X86Local {
7880 enum {
7981 OB = 0, TB = 1, T8 = 2, TA = 3, XOP8 = 4, XOP9 = 5, XOPA = 6,
8082 D8 = 7, D9 = 8, DA = 9, DB = 10,
81 DC = 11, DD = 12, DE = 13, DF = 14,
82 A6 = 15, A7 = 16
83 DC = 11, DD = 12, DE = 13, DF = 14
8384 };
8485
8586 enum {
730731 HANDLE_OPERAND(relocation)
731732 }
732733 break;
734 case X86Local::MRM_C0:
733735 case X86Local::MRM_C1:
734736 case X86Local::MRM_C2:
735737 case X86Local::MRM_C3:
754756 case X86Local::MRM_DD:
755757 case X86Local::MRM_DE:
756758 case X86Local::MRM_DF:
759 case X86Local::MRM_E0:
757760 // Ignored.
758761 break;
759762 }
781784 case X86Local::TB:
782785 case X86Local::T8:
783786 case X86Local::TA:
784 case X86Local::A6:
785 case X86Local::A7:
786787 case X86Local::XOP8:
787788 case X86Local::XOP9:
788789 case X86Local::XOPA:
792793 case X86Local::TB: opcodeType = TWOBYTE; break;
793794 case X86Local::T8: opcodeType = THREEBYTE_38; break;
794795 case X86Local::TA: opcodeType = THREEBYTE_3A; break;
795 case X86Local::A6: opcodeType = THREEBYTE_A6; break;
796 case X86Local::A7: opcodeType = THREEBYTE_A7; break;
797796 case X86Local::XOP8: opcodeType = XOP8_MAP; break;
798797 case X86Local::XOP9: opcodeType = XOP9_MAP; break;
799798 case X86Local::XOPA: opcodeType = XOPA_MAP; break;