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Convert a few tests to FileCheck for PR5307. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89584 91177308-0d34-0410-b5e6-96231b3b80d8 Edward O'Callaghan 10 years ago
11 changed file(s) with 67 addition(s) and 27 deletion(s). Raw diff Collapse all Expand all
55 ret i32 %tmp1
66 }
77
8 ; CHECK: bic r0, r0, r1
9
810 define i32 @f2(i32 %a, i32 %b) {
911 %tmp = xor i32 %b, 4294967295
1012 %tmp1 = and i32 %tmp, %a
1113 ret i32 %tmp1
1214 }
15
16 ; CHECK: bic r0, r0, r1
None ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | grep -E {vmov\\W*r\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | not grep fmrrd
0 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | FileCheck %s
21
32 @i = weak global i32 0 ; [#uses=2]
43 @u = weak global i32 0 ; [#uses=2]
4443 store i16 %tmp, i16* null
4544 ret void
4645 }
46
47 ; CHECK: vmov d0, r0, r1
48 ; CHECK-NOT: fmrrd
49
None ; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vsub.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
1 ; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vsub.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
2 ; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vsub.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
1 ; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
2 ; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
33
44 define float @test(float %a, float %b) {
55 entry:
77 ret float %0
88 }
99
10 ; VFP2: vsub.f32 s0, s1, s0
11 ; NFP1: vsub.f32 d0, d1, d0
12 ; NFP0: vsub.f32 s0, s1, s0
None ; RUN: llc < %s -march=arm -mattr=+v6t2 | grep {mls\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
0 ; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
11
22 define i32 @f1(i32 %a, i32 %b, i32 %c) {
33 %tmp1 = mul i32 %a, %b
1111 %tmp2 = sub i32 %tmp1, %c
1212 ret i32 %tmp2
1313 }
14
15 ; CHECK: mls r0, r0, r1, r2
None ; RUN: llc < %s -march=pic16 | grep {movf \\+@i + 0, \\+W}
0 ; RUN: llc < %s -march=pic16 | FileCheck %s
11
22 target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-f32:32:32"
33 target triple = "pic16-"
2626 store i8 %conv8, i8* %tmp9
2727 ret void
2828 }
29
30 ; CHECK: movf @i + 0, W
None ; RUN: llc < %s -march=ppc32 | \
1 ; RUN: grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | count 4
2 ; RUN: llc < %s -march=ppc32 | not grep rlwinm
3 ; RUN: llc < %s -march=ppc32 | not grep rlwimi
4 ; RUN: llc < %s -march=ppc64 | \
5 ; RUN: grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | count 4
6 ; RUN: llc < %s -march=ppc64 | not grep rlwinm
7 ; RUN: llc < %s -march=ppc64 | not grep rlwimi
0 ; RUN: llc < %s -march=ppc32 | FileCheck %s -check-prefix=X32
1 ; RUN: llc < %s -march=ppc64 | FileCheck %s -check-prefix=X64
2
83
94 define void @STWBRX(i32 %i, i8* %ptr, i32 %off) {
105 %tmp1 = getelementptr i8* %ptr, i32 %off ; [#uses=1]
4237
4338 declare i16 @llvm.bswap.i16(i16)
4439
40
41 ; X32: stwbrx 3, 4, 5
42 ; X32: lwbrx 3, 3, 4
43 ; X32: sthbrx 3, 4, 5
44 ; X32: lhbrx 3, 3, 4
45 ; X32-NOT: rlwinm
46 ; X32-NOT: rlwimi
47
48 ; X32: stwbrx 3, 4, 5
49 ; X32: lwbrx 3, 3, 4
50 ; X32: sthbrx 3, 4, 5
51 ; X32: lhbrx 3, 3, 4
52 ; X64-NOT: rlwinm
53 ; X64-NOT: rlwimi
54
None ; RUN: llc < %s -march=x86 | grep -A 2 {call.*f} | grep movl
0 ; RUN: llc < %s -march=x86 | FileCheck %s
11 ; Check the register copy comes after the call to f and before the call to g
22 ; PR3784
33
2525 %y = phi i32 [ %a, %entry ], [ %aa, %cont ] ; [#uses=1]
2626 ret i32 %y
2727 }
28
29 ; CHECK: call{{.*}}f
30 ; CHECK-NEXT: Llabel1:
31 ; CHECK-NEXT: movl %eax, %esi
None ; RUN: llc < %s -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel
0 ; RUN: llc < %s -march=x86 -asm-verbose | FileCheck %s
11 ; Check that register copies in the landing pad come after the EH_LABEL
22
33 declare i32 @f()
1818 %v = phi i32 [ %x, %entry ], [ %a, %cont ] ; [#uses=1]
1919 ret i32 %v
2020 }
21
22 ; CHECK: lpad
23 ; CHECK-NEXT: Llabel
None ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | \
1 ; RUN: grep {fadd\\|fsub\\|fdiv\\|fmul} | not grep -i ST
2
0 ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | FileCheck %s
31 ; Test that the load of the constant is folded into the operation.
42
53
75 %tmp.1 = fadd double %P, 1.230000e+02 ; [#uses=1]
86 ret double %tmp.1
97 }
8 ; CHECK: fadd {{[^sS][^tT]}}
9 ; CHECK: fadd {{[^sS][^tT]}}
1010
1111 define double @foo_mul(double %P) {
1212 %tmp.1 = fmul double %P, 1.230000e+02 ; [#uses=1]
1313 ret double %tmp.1
1414 }
15 ; CHECK: fmul {{[^sS][^tT]}}
1516
1617 define double @foo_sub(double %P) {
1718 %tmp.1 = fsub double %P, 1.230000e+02 ; [#uses=1]
3233 %tmp.1 = fdiv double 1.230000e+02, %P ; [#uses=1]
3334 ret double %tmp.1
3435 }
36
37
38 ; CHECK: fsub {{[^sS][^tT]}}
39 ; CHECK: fdiv {{[^sS][^tT]}}
40 ; CHECK: fdiv {{[^sS][^tT]}}
41
None ; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | grep -A 1 call | grep -A 1 tailcaller | grep subl | grep 12
0 ; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | FileCheck %s
11 ; Linux has 8 byte alignment so the params cause stack size 20 when tailcallopt
22 ; is enabled, ensure that a normal fastcc call has matching stack size
33
1818 ret i32 0
1919 }
2020
21
22
23
21 ; CHECK: call tailcaller
22 ; CHECK-NEXT: subl $12
0 ; An integer truncation to i1 should be done with an and instruction to make
11 ; sure only the LSBit survives. Test that this is the case both for a returned
22 ; value and as the operand of a branch.
3 ; RUN: llc < %s -march=x86 | grep {\\(and\\)\\|\\(test.*\\\$1\\)} | \
4 ; RUN: count 5
3 ; RUN: llc < %s -march=x86 | FileCheck %s
54
65 define i1 @test1(i32 %X) zeroext {
76 %Y = trunc i32 %X to i1
87 ret i1 %Y
98 }
9 ; CHECK: andl $1, %eax
1010
1111 define i1 @test2(i32 %val, i32 %mask) {
1212 entry:
1919 ret_false:
2020 ret i1 false
2121 }
22 ; CHECK: testb $1, %al
2223
2324 define i32 @test3(i8* %ptr) {
2425 %val = load i8* %ptr
2930 cond_false:
3031 ret i32 42
3132 }
33 ; CHECK: testb $1, %al
3234
3335 define i32 @test4(i8* %ptr) {
3436 %tmp = ptrtoint i8* %ptr to i1
3840 cond_false:
3941 ret i32 42
4042 }
43 ; CHECK: testb $1, %al
4144
4245 define i32 @test6(double %d) {
4346 %tmp = fptosi double %d to i1
4750 cond_false:
4851 ret i32 42
4952 }
50
53 ; CHECK: testb $1, %al