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When getting the number of bits necessary for addressing mode ARMII::AddrModeT1_s, we need to take into account that if the frame register is ARM::SP, then the number of bits is 8. If it's not ARM::SP, then the number of bits is 5. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141529 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 8 years ago
2 changed file(s) with 12 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
11081108 case ARMII::AddrMode3:
11091109 NumBits = 8;
11101110 break;
1111 case ARMII::AddrModeT1_s:
1112 NumBits = 5;
1111 case ARMII::AddrModeT1_s: {
1112 const MachineBasicBlock &MBB = *MI->getParent();
1113 const MachineFunction &MF = *MBB.getParent();
1114 unsigned FrameReg = ARM::SP;
1115 if (MF.getFrameInfo()->hasVarSizedObjects())
1116 // There are alloca()'s in this function, must reference off the frame
1117 // pointer or base pointer instead.
1118 FrameReg = (!hasBasePointer(MF) ?BasePtr : getFrameRegister(MF));
1119
1120 NumBits = (FrameReg == ARM::SP) ? 8 : 5;
11131121 Scale = 4;
11141122 isSigned = false;
11151123 break;
1124 }
11161125 default:
11171126 llvm_unreachable("Unsupported addressing mode!");
11181127 break;
0 ; RUN: llc < %s -march=thumb
1 ; RUN: llc < %s -mtriple=thumb-linux | grep pop | count 2
1 ; RUN: llc < %s -mtriple=thumb-linux | grep pop | count 1
22 ; RUN: llc < %s -mtriple=thumb-darwin | grep pop | count 2
33
44 @str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]