llvm.org GIT mirror llvm / 8100d24
The VPSHUFB 256-bit instruction may be generated when one of input vector is undefined or zeroinitializer. I've added the "zeroinitializer" case in this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163506 91177308-0d34-0410-b5e6-96231b3b80d8 Elena Demikhovsky 8 years ago
2 changed file(s) with 39 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
60296029 SDValue V1 = SVOp->getOperand(0);
60306030 SDValue V2 = SVOp->getOperand(1);
60316031 DebugLoc dl = SVOp->getDebugLoc();
6032 ArrayRef MaskVals = SVOp->getMask();
6032 SmallVector MaskVals(SVOp->getMask().begin(), SVOp->getMask().end());
60336033
60346034 bool V2IsUndef = V2.getOpcode() == ISD::UNDEF;
6035
6036 if (VT != MVT::v32i8 || !TLI.getSubtarget()->hasAVX2() || !V2IsUndef)
6035 bool V1IsAllZero = ISD::isBuildVectorAllZeros(V1.getNode());
6036 bool V2IsAllZero = ISD::isBuildVectorAllZeros(V2.getNode());
6037
6038 // VPSHUFB may be generated if
6039 // (1) one of input vector is undefined or zeroinitializer.
6040 // The mask value 0x80 puts 0 in the corresponding slot of the vector.
6041 // And (2) the mask indexes don't cross the 128-bit lane.
6042 if (VT != MVT::v32i8 || !TLI.getSubtarget()->hasAVX2() ||
6043 (!V2IsUndef && !V2IsAllZero && !V1IsAllZero))
60376044 return SDValue();
60386045
6039 SmallVector pshufbMask;
6046 if (V1IsAllZero && !V2IsAllZero) {
6047 CommuteVectorShuffleMask(MaskVals, 32);
6048 V1 = V2;
6049 }
6050 SmallVector pshufbMask;
60406051 for (unsigned i = 0; i != 32; i++) {
60416052 int EltIdx = MaskVals[i];
60426053 if (EltIdx < 0 || EltIdx >= 32)
3535 i32 18, i32 19, i32 30, i32 16, i32 25, i32 23, i32 17, i32 25,
3636 i32 20, i32 19, i32 31, i32 17, i32 23, i32 undef, i32 29, i32 18>
3737 ret <32 x i8>%S
38 }
38 }
39
40 ; CHECK: vpshufb1_test
41 ; CHECK; vpshufb {{.*\(%r.*}}, %ymm
42 ; CHECK: ret
43 define <32 x i8> @vpshufb1_test(<32 x i8> %a) nounwind {
44 %S = shufflevector <32 x i8> %a, <32 x i8> zeroinitializer, <32 x i32>
45 i32 1, i32 9, i32 36, i32 11, i32 5, i32 13, i32 7, i32 15,
46 i32 18, i32 49, i32 30, i32 16, i32 25, i32 23, i32 17, i32 25,
47 i32 20, i32 19, i32 31, i32 17, i32 23, i32 undef, i32 29, i32 18>
48 ret <32 x i8>%S
49 }
50
51
52 ; CHECK: vpshufb2_test
53 ; CHECK; vpshufb {{.*\(%r.*}}, %ymm
54 ; CHECK: ret
55 define <32 x i8> @vpshufb2_test(<32 x i8> %a) nounwind {
56 %S = shufflevector <32 x i8> zeroinitializer, <32 x i8> %a, <32 x i32>
57 i32 1, i32 9, i32 36, i32 11, i32 5, i32 13, i32 7, i32 15,
58 i32 18, i32 49, i32 30, i32 16, i32 25, i32 23, i32 17, i32 25,
59 i32 20, i32 19, i32 31, i32 17, i32 23, i32 undef, i32 29, i32 18>
60 ret <32 x i8>%S
61 }