llvm.org GIT mirror llvm / 80d8db7
Convert SelectionDAG::getNode methods to use ArrayRef<SDValue>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207327 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 6 years ago
32 changed file(s) with 459 addition(s) and 614 deletion(s). Raw diff Collapse all Expand all
495495 SDValue Glue) {
496496 SDVTList VTs = getVTList(MVT::Other, MVT::Glue);
497497 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue };
498 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
498 return getNode(ISD::CopyToReg, dl, VTs,
499 ArrayRef(Ops, Glue.getNode() ? 4 : 3));
499500 }
500501
501502 // Similar to last getCopyToReg() except parameter Reg is a SDValue
503504 SDValue Glue) {
504505 SDVTList VTs = getVTList(MVT::Other, MVT::Glue);
505506 SDValue Ops[] = { Chain, Reg, N, Glue };
506 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3);
507 return getNode(ISD::CopyToReg, dl, VTs,
508 ArrayRef(Ops, Glue.getNode() ? 4 : 3));
507509 }
508510
509511 SDValue getCopyFromReg(SDValue Chain, SDLoc dl, unsigned Reg, EVT VT) {
510512 SDVTList VTs = getVTList(VT, MVT::Other);
511513 SDValue Ops[] = { Chain, getRegister(Reg, VT) };
512 return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2);
514 return getNode(ISD::CopyFromReg, dl, VTs, Ops);
513515 }
514516
515517 // This version of the getCopyFromReg method takes an extra operand, which
519521 SDValue Glue) {
520522 SDVTList VTs = getVTList(VT, MVT::Other, MVT::Glue);
521523 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue };
522 return getNode(ISD::CopyFromReg, dl, VTs, Ops, Glue.getNode() ? 3 : 2);
524 return getNode(ISD::CopyFromReg, dl, VTs,
525 ArrayRef(Ops, Glue.getNode() ? 3 : 2));
523526 }
524527
525528 SDValue getCondCode(ISD::CondCode Cond);
562565 SDValue getCALLSEQ_START(SDValue Chain, SDValue Op, SDLoc DL) {
563566 SDVTList VTs = getVTList(MVT::Other, MVT::Glue);
564567 SDValue Ops[] = { Chain, Op };
565 return getNode(ISD::CALLSEQ_START, DL, VTs, Ops, 2);
568 return getNode(ISD::CALLSEQ_START, DL, VTs, Ops);
566569 }
567570
568571 /// getCALLSEQ_END - Return a new CALLSEQ_END node, which always must have a
575578 Ops.push_back(Chain);
576579 Ops.push_back(Op1);
577580 Ops.push_back(Op2);
578 Ops.push_back(InGlue);
579 return getNode(ISD::CALLSEQ_END, DL, NodeTys, &Ops[0],
580 (unsigned)Ops.size() - (InGlue.getNode()==nullptr ? 1 : 0));
581 if (InGlue.getNode())
582 Ops.push_back(InGlue);
583 return getNode(ISD::CALLSEQ_END, DL, NodeTys, Ops);
581584 }
582585
583586 /// getUNDEF - Return an UNDEF node. UNDEF does not have a useful SDLoc.
606609 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT,
607610 const SDUse *Ops, unsigned NumOps);
608611 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT,
609 const SDValue *Ops, unsigned NumOps);
612 ArrayRef Ops);
610613 SDValue getNode(unsigned Opcode, SDLoc DL,
611614 ArrayRef ResultTys,
612 const SDValue *Ops, unsigned NumOps);
615 ArrayRef Ops);
613616 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
614 const SDValue *Ops, unsigned NumOps);
617 ArrayRef Ops);
615618 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs);
616619 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs, SDValue N);
617620 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
14011401 Result = DAG.getEntryNode();
14021402 } else {
14031403 // New and improved token factor.
1404 Result = DAG.getNode(ISD::TokenFactor, SDLoc(N),
1405 MVT::Other, &Ops[0], Ops.size());
1404 Result = DAG.getNode(ISD::TokenFactor, SDLoc(N), MVT::Other, Ops);
14061405 }
14071406
14081407 // Don't add users to work list.
47614760 SVT));
47624761 }
47634762
4764 return DAG.getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], NumElts).getNode();
4763 return DAG.getNode(ISD::BUILD_VECTOR, DL, VT, Elts).getNode();
47654764 }
47664765
47674766 // ExtendUsesToFormExtLoad - Trying to extend uses of a load to enable this:
48454844 }
48464845
48474846 Ops.push_back(SetCC->getOperand(2));
4848 CombineTo(SetCC, DAG.getNode(ISD::SETCC, DL, SetCC->getValueType(0),
4849 &Ops[0], Ops.size()));
4847 CombineTo(SetCC, DAG.getNode(ISD::SETCC, DL, SetCC->getValueType(0), Ops));
48504848 }
48514849 }
48524850
53185316 N0.getOperand(1),
53195317 cast(N0.getOperand(2))->get()),
53205318 DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), VT,
5321 &OneOps[0], OneOps.size()));
5319 OneOps));
53225320
53235321 // If the desired elements are smaller or larger than the source
53245322 // elements we can use a matching integer vector type and then
53355333 cast(N0.getOperand(2))->get());
53365334 return DAG.getNode(ISD::AND, SDLoc(N), VT,
53375335 DAG.getSExtOrTrunc(VsetCC, SDLoc(N), VT),
5338 DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), VT,
5339 &OneOps[0], OneOps.size()));
5336 DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), VT, OneOps));
53405337 }
53415338
53425339 // zext(setcc x,y,cc) -> select_cc x, y, 1, 0, cc
58645861 Op.getValueType()));
58655862 }
58665863
5867 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), VT, &Elts[0], NumElts);
5864 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), VT, Elts);
58685865 }
58695866
58705867 return SDValue();
59655962 for (unsigned i = 0, e = BuildVecNumElts; i != e; i += TruncEltOffset)
59665963 Opnds.push_back(BuildVect.getOperand(i));
59675964
5968 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), VT, &Opnds[0],
5969 Opnds.size());
5965 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), VT, Opnds);
59705966 }
59715967 }
59725968
60416037 AddToWorkList(NV.getNode());
60426038 Opnds.push_back(NV);
60436039 }
6044 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT,
6045 &Opnds[0], Opnds.size());
6040 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT, Opnds);
60466041 }
60476042 }
60486043
62806275 DstEltVT, Op));
62816276 AddToWorkList(Ops.back().getNode());
62826277 }
6283 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(BV), VT,
6284 &Ops[0], Ops.size());
6278 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(BV), VT, Ops);
62856279 }
62866280
62876281 // Otherwise, we're growing or shrinking the elements. To avoid having to
63376331 }
63386332
63396333 EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT, Ops.size());
6340 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(BV), VT,
6341 &Ops[0], Ops.size());
6334 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(BV), VT, Ops);
63426335 }
63436336
63446337 // Finally, this must be the case where we are shrinking elements: each input
63746367 std::reverse(Ops.end()-NumOutputsPerInput, Ops.end());
63756368 }
63766369
6377 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(BV), VT,
6378 &Ops[0], Ops.size());
6370 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(BV), VT, Ops);
63796371 }
63806372
63816373 SDValue DAGCombiner::visitFADD(SDNode *N) {
69736965 { N0.getOperand(0), N0.getOperand(1),
69746966 DAG.getConstantFP(-1.0, VT) , DAG.getConstantFP(0.0, VT),
69756967 N0.getOperand(2) };
6976 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), VT, Ops, 5);
6968 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), VT, Ops);
69776969 }
69786970
69796971 // fold (sint_to_fp (zext (setcc x, y, cc))) ->
69866978 { N0.getOperand(0).getOperand(0), N0.getOperand(0).getOperand(1),
69876979 DAG.getConstantFP(1.0, VT) , DAG.getConstantFP(0.0, VT),
69886980 N0.getOperand(0).getOperand(2) };
6989 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), VT, Ops, 5);
6981 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), VT, Ops);
69906982 }
69916983 }
69926984
70307022 { N0.getOperand(0), N0.getOperand(1),
70317023 DAG.getConstantFP(1.0, VT), DAG.getConstantFP(0.0, VT),
70327024 N0.getOperand(2) };
7033 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), VT, Ops, 5);
7025 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), VT, Ops);
70347026 }
70357027 }
70367028
85228514 }
85238515
85248516 SDValue Chain = DAG.getNode(ISD::TokenFactor, SDLoc(LD), MVT::Other,
8525 &ArgChains[0], ArgChains.size());
8517 ArgChains);
85268518 DAG.ReplaceAllUsesOfValueWith(SDValue(N, 1), Chain);
85278519 return true;
85288520 }
96769668 }
96779669
96789670 // Return the new vector
9679 return DAG.getNode(ISD::BUILD_VECTOR, dl,
9680 VT, &Ops[0], Ops.size());
9671 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
96819672 }
96829673
96839674 SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
1000910000 if (!isTypeLegal(VecVT)) return SDValue();
1001010001
1001110002 // Make the new BUILD_VECTOR.
10012 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, &Ops[0], Ops.size());
10003 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, Ops);
1001310004
1001410005 // The new BUILD_VECTOR node has the potential to be further optimized.
1001510006 AddToWorkList(BV.getNode());
1007710068 else
1007810069 Opnds.push_back(In.getOperand(0));
1007910070 }
10080 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT,
10081 &Opnds[0], Opnds.size());
10071 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, Opnds);
1008210072 AddToWorkList(BV.getNode());
1008310073
1008410074 return DAG.getNode(Opcode, dl, VT, BV);
1026810258 for (unsigned i = 0; i != BuildVecNumElts; ++i)
1026910259 Opnds.push_back(N1.getOperand(i));
1027010260
10271 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), VT, &Opnds[0],
10272 Opnds.size());
10261 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), VT, Opnds);
1027310262 }
1027410263
1027510264 // Type legalization of vectors and DAG canonicalization of SHUFFLE_VECTOR
1042610415 }
1042710416 }
1042810417
10429 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT, Ops.data(),
10430 Ops.size());
10418 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT, Ops);
1043110419 }
1043210420
1043310421 SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
1064210630 EVT EltVT = RVT.getVectorElementType();
1064310631 SmallVector ZeroOps(RVT.getVectorNumElements(),
1064410632 DAG.getConstant(0, EltVT));
10645 SDValue Zero = DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N),
10646 RVT, &ZeroOps[0], ZeroOps.size());
10633 SDValue Zero = DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), RVT, ZeroOps);
1064710634 LHS = DAG.getNode(ISD::BITCAST, dl, RVT, LHS);
1064810635 SDValue Shuf = DAG.getVectorShuffle(RVT, dl, LHS, Zero, &Indices[0]);
1064910636 return DAG.getNode(ISD::BITCAST, dl, VT, Shuf);
1071210699 }
1071310700
1071410701 if (Ops.size() == LHS.getNumOperands())
10715 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N),
10716 LHS.getValueType(), &Ops[0], Ops.size());
10702 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), LHS.getValueType(), Ops);
1071710703 }
1071810704
1071910705 return SDValue();
1074810734 if (Ops.size() != N0.getNumOperands())
1074910735 return SDValue();
1075010736
10751 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N),
10752 N0.getValueType(), &Ops[0], Ops.size());
10737 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N0.getValueType(), Ops);
1075310738 }
1075410739
1075510740 SDValue DAGCombiner::SimplifySelect(SDLoc DL, SDValue N0,
1154311528 return Aliases[0];
1154411529
1154511530 // Construct a custom tailored token factor.
11546 return DAG.getNode(ISD::TokenFactor, SDLoc(N), MVT::Other,
11547 &Aliases[0], Aliases.size());
11531 return DAG.getNode(ISD::TokenFactor, SDLoc(N), MVT::Other, Aliases);
1154811532 }
1154911533
1155011534 // SelectionDAG::Combine - This is the entry point for the file.
386386 MinAlign(ST->getAlignment(), Offset),
387387 ST->getTBAAInfo()));
388388 // The order of the stores doesn't matter - say it with a TokenFactor.
389 SDValue Result =
390 DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Stores[0],
391 Stores.size());
389 SDValue Result = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores);
392390 DAGLegalize->ReplaceNode(SDValue(ST, 0), Result);
393391 return;
394392 }
505503 false, false, 0));
506504
507505 // The order of the stores doesn't matter - say it with a TokenFactor.
508 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Stores[0],
509 Stores.size());
506 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores);
510507
511508 // Finally, perform the original load only redirected to the stack slot.
512509 Load = DAG.getExtLoad(LD->getExtensionType(), dl, VT, TF, StackBase,
15271524
15281525 SDValue StoreChain;
15291526 if (!Stores.empty()) // Not all undef elements?
1530 StoreChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
1531 &Stores[0], Stores.size());
1527 StoreChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores);
15321528 else
15331529 StoreChain = DAG.getEntryNode();
15341530
33033299 TLI.getVectorIdxTy())));
33043300 }
33053301
3306 Tmp1 = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], Ops.size());
3302 Tmp1 = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
33073303 // We may have changed the BUILD_VECTOR type. Cast it back to the Node type.
33083304 Tmp1 = DAG.getNode(ISD::BITCAST, dl, Node->getValueType(0), Tmp1);
33093305 Results.push_back(Tmp1);
40104006 VT.getScalarType(), Ex, Sh));
40114007 }
40124008 SDValue Result =
4013 DAG.getNode(ISD::BUILD_VECTOR, dl, Node->getValueType(0),
4014 &Scalars[0], Scalars.size());
4009 DAG.getNode(ISD::BUILD_VECTOR, dl, Node->getValueType(0), Scalars);
40154010 ReplaceNode(SDValue(Node, 0), Result);
40164011 break;
40174012 }
433433 EVT ValueVTs[] = { N->getValueType(0), NVT };
434434 SDValue Ops[] = { N->getOperand(0), N->getOperand(1) };
435435 SDValue Res = DAG.getNode(N->getOpcode(), SDLoc(N),
436 DAG.getVTList(ValueVTs), Ops, 2);
436 DAG.getVTList(ValueVTs), Ops);
437437
438438 // Modified the sum result - switch anything that used the old sum to use
439439 // the new one.
12981298 // Emit this X << 1 as X+X.
12991299 SDVTList VTList = DAG.getVTList(NVT, MVT::Glue);
13001300 SDValue LoOps[2] = { InL, InL };
1301 Lo = DAG.getNode(ISD::ADDC, DL, VTList, LoOps, 2);
1301 Lo = DAG.getNode(ISD::ADDC, DL, VTList, LoOps);
13021302 SDValue HiOps[3] = { InH, InH, Lo.getValue(1) };
1303 Hi = DAG.getNode(ISD::ADDE, DL, VTList, HiOps, 3);
1303 Hi = DAG.getNode(ISD::ADDE, DL, VTList, HiOps);
13041304 } else {
13051305 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, ShTy));
13061306 Hi = DAG.getNode(ISD::OR, DL, NVT,
15491549 if (hasCarry) {
15501550 SDVTList VTList = DAG.getVTList(NVT, MVT::Glue);
15511551 if (N->getOpcode() == ISD::ADD) {
1552 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps, 2);
1552 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps);
15531553 HiOps[2] = Lo.getValue(1);
1554 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps, 3);
1554 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps);
15551555 } else {
1556 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps, 2);
1556 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps);
15571557 HiOps[2] = Lo.getValue(1);
1558 Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps, 3);
1558 Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps);
15591559 }
15601560 return;
15611561 }
15621562
15631563 if (N->getOpcode() == ISD::ADD) {
1564 Lo = DAG.getNode(ISD::ADD, dl, NVT, LoOps, 2);
1565 Hi = DAG.getNode(ISD::ADD, dl, NVT, HiOps, 2);
1564 Lo = DAG.getNode(ISD::ADD, dl, NVT, LoOps);
1565 Hi = DAG.getNode(ISD::ADD, dl, NVT, ArrayRef(HiOps, 2));
15661566 SDValue Cmp1 = DAG.getSetCC(dl, getSetCCResultType(NVT), Lo, LoOps[0],
15671567 ISD::SETULT);
15681568 SDValue Carry1 = DAG.getSelect(dl, NVT, Cmp1,
15741574 DAG.getConstant(1, NVT), Carry1);
15751575 Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, Carry2);
15761576 } else {
1577 Lo = DAG.getNode(ISD::SUB, dl, NVT, LoOps, 2);
1578 Hi = DAG.getNode(ISD::SUB, dl, NVT, HiOps, 2);
1577 Lo = DAG.getNode(ISD::SUB, dl, NVT, LoOps);
1578 Hi = DAG.getNode(ISD::SUB, dl, NVT, ArrayRef(HiOps, 2));
15791579 SDValue Cmp =
15801580 DAG.getSetCC(dl, getSetCCResultType(LoOps[0].getValueType()),
15811581 LoOps[0], LoOps[1], ISD::SETULT);
15981598 SDValue HiOps[3] = { LHSH, RHSH };
15991599
16001600 if (N->getOpcode() == ISD::ADDC) {
1601 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps, 2);
1601 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps);
16021602 HiOps[2] = Lo.getValue(1);
1603 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps, 3);
1603 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps);
16041604 } else {
1605 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps, 2);
1605 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps);
16061606 HiOps[2] = Lo.getValue(1);
1607 Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps, 3);
1607 Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps);
16081608 }
16091609
16101610 // Legalized the flag result - switch anything that used the old flag to
16231623 SDValue LoOps[3] = { LHSL, RHSL, N->getOperand(2) };
16241624 SDValue HiOps[3] = { LHSH, RHSH };
16251625
1626 Lo = DAG.getNode(N->getOpcode(), dl, VTList, LoOps, 3);
1626 Lo = DAG.getNode(N->getOpcode(), dl, VTList, LoOps);
16271627 HiOps[2] = Lo.getValue(1);
1628 Hi = DAG.getNode(N->getOpcode(), dl, VTList, HiOps, 3);
1628 Hi = DAG.getNode(N->getOpcode(), dl, VTList, HiOps);
16291629
16301630 // Legalized the flag result - switch anything that used the old flag to
16311631 // use the new one.
20652065 ShiftOp = DAG.getZExtOrTrunc(ShiftOp, dl, ShiftTy);
20662066
20672067 SDValue Ops[] = { LHSL, LHSH, ShiftOp };
2068 Lo = DAG.getNode(PartsOpc, dl, DAG.getVTList(VT, VT), Ops, 3);
2068 Lo = DAG.getNode(PartsOpc, dl, DAG.getVTList(VT, VT), Ops);
20692069 Hi = Lo.getValue(1);
20702070 return;
20712071 }
28582858 Ops.push_back(Op);
28592859 }
28602860
2861 return DAG.getNode(ISD::BUILD_VECTOR, dl, NOutVT, &Ops[0], Ops.size());
2861 return DAG.getNode(ISD::BUILD_VECTOR, dl, NOutVT, Ops);
28622862 }
28632863
28642864
29052905 Ops.push_back(Op);
29062906 }
29072907
2908 return DAG.getNode(ISD::BUILD_VECTOR, dl, NOutVT, &Ops[0], Ops.size());
2908 return DAG.getNode(ISD::BUILD_VECTOR, dl, NOutVT, Ops);
29092909 }
29102910
29112911 SDValue DAGTypeLegalizer::PromoteIntRes_SCALAR_TO_VECTOR(SDNode *N) {
29532953 }
29542954 }
29552955
2956 return DAG.getNode(ISD::BUILD_VECTOR, dl, NOutVT, &Ops[0], Ops.size());
2956 return DAG.getNode(ISD::BUILD_VECTOR, dl, NOutVT, Ops);
29572957 }
29582958
29592959 SDValue DAGTypeLegalizer::PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N) {
30093009 }
30103010 }
30113011
3012 return DAG.getNode(ISD::BUILD_VECTOR, dl, N->getValueType(0),
3013 &NewOps[0], NewOps.size());
3014 }
3012 return DAG.getNode(ISD::BUILD_VECTOR, dl, N->getValueType(0), NewOps);
3013 }
353353 SmallVector Ops;
354354 IntegerToVector(N->getOperand(0), NumElts, Ops, NVT.getVectorElementType());
355355
356 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], NumElts);
356 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT,
357 ArrayRef(&Ops[0], NumElts));
357358 return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), Vec);
358359 }
359360
389390 SDValue NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
390391 EVT::getVectorVT(*DAG.getContext(),
391392 NewVT, NewElts.size()),
392 &NewElts[0], NewElts.size());
393 NewElts);
393394
394395 // Convert the new vector to the old vector type.
395396 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
448449 SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType());
449450 for (unsigned i = 1; i < NumElts; ++i)
450451 Ops[i] = UndefVal;
451 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
452 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
452453 }
453454
454455 SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) {
342342 Operands[j] = Op.getOperand(j);
343343 }
344344
345 Op = DAG.getNode(Op.getOpcode(), dl, NVT, &Operands[0], Operands.size());
345 Op = DAG.getNode(Op.getOpcode(), dl, NVT, Operands);
346346
347347 return DAG.getNode(ISD::BITCAST, dl, VT, Op);
348348 }
376376 Operands[j] = Op.getOperand(j);
377377 }
378378
379 return DAG.getNode(Op.getOpcode(), dl, Op.getValueType(), &Operands[0],
380 Operands.size());
379 return DAG.getNode(Op.getOpcode(), dl, Op.getValueType(), Operands);
381380 }
382381
383382 // For FP_TO_INT we promote the result type to a vector type with wider
545544 }
546545 }
547546
548 SDValue NewChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
549 &LoadChains[0], LoadChains.size());
547 SDValue NewChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
550548 SDValue Value = DAG.getNode(ISD::BUILD_VECTOR, dl,
551 Op.getNode()->getValueType(0), &Vals[0], Vals.size());
549 Op.getNode()->getValueType(0), Vals);
552550
553551 AddLegalizedOperand(Op.getValue(0), Value);
554552 AddLegalizedOperand(Op.getValue(1), NewChain);
602600
603601 Stores.push_back(Store);
604602 }
605 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
606 &Stores[0], Stores.size());
603 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores);
607604 AddLegalizedOperand(Op, TF);
608605 return TF;
609606 }
647644
648645 // Broadcast the mask so that the entire vector is all-one or all zero.
649646 SmallVector Ops(NumElem, Mask);
650 Mask = DAG.getNode(ISD::BUILD_VECTOR, DL, MaskTy, &Ops[0], Ops.size());
647 Mask = DAG.getNode(ISD::BUILD_VECTOR, DL, MaskTy, Ops);
651648
652649 // Bitcast the operands to be the same type as the mask.
653650 // This is needed when we select between FP types because
802799 (EltVT.getSizeInBits()), EltVT),
803800 DAG.getConstant(0, EltVT));
804801 }
805 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElems);
802 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
806803 }
807804
808805 }
436436 assert(N->getValueType(0).getVectorNumElements() == 1 &&
437437 "Unexected vector type!");
438438 SDValue Elt = GetScalarizedVector(N->getOperand(0));
439 SmallVector Ops(1);
440 Ops[0] = DAG.getNode(N->getOpcode(), SDLoc(N),
441 N->getValueType(0).getScalarType(), Elt);
439 SDValue Op = DAG.getNode(N->getOpcode(), SDLoc(N),
440 N->getValueType(0).getScalarType(), Elt);
442441 // Revectorize the result so the types line up with what the uses of this
443442 // expression expect.
444 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
445 &Ops[0], 1);
443 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0), Op);
446444 }
447445
448446 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
451449 SmallVector Ops(N->getNumOperands());
452450 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
453451 Ops[i] = GetScalarizedVector(N->getOperand(i));
454 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
455 &Ops[0], Ops.size());
452 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0), Ops);
456453 }
457454
458455 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
724721 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
725722 unsigned LoNumElts = LoVT.getVectorNumElements();
726723 SmallVector LoOps(N->op_begin(), N->op_begin()+LoNumElts);
727 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
724 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, LoOps);
728725
729726 SmallVector HiOps(N->op_begin()+LoNumElts, N->op_end());
730 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
727 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, HiOps);
731728 }
732729
733730 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
745742 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
746743
747744 SmallVector LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
748 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
745 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, LoOps);
749746
750747 SmallVector HiOps(N->op_begin()+NumSubvectors, N->op_end());
751 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
748 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, HiOps);
752749 }
753750
754751 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
10921089 }
10931090
10941091 // Construct the Lo/Hi output using a BUILD_VECTOR.
1095 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
1092 Output = DAG.getNode(ISD::BUILD_VECTOR, dl, NewVT, SVOps);
10961093 } else if (InputUsed[0] == -1U) {
10971094 // No input vectors were used! The result is undefined.
10981095 Output = DAG.getUNDEF(NewVT);
13701367 }
13711368 }
13721369
1373 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0),
1374 &Elts[0], Elts.size());
1370 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0), Elts);
13751371 }
13761372
13771373 SDValue DAGTypeLegalizer::SplitVecOp_TRUNCATE(SDNode *N) {
17281724 while (SubConcatEnd < OpsToConcat)
17291725 SubConcatOps[SubConcatEnd++] = undefVec;
17301726 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1731 NextVT, &SubConcatOps[0],
1732 OpsToConcat);
1727 NextVT, SubConcatOps);
17331728 ConcatEnd = SubConcatIdx + 1;
17341729 }
17351730 }
17481743 for (unsigned j = ConcatEnd; j < NumOps; ++j)
17491744 ConcatOps[j] = UndefVal;
17501745 }
1751 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1746 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
1747 ArrayRef(&ConcatOps[0], NumOps));
17521748 }
17531749
17541750 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
17901786 SDValue UndefVal = DAG.getUNDEF(InVT);
17911787 for (unsigned i = 1; i != NumConcat; ++i)
17921788 Ops[i] = UndefVal;
1793 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT,
1794 &Ops[0], NumConcat);
1789 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT, Ops);
17951790 if (N->getNumOperands() == 1)
17961791 return DAG.getNode(Opcode, DL, WidenVT, InVec);
17971792 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
18261821 for (; i < WidenNumElts; ++i)
18271822 Ops[i] = UndefVal;
18281823
1829 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts);
1824 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, Ops);
18301825 }
18311826
18321827 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
19501945
19511946 SDValue NewVec;
19521947 if (InVT.isVector())
1953 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1954 NewInVT, &Ops[0], NewNumElts);
1948 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewInVT, Ops);
19551949 else
1956 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1957 NewInVT, &Ops[0], NewNumElts);
1950 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl, NewInVT, Ops);
19581951 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
19591952 }
19601953 }
19791972 assert(WidenNumElts >= NumElts && "Shrinking vector instead of widening!");
19801973 NewOps.append(WidenNumElts - NumElts, DAG.getUNDEF(EltVT));
19811974
1982 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1975 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, NewOps);
19831976 }
19841977
19851978 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
20021995 Ops[i] = N->getOperand(i);
20031996 for (unsigned i = NumOperands; i != NumConcat; ++i)
20041997 Ops[i] = UndefVal;
2005 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1998 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, Ops);
20061999 }
20072000 } else {
20082001 InputWidened = true;
20482041 SDValue UndefVal = DAG.getUNDEF(EltVT);
20492042 for (; Idx < WidenNumElts; ++Idx)
20502043 Ops[Idx] = UndefVal;
2051 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2044 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
20522045 }
20532046
20542047 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
20932086 for (unsigned i = 1; i != NumConcat; ++i)
20942087 Ops[i] = UndefVal;
20952088
2096 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
2089 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, Ops);
20972090 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
20982091 SatOp, CvtCode);
20992092 }
21262119 for (; i < WidenNumElts; ++i)
21272120 Ops[i] = UndefVal;
21282121
2129 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2122 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
21302123 }
21312124
21322125 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
21652158 SDValue UndefVal = DAG.getUNDEF(EltVT);
21662159 for (; i < WidenNumElts; ++i)
21672160 Ops[i] = UndefVal;
2168 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2161 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
21692162 }
21702163
21712164 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
21932186 if (LdChain.size() == 1)
21942187 NewChain = LdChain[0];
21952188 else
2196 NewChain = DAG.getNode(ISD::TokenFactor, SDLoc(LD), MVT::Other,
2197 &LdChain[0], LdChain.size());
2189 NewChain = DAG.getNode(ISD::TokenFactor, SDLoc(LD), MVT::Other, LdChain);
21982190
21992191 // Modified the chain - switch anything that used the old chain to use
22002192 // the new one.
24002392 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
24012393 DAG.getConstant(i, TLI.getVectorIdxTy())));
24022394
2403 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2395 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
24042396 }
24052397
24062398 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
24492441 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
24502442 DAG.getConstant(j, TLI.getVectorIdxTy()));
24512443 }
2452 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2444 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
24532445 }
24542446
24552447 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
24782470 if (StChain.size() == 1)
24792471 return StChain[0];
24802472 else
2481 return DAG.getNode(ISD::TokenFactor, SDLoc(ST),
2482 MVT::Other,&StChain[0],StChain.size());
2473 return DAG.getNode(ISD::TokenFactor, SDLoc(ST), MVT::Other, StChain);
24832474 }
24842475
24852476 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
26542645 ConcatOps[0] = LdOp;
26552646 for (unsigned i = 1; i != NumConcat; ++i)
26562647 ConcatOps[i] = UndefVal;
2657 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2658 NumConcat);
2648 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, ConcatOps);
26592649 }
26602650
26612651 // Load vector by using multiple loads from largest vector to scalar
26892679 Loads.push_back(DAG.getUNDEF(L->getValueType(0)));
26902680 size += L->getValueSizeInBits(0);
26912681 }
2692 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0),
2693 &Loads[0], Loads.size());
2682 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0), Loads);
26942683 }
26952684 } else {
26962685 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
27342723 if (NewLdTy != LdTy) {
27352724 // Create a larger vector
27362725 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2737 &ConcatOps[Idx], End - Idx);
2726 ArrayRef(&ConcatOps[Idx],
2727 End - Idx));
27382728 Idx = End - 1;
27392729 LdTy = NewLdTy;
27402730 }
27432733
27442734 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
27452735 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2746 &ConcatOps[Idx], End - Idx);
2736 ArrayRef(&ConcatOps[Idx], End - Idx));
27472737
27482738 // We need to fill the rest with undefs to build the vector
27492739 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
27562746 for (; i != NumOps; ++i)
27572747 WidenOps[i] = UndefVal;
27582748 }
2759 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2749 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, WidenOps);
27602750 }
27612751
27622752 SDValue
28072797 for (; i != WidenNumElts; ++i)
28082798 Ops[i] = UndefVal;
28092799
2810 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2800 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
28112801 }
28122802
28132803
29532943 for (unsigned i = 1; i != NumConcat; ++i)
29542944 Ops[i] = UndefVal;
29552945
2956 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2946 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, Ops);
29572947 }
29582948
29592949 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
29722962 SDValue UndefVal = DAG.getUNDEF(EltVT);
29732963 for ( ; Idx < WidenNumElts; ++Idx)
29742964 Ops[Idx] = UndefVal;
2975 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);
2976 }
2965 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, Ops);
2966 }
10621062
10631063 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
10641064 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1065 &Ops[0], Ops.size()));
1065 Ops));
10661066 return Result;
10671067 }
10681068
10891089 if (VT.isVector()) {
10901090 SmallVector Ops;
10911091 Ops.assign(VT.getVectorNumElements(), Result);
1092 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size());
1092 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
10931093 }
10941094 return Result;
10951095 }
11321132 SmallVector Ops;
11331133 Ops.assign(VT.getVectorNumElements(), Result);
11341134 // FIXME SDLoc info might be appropriate here
1135 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size());
1135 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
11361136 }
11371137 return Result;
11381138 }
29252925 return Outputs.back();
29262926
29272927 // Otherwise build a big vector out of the scalar elements we generated.
2928 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs.data(),
2929 Outputs.size());
2928 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
29302929 }
29312930
29322931 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
29562955 SmallVector Elts(N1.getNode()->op_begin(),
29572956 N1.getNode()->op_end());
29582957 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2959 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2958 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
29602959 }
29612960 break;
29622961 case ISD::AND:
34253424 N1.getNode()->op_end());
34263425 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
34273426 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3428 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3427 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
34293428 }
34303429 break;
34313430 case ISD::SETCC: {
35063505 SDValue N1, SDValue N2, SDValue N3,
35073506 SDValue N4) {
35083507 SDValue Ops[] = { N1, N2, N3, N4 };
3509 return getNode(Opcode, DL, VT, Ops, 4);
3508 return getNode(Opcode, DL, VT, Ops);
35103509 }
35113510
35123511 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
35133512 SDValue N1, SDValue N2, SDValue N3,
35143513 SDValue N4, SDValue N5) {
35153514 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3516 return getNode(Opcode, DL, VT, Ops, 5);
3515 return getNode(Opcode, DL, VT, Ops);
35173516 }
35183517
35193518 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
35353534 ArgChains.push_back(SDValue(L, 1));
35363535
35373536 // Build a tokenfactor for all the chains.
3538 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other,
3539 &ArgChains[0], ArgChains.size());
3537 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
35403538 }
35413539
35423540 /// getMemsetValue - Vectorized representation of the memset value
38573855 Size -= VTSize;
38583856 }
38593857
3860 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3861 &OutChains[0], OutChains.size());
3858 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
38623859 }
38633860
38643861 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
39233920 LoadChains.push_back(Value.getValue(1));
39243921 SrcOff += VTSize;
39253922 }
3926 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3927 &LoadChains[0], LoadChains.size());
3923 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
39283924 OutChains.clear();
39293925 for (unsigned i = 0; i < NumMemOps; i++) {
39303926 EVT VT = MemOps[i];
39383934 DstOff += VTSize;
39393935 }
39403936
3941 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3942 &OutChains[0], OutChains.size());
3937 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
39433938 }
39443939
39453940 /// \brief Lower the call to 'memset' intrinsic function into a series of store
40404035 Size -= VTSize;
40414036 }
40424037
4043 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
4044 &OutChains[0], OutChains.size());
4038 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
40454039 }
40464040
40474041 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
44094403 for (unsigned i = 0; i < NumOps; ++i)
44104404 VTs.push_back(Ops[i].getValueType());
44114405 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs),
4412 Ops, NumOps);
4406 ArrayRef(Ops, NumOps));
44134407 }
44144408
44154409 SDValue
47974791 SDValue SV,
47984792 unsigned Align) {
47994793 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4800 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4794 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
48014795 }
48024796
48034797 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
48134807 // Copy from an SDUse array into an SDValue array for use with
48144808 // the regular getNode logic.
48154809 SmallVector NewOps(Ops, Ops + NumOps);
4816 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4810 return getNode(Opcode, DL, VT, NewOps);
48174811 }
48184812
48194813 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
4820 const SDValue *Ops, unsigned NumOps) {
4814 ArrayRef Ops) {
4815 unsigned NumOps = Ops.size();
48214816 switch (NumOps) {
48224817 case 0: return getNode(Opcode, DL, VT);
48234818 case 1: return getNode(Opcode, DL, VT, Ops[0]);
48524847
48534848 if (VT != MVT::Glue) {
48544849 FoldingSetNodeID ID;
4855 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4850 AddNodeIDNode(ID, Opcode, VTs, Ops.data(), NumOps);
48564851 void *IP = nullptr;
48574852
48584853 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
48594854 return SDValue(E, 0);
48604855
48614856 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4862 VTs, Ops, NumOps);
4857 VTs, Ops.data(), NumOps);
48634858 CSEMap.InsertNode(N, IP);
48644859 } else {
48654860 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4866 VTs, Ops, NumOps);
4861 VTs, Ops.data(), NumOps);
48674862 }
48684863
48694864 AllNodes.push_back(N);
48744869 }
48754870
48764871 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
4877 ArrayRef ResultTys,
4878 const SDValue *Ops, unsigned NumOps) {
4879 return getNode(Opcode, DL, getVTList(ResultTys),
4880 Ops, NumOps);
4872 ArrayRef ResultTys, ArrayRef Ops) {
4873 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
48814874 }
48824875
48834876 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
4884 const SDValue *Ops, unsigned NumOps) {
4877 ArrayRef Ops) {
48854878 if (VTList.NumVTs == 1)
4886 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4879 return getNode(Opcode, DL, VTList.VTs[0], Ops);
48874880
48884881 #if 0
48894882 switch (Opcode) {
49104903
49114904 // Memoize the node unless it returns a flag.
49124905 SDNode *N;
4906 unsigned NumOps = Ops.size();
49134907 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
49144908 FoldingSetNodeID ID;
4915 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4909 AddNodeIDNode(ID, Opcode, VTList, Ops.data(), NumOps);
49164910 void *IP = nullptr;
49174911 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
49184912 return SDValue(E, 0);
49304924 Ops[1], Ops[2]);
49314925 } else {
49324926 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4933 VTList, Ops, NumOps);
4927 VTList, Ops.data(), NumOps);
49344928 }
49354929 CSEMap.InsertNode(N, IP);
49364930 } else {
49474941 Ops[1], Ops[2]);
49484942 } else {
49494943 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4950 VTList, Ops, NumOps);
4944 VTList, Ops.data(), NumOps);
49514945 }
49524946 }
49534947 AllNodes.push_back(N);
49584952 }
49594953
49604954 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
4961 return getNode(Opcode, DL, VTList, nullptr, 0);
4955 return getNode(Opcode, DL, VTList, ArrayRef());
49624956 }
49634957
49644958 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
49654959 SDValue N1) {
49664960 SDValue Ops[] = { N1 };
4967 return getNode(Opcode, DL, VTList, Ops, 1);
4961 return getNode(Opcode, DL, VTList, Ops);
49684962 }
49694963
49704964 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
49714965 SDValue N1, SDValue N2) {
49724966 SDValue Ops[] = { N1, N2 };
4973 return getNode(Opcode, DL, VTList, Ops, 2);
4967 return getNode(Opcode, DL, VTList, Ops);
49744968 }
49754969
49764970 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
49774971 SDValue N1, SDValue N2, SDValue N3) {
49784972 SDValue Ops[] = { N1, N2, N3 };
4979 return getNode(Opcode, DL, VTList, Ops, 3);
4973 return getNode(Opcode, DL, VTList, Ops);
49804974 }
49814975
49824976 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
49834977 SDValue N1, SDValue N2, SDValue N3,
49844978 SDValue N4) {
49854979 SDValue Ops[] = { N1, N2, N3, N4 };
4986 return getNode(Opcode, DL, VTList, Ops, 4);
4980 return getNode(Opcode, DL, VTList, Ops);
49874981 }
49884982
49894983 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
49904984 SDValue N1, SDValue N2, SDValue N3,
49914985 SDValue N4, SDValue N5) {
49924986 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4993 return getNode(Opcode, DL, VTList, Ops, 5);
4987 return getNode(Opcode, DL, VTList, Ops);
49944988 }
49954989
49964990 SDVTList SelectionDAG::getVTList(EVT VT) {
63156309
63166310 switch (N->getOpcode()) {
63176311 default:
6318 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6319 &Operands[0], Operands.size()));
6312 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
63206313 break;
63216314 case ISD::VSELECT:
6322 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6323 &Operands[0], Operands.size()));
6315 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
63246316 break;
63256317 case ISD::SHL:
63266318 case ISD::SRA:
63456337 Scalars.push_back(getUNDEF(EltVT));
63466338
63476339 return getNode(ISD::BUILD_VECTOR, dl,
6348 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6349 &Scalars[0], Scalars.size());
6340 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
63506341 }
63516342
63526343
276276
277277 // Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the
278278 // intermediate operands.
279 Val = DAG.getNode(IntermediateVT.isVector() ?
280 ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR, DL,
281 ValueVT, &Ops[0], NumIntermediates);
279 Val = DAG.getNode(IntermediateVT.isVector() ? ISD::CONCAT_VECTORS
280 : ISD::BUILD_VECTOR,
281 DL, ValueVT, Ops);
282282 }
283283
284284 // There is now one part, held in Val. Correct it to match ValueVT.
495495 e = PartVT.getVectorNumElements(); i != e; ++i)
496496 Ops.push_back(DAG.getUNDEF(ElementVT));
497497
498 Val = DAG.getNode(ISD::BUILD_VECTOR, DL, PartVT, &Ops[0], Ops.size());
498 Val = DAG.getNode(ISD::BUILD_VECTOR, DL, PartVT, Ops);
499499
500500 // FIXME: Use CONCAT for 2x -> 4x.
501501
752752 Parts.clear();
753753 }
754754
755 return DAG.getNode(ISD::MERGE_VALUES, dl,
756 DAG.getVTList(ValueVTs),
757 &Values[0], ValueVTs.size());
755 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(ValueVTs), Values);
758756 }
759757
760758 /// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
808806 // = op c3, ..., f2
809807 Chain = Chains[NumRegs-1];
810808 else
811 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Chains[0], NumRegs);
809 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Chains);
812810 }
813811
814812 /// AddInlineAsmOperands - Add this value to the specified inlineasm node
910908
911909 // Otherwise, we have to make a token factor node.
912910 SDValue Root = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
913 &PendingLoads[0], PendingLoads.size());
911 PendingLoads);
914912 PendingLoads.clear();
915913 DAG.setRoot(Root);
916914 return Root;
940938 }
941939
942940 Root = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
943 &PendingExports[0],
944 PendingExports.size());
941 PendingExports);
945942 PendingExports.clear();
946943 DAG.setRoot(Root);
947944 return Root;
11121109 if (isa(CDS->getType()))
11131110 return DAG.getMergeValues(&Ops[0], Ops.size(), getCurSDLoc());
11141111 return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(),
1115 VT, &Ops[0], Ops.size());
1112 VT, Ops);
11161113 }
11171114
11181115 if (C->getType()->isStructTy() || C->getType()->isArrayTy()) {
11641161 }
11651162
11661163 // Create a BUILD_VECTOR node.
1167 return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(),
1168 VT, &Ops[0], Ops.size());
1164 return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(), VT, Ops);
11691165 }
11701166
11711167 // If this is a static alloca, generate it as the frameindex instead of
12261222 }
12271223
12281224 Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
1229 MVT::Other, &Chains[0], NumValues);
1225 MVT::Other, Chains);
12301226 } else if (I.getNumOperands() != 0) {
12311227 SmallVector ValueVTs;
12321228 ComputeValueVTs(*TLI, I.getOperand(0)->getType(), ValueVTs);
20622058
20632059 // Merge into one.
20642060 SDValue Res = DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
2065 DAG.getVTList(ValueVTs),
2066 &Ops[0], 2);
2061 DAG.getVTList(ValueVTs), Ops);
20672062 setValue(&LP, Res);
20682063 }
20692064
28952890 FalseVal.getResNo() + i));
28962891
28972892 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
2898 DAG.getVTList(ValueVTs),
2899 &Values[0], NumValues));
2893 DAG.getVTList(ValueVTs), Values));
29002894 }
29012895
29022896 void SelectionDAGBuilder::visitTrunc(const User &I) {
31053099 MOps2[0] = Src2;
31063100
31073101 Src1 = Src1U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS,
3108 getCurSDLoc(), VT,
3109 &MOps1[0], NumConcat);
3102 getCurSDLoc(), VT, MOps1);
31103103 Src2 = Src2U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS,
3111 getCurSDLoc(), VT,
3112 &MOps2[0], NumConcat);
3104 getCurSDLoc(), VT, MOps2);
31133105
31143106 // Readjust mask for new input vector length.
31153107 SmallVector MappedOps;
32273219 Ops.push_back(Res);
32283220 }
32293221
3230 setValue(&I, DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(),
3231 VT, &Ops[0], Ops.size()));
3222 setValue(&I, DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(), VT, Ops));
32323223 }
32333224
32343225 void SelectionDAGBuilder::visitInsertValue(const InsertValueInst &I) {
32703261 SDValue(Agg.getNode(), Agg.getResNo() + i);
32713262
32723263 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
3273 DAG.getVTList(AggValueVTs),
3274 &Values[0], NumAggValues));
3264 DAG.getVTList(AggValueVTs), Values));
32753265 }
32763266
32773267 void SelectionDAGBuilder::visitExtractValue(const ExtractValueInst &I) {
33053295 SDValue(Agg.getNode(), Agg.getResNo() + i);
33063296
33073297 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
3308 DAG.getVTList(ValValueVTs),
3309 &Values[0], NumValValues));
3298 DAG.getVTList(ValValueVTs), Values));
33103299 }
33113300
33123301 void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
34283417
34293418 SDValue Ops[] = { getRoot(), AllocSize, DAG.getIntPtrConstant(Align) };
34303419 SDVTList VTs = DAG.getVTList(AllocSize.getValueType(), MVT::Other);
3431 SDValue DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, getCurSDLoc(),
3432 VTs, Ops, 3);
3420 SDValue DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, getCurSDLoc(), VTs, Ops);
34333421 setValue(&I, DSA);
34343422 DAG.setRoot(DSA.getValue(1));
34353423
34923480 // (MaxParallelChains should always remain as failsafe).
34933481 if (ChainI == MaxParallelChains) {
34943482 assert(PendingLoads.empty() && "PendingLoads must be serialized first");
3495 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
3496 MVT::Other, &Chains[0], ChainI);
3483 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
3484 ArrayRef(Chains.data(), ChainI));
34973485 Root = Chain;
34983486 ChainI = 0;
34993487 }
35103498 }
35113499
35123500 if (!ConstantMemory) {
3513 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
3514 MVT::Other, &Chains[0], ChainI);
3501 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
3502 ArrayRef(Chains.data(), ChainI));
35153503 if (isVolatile)
35163504 DAG.setRoot(Chain);
35173505 else
35193507 }
35203508
35213509 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
3522 DAG.getVTList(ValueVTs),
3523 &Values[0], NumValues));
3510 DAG.getVTList(ValueVTs), Values));
35243511 }
35253512
35263513 void SelectionDAGBuilder::visitStore(const StoreInst &I) {
35563543 for (unsigned i = 0; i != NumValues; ++i, ++ChainI) {
35573544 // See visitLoad comments.
35583545 if (ChainI == MaxParallelChains) {
3559 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
3560 MVT::Other, &Chains[0], ChainI);
3546 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
3547 ArrayRef(Chains.data(), ChainI));
35613548 Root = Chain;
35623549 ChainI = 0;
35633550 }
35703557 Chains[ChainI] = St;
35713558 }
35723559
3573 SDValue StoreNode = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
3574 MVT::Other, &Chains[0], ChainI);
3560 SDValue StoreNode = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
3561 ArrayRef(Chains.data(), ChainI));
35753562 DAG.setRoot(StoreNode);
35763563 }
35773564
35963583 Ops[0] = Chain;
35973584 Ops[1] = DAG.getConstant(Order, TLI.getPointerTy());
35983585 Ops[2] = DAG.getConstant(Scope, TLI.getPointerTy());
3599 return DAG.getNode(ISD::ATOMIC_FENCE, dl, MVT::Other, Ops, 3);
3586 return DAG.getNode(ISD::ATOMIC_FENCE, dl, MVT::Other, Ops);
36003587 }
36013588
36023589 void SelectionDAGBuilder::visitAtomicCmpXchg(const AtomicCmpXchgInst &I) {
36883675 Ops[0] = getRoot();
36893676 Ops[1] = DAG.getConstant(I.getOrdering(), TLI->getPointerTy());
36903677 Ops[2] = DAG.getConstant(I.getSynchScope(), TLI->getPointerTy());
3691 DAG.setRoot(DAG.getNode(ISD::ATOMIC_FENCE, dl, MVT::Other, Ops, 3));
3678 DAG.setRoot(DAG.getNode(ISD::ATOMIC_FENCE, dl, MVT::Other, Ops));
36923679 }
36933680
36943681 void SelectionDAGBuilder::visitAtomicLoad(const LoadInst &I) {
38173804 Info.align, Info.vol,
38183805 Info.readMem, Info.writeMem);
38193806 } else if (!HasChain) {
3820 Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurSDLoc(),
3821 VTs, &Ops[0], Ops.size());
3807 Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurSDLoc(), VTs, Ops);
38223808 } else if (!I.getType()->isVoidTy()) {
3823 Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurSDLoc(),
3824 VTs, &Ops[0], Ops.size());
3809 Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurSDLoc(), VTs, Ops);
38253810 } else {
3826 Result = DAG.getNode(ISD::INTRINSIC_VOID, getCurSDLoc(),
3827 VTs, &Ops[0], Ops.size());
3811 Result = DAG.getNode(ISD::INTRINSIC_VOID, getCurSDLoc(), VTs, Ops);
38283812 }
38293813
38303814 if (HasChain) {
49084892 Ops[0] = getRoot();
49094893 Ops[1] = getValue(I.getArgOperand(0));
49104894 SDValue Op = DAG.getNode(ISD::EH_SJLJ_SETJMP, sdl,
4911 DAG.getVTList(MVT::i32, MVT::Other),
4912 Ops, 2);
4895 DAG.getVTList(MVT::i32, MVT::Other), Ops);
49134896 setValue(&I, Op.getValue(0));
49144897 DAG.setRoot(Op.getValue(1));
49154898 return nullptr;
49704953 SDValue ShOps[2];
49714954 ShOps[0] = ShAmt;
49724955 ShOps[1] = DAG.getConstant(0, MVT::i32);
4973 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, sdl, ShAmtVT, &ShOps[0], 2);
4956 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, sdl, ShAmtVT, ShOps);
49744957 EVT DestVT = TLI->getValueType(I.getType());
49754958 ShAmt = DAG.getNode(ISD::BITCAST, sdl, DestVT, ShAmt);
49764959 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, sdl, DestVT,
51445127 case Intrinsic::readcyclecounter: {
51455128 SDValue Op = getRoot();
51465129 Res = DAG.getNode(ISD::READCYCLECOUNTER, sdl,
5147 DAG.getVTList(MVT::i64, MVT::Other),
5148 &Op, 1);
5130 DAG.getVTList(MVT::i64, MVT::Other), Op);
51495131 setValue(&I, Res);
51505132 DAG.setRoot(Res.getValue(1));
51515133 return nullptr;
51805162 case Intrinsic::stacksave: {
51815163 SDValue Op = getRoot();
51825164 Res = DAG.getNode(ISD::STACKSAVE, sdl,
5183 DAG.getVTList(TLI->getPointerTy(), MVT::Other), &Op, 1);
5165 DAG.getVTList(TLI->getPointerTy(), MVT::Other), Op);
51845166 setValue(&I, Res);
51855167 DAG.setRoot(Res.getValue(1));
51865168 return nullptr;
52495231 Ops[4] = DAG.getSrcValue(I.getArgOperand(0));
52505232 Ops[5] = DAG.getSrcValue(F);
52515233
5252 Res = DAG.getNode(ISD::INIT_TRAMPOLINE, sdl, MVT::Other, Ops, 6);
5234 Res = DAG.getNode(ISD::INIT_TRAMPOLINE, sdl, MVT::Other, Ops);
52535235
52545236 DAG.setRoot(Res);
52555237 return nullptr;
53725354 Ops[1] = DAG.getFrameIndex(FI, TLI->getPointerTy(), true);
53735355 unsigned Opcode = (IsStart ? ISD::LIFETIME_START : ISD::LIFETIME_END);
53745356
5375 Res = DAG.getNode(Opcode, sdl, MVT::Other, Ops, 2);
5357 Res = DAG.getNode(Opcode, sdl, MVT::Other, Ops);
53765358 DAG.setRoot(Res);
53775359 }
53785360 return nullptr;
55495531 }
55505532
55515533 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
5552 MVT::Other, &Chains[0], NumValues);
5534 MVT::Other, Chains);
55535535 PendingLoads.push_back(Chain);
55545536
55555537 setValue(CS.getInstruction(),
55565538 DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
5557 DAG.getVTList(RetTys),
5558 &Values[0], Values.size()));
5539 DAG.getVTList(RetTys), Values));
55595540 }
55605541
55615542 if (!Result.second.getNode()) {
67166697 if (Flag.getNode()) AsmNodeOperands.push_back(Flag);
67176698
67186699 Chain = DAG.getNode(ISD::INLINEASM, getCurSDLoc(),
6719 DAG.getVTList(MVT::Other, MVT::Glue),
6720 &AsmNodeOperands[0], AsmNodeOperands.size());
6700 DAG.getVTList(MVT::Other, MVT::Glue), AsmNodeOperands);
67216701 Flag = Chain.getValue(1);
67226702
67236703 // If this asm returns a register value, copy the result from that register
67806760 }
67816761
67826762 if (!OutChains.empty())
6783 Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
6784 &OutChains[0], OutChains.size());
6763 Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other, OutChains);
67856764
67866765 DAG.setRoot(Chain);
67876766 }
72847263 return std::make_pair(SDValue(), CLI.Chain);
72857264
72867265 SDValue Res = CLI.DAG.getNode(ISD::MERGE_VALUES, CLI.DL,
7287 CLI.DAG.getVTList(RetTys),
7288 &ReturnValues[0], ReturnValues.size());
7266 CLI.DAG.getVTList(RetTys), ReturnValues);
72897267 return std::make_pair(Res, CLI.Chain);
72907268 }
72917269
18051805 SelectInlineAsmMemoryOperands(Ops);
18061806
18071807 EVT VTs[] = { MVT::Other, MVT::Glue };
1808 SDValue New = CurDAG->getNode(ISD::INLINEASM, SDLoc(N),
1809 VTs, &Ops[0], Ops.size());
1808 SDValue New = CurDAG->getNode(ISD::INLINEASM, SDLoc(N), VTs, Ops);
18101809 New->setNodeId(-1);
18111810 return New.getNode();
18121811 }
20802079 if (InputChains.size() == 1)
20812080 return InputChains[0];
20822081 return CurDAG->getNode(ISD::TokenFactor, SDLoc(ChainNodesMatched[0]),
2083 MVT::Other, &InputChains[0], InputChains.size());
2082 MVT::Other, InputChains);
20842083 }
20852084
20862085 /// MorphNode - Handle morphing a node in place for the selector.
12931293 FuncInfo->setVariadicGPRSize(GPRSaveSize);
12941294
12951295 if (!MemOps.empty()) {
1296 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &MemOps[0],
1297 MemOps.size());
1296 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps);
12981297 }
12991298 }
13001299
14871486 if (Flag.getNode())
14881487 RetOps.push_back(Flag);
14891488
1490 return DAG.getNode(AArch64ISD::Ret, dl, MVT::Other,
1491 &RetOps[0], RetOps.size());
1489 return DAG.getNode(AArch64ISD::Ret, dl, MVT::Other, RetOps);
14921490 }
14931491
14941492 unsigned AArch64TargetLowering::getByValTypeAlignment(Type *Ty) const {
16791677 // other. Combining them with this TokenFactor notes that fact for the rest of
16801678 // the backend.
16811679 if (!MemOpChains.empty())
1682 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
1683 &MemOpChains[0], MemOpChains.size());
1680 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains);
16841681
16851682 // Most of the rest of the instructions need to be glued together; we don't
16861683 // want assignments to actual registers used by a call to be rearranged by a
17501747 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
17511748
17521749 if (IsTailCall) {
1753 return DAG.getNode(AArch64ISD::TC_RETURN, dl, NodeTys, &Ops[0], Ops.size());
1754 }
1755
1756 Chain = DAG.getNode(AArch64ISD::Call, dl, NodeTys, &Ops[0], Ops.size());
1750 return DAG.getNode(AArch64ISD::TC_RETURN, dl, NodeTys, Ops);
1751 }
1752
1753 Chain = DAG.getNode(AArch64ISD::Call, dl, NodeTys, Ops);
17571754 InFlag = Chain.getValue(1);
17581755
17591756 // Now we can reclaim the stack, just as well do it before working out where
19651962 }
19661963
19671964 // Build a tokenfactor for all the chains.
1968 return DAG.getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other,
1969 &ArgChains[0], ArgChains.size());
1965 return DAG.getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
19701966 }
19711967
19721968 static A64CC::CondCodes IntCCToA64CC(ISD::CondCode CC) {
25912587 Ops.push_back(Glue);
25922588
25932589 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
2594 Chain = DAG.getNode(AArch64ISD::TLSDESCCALL, DL, NodeTys, &Ops[0],
2595 Ops.size());
2590 Chain = DAG.getNode(AArch64ISD::TLSDESCCALL, DL, NodeTys, Ops);
25962591 Glue = Chain.getValue(1);
25972592
25982593 // After the call, the offset from TPIDR_EL0 is in X0, copy it out and pass it
32853280 VROffsAddr, MachinePointerInfo(SV, 28),
32863281 false, false, 0));
32873282
3288 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &MemOps[0],
3289 MemOps.size());
3283 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps);
32903284 }
32913285
32923286 SDValue
48214815 Ops.push_back(N);
48224816 Ops.push_back(Op.getOperand(I));
48234817 Ops.push_back(DAG.getConstant(I, MVT::i64));
4824 N = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VT, &Ops[0], 3);
4818 N = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VT, Ops);
48254819 }
48264820 }
48274821 return N;
34393439 return nullptr;
34403440
34413441 SDValue New = CurDAG->getNode(ISD::INLINEASM, SDLoc(N),
3442 CurDAG->getVTList(MVT::Other, MVT::Glue), &AsmNodeOperands[0],
3443 AsmNodeOperands.size());
3442 CurDAG->getVTList(MVT::Other, MVT::Glue), AsmNodeOperands);
34443443 New->setNodeId(-1);
34453444 return New.getNode();
34463445 }
15511551 SDVTList VTs = DAG.getVTList(MVT::Other, MVT::Glue);
15521552 SDValue Ops[] = { Chain, Dst, Src, SizeNode, AlignNode};
15531553 MemOpChains.push_back(DAG.getNode(ARMISD::COPY_STRUCT_BYVAL, dl, VTs,
1554 Ops, array_lengthof(Ops)));
1554 Ops));
15551555 }
15561556 } else if (!isSibCall) {
15571557 assert(VA.isMemLoc());
15621562 }
15631563
15641564 if (!MemOpChains.empty())
1565 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
1566 &MemOpChains[0], MemOpChains.size());
1565 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains);
15671566
15681567 // Build a sequence of copy-to-reg nodes chained together with token chain
15691568 // and flag operands which copy the outgoing args into the appropriate regs.
17501749
17511750 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
17521751 if (isTailCall)
1753 return DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, &Ops[0], Ops.size());
1752 return DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, Ops);
17541753
17551754 // Returns a chain and a flag for retval copy to use.
1756 Chain = DAG.getNode(CallOpc, dl, NodeTys, &Ops[0], Ops.size());
1755 Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops);
17571756 InFlag = Chain.getValue(1);
17581757
17591758 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
20582057
20592058 RetOps.insert(RetOps.begin() + 1, DAG.getConstant(LROffset, MVT::i32, false));
20602059
2061 return DAG.getNode(ARMISD::INTRET_FLAG, DL, MVT::Other,
2062 RetOps.data(), RetOps.size());
2060 return DAG.getNode(ARMISD::INTRET_FLAG, DL, MVT::Other, RetOps);
20632061 }
20642062
20652063 SDValue
21262124 // Legalize ret f64 -> ret 2 x i32. We always have fmrrd if f64 is
21272125 // available.
21282126 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl,
2129 DAG.getVTList(MVT::i32, MVT::i32), &Arg, 1);
2127 DAG.getVTList(MVT::i32, MVT::i32), Arg);
21302128 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), fmrrd, Flag);
21312129 Flag = Chain.getValue(1);
21322130 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
21602158 return LowerInterruptReturn(RetOps, dl, DAG);
21612159 }
21622160
2163 return DAG.getNode(ARMISD::RET_FLAG, dl, MVT::Other,
2164 RetOps.data(), RetOps.size());
2161 return DAG.getNode(ARMISD::RET_FLAG, dl, MVT::Other, RetOps);
21652162 }
21662163
21672164 bool ARMTargetLowering::isUsedByReturnOnly(SDNode *N, SDValue &Chain) const {
28122809 AFI->setArgRegsSaveSize(ArgRegsSaveSize + AFI->getArgRegsSaveSize());
28132810
28142811 if (!MemOps.empty())
2815 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
2816 &MemOps[0], MemOps.size());
2812 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
28172813 return FrameIndex;
28182814 } else {
28192815 if (ArgSize == 0) {
34823478 ARMcc = DAG.getConstant(CondCode, MVT::i32);
34833479 SDVTList VTList = DAG.getVTList(MVT::Other, MVT::Glue);
34843480 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest };
3485 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops, 7);
3481 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops);
34863482 }
34873483
34883484 return SDValue();
35223518 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32);
35233519 SDVTList VTList = DAG.getVTList(MVT::Other, MVT::Glue);
35243520 SDValue Ops[] = { Chain, Dest, ARMcc, CCR, Cmp };
3525 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops, 5);
3521 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops);
35263522 if (CondCode2 != ARMCC::AL) {
35273523 ARMcc = DAG.getConstant(CondCode2, MVT::i32);
35283524 SDValue Ops[] = { Res, Dest, ARMcc, CCR, Res.getValue(1) };
3529 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops, 5);
3525 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops);
35303526 }
35313527 return Res;
35323528 }
37233719 // Bitcast operand 1 to i32.
37243720 if (SrcVT == MVT::f64)
37253721 Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32),
3726 &Tmp1, 1).getValue(1);
3722 Tmp1).getValue(1);
37273723 Tmp1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp1);
37283724
37293725 // Or in the signbit with integer operations.
37393735
37403736 // f64: Or the high part with signbit and then combine two parts.
37413737 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32),
3742 &Tmp0, 1);
3738 Tmp0);
37433739 SDValue Lo = Tmp0.getValue(0);
37443740 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2);
37453741 Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1);
38173813 // Turn f64->i64 into VMOVRRD.
38183814 if (DstVT == MVT::i64 && TLI.isTypeLegal(SrcVT)) {
38193815 SDValue Cvt = DAG.getNode(ARMISD::VMOVRRD, dl,
3820 DAG.getVTList(MVT::i32, MVT::i32), &Op, 1);
3816 DAG.getVTList(MVT::i32, MVT::i32), Op);
38213817 // Merge the pieces into a single i64 value.
38223818 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1));
38233819 }
41124108 // First, build a SRA_FLAG/SRL_FLAG op, which shifts the top part by one and
41134109 // captures the result into a carry flag.
41144110 unsigned Opc = N->getOpcode() == ISD::SRL ? ARMISD::SRL_FLAG:ARMISD::SRA_FLAG;
4115 Hi = DAG.getNode(Opc, dl, DAG.getVTList(MVT::i32, MVT::Glue), &Hi, 1);
4111 Hi = DAG.getNode(Opc, dl, DAG.getVTList(MVT::i32, MVT::Glue), Hi);
41164112
41174113 // The low part is an ARMISD::RRX operand, which shifts the carry in.
41184114 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1));
48694865 Ops.push_back(N);
48704866 Ops.push_back(Op.getOperand(I));
48714867 Ops.push_back(DAG.getConstant(I, MVT::i32));
4872 N = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, &Ops[0], 3);
4868 N = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Ops);
48734869 }
48744870 }
48754871 return N;
48804876 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, MVT::i32,
48814877 Op.getOperand(i)));
48824878 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, NumElts);
4883 SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, &Ops[0], NumElts);
4879 SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, Ops);
48844880 Val = LowerBUILD_VECTOR(Val, DAG, ST);
48854881 if (Val.getNode())
48864882 return DAG.getNode(ISD::BITCAST, dl, VT, Val);
49164912 SmallVector Ops;
49174913 for (unsigned i = 0; i < NumElts; ++i)
49184914 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i)));
4919 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, &Ops[0],NumElts);
4915 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops);
49204916 return DAG.getNode(ISD::BITCAST, dl, VT, Val);
49214917 }
49224918
52235219
52245220 if (V2.getNode()->getOpcode() == ISD::UNDEF)
52255221 return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1,
5226 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8,
5227 &VTBLMask[0], 8));
5222 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8, VTBLMask));
52285223
52295224 return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2,
5230 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8,
5231 &VTBLMask[0], 8));
5225 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8, VTBLMask));
52325226 }
52335227
52345228 static SDValue LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(SDValue Op,
53815375 DAG.getConstant(ShuffleMask[i] & (NumElts-1),
53825376 MVT::i32)));
53835377 }
5384 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, &Ops[0],NumElts);
5378 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops);
53855379 return DAG.getNode(ISD::BITCAST, dl, VT, Val);
53865380 }
53875381
56185612 Ops.push_back(DAG.getConstant(CInt.zextOrTrunc(32), MVT::i32));
56195613 }
56205614 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N),
5621 MVT::getVectorVT(TruncVT, NumElts), Ops.data(), NumElts);
5615 MVT::getVectorVT(TruncVT, NumElts), Ops);
56225616 }
56235617
56245618 static bool isAddSubSExt(SDNode *N, SelectionDAG &DAG) {
60086002 };
60096003
60106004 Cycles32 = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL,
6011 DAG.getVTList(MVT::i32, MVT::Other), &Ops[0],
6012 array_lengthof(Ops));
6005 DAG.getVTList(MVT::i32, MVT::Other), Ops);
60136006 OutChain = Cycles32.getValue(1);
60146007 } else {
60156008 // Intrinsic is defined to return 0 on unsupported platforms. Technically
75307523 llvm_unreachable("Invalid vector element type for padd optimization.");
75317524 }
75327525
7533 SDValue tmp = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, SDLoc(N),
7534 widenType, &Ops[0], Ops.size());
7526 SDValue tmp = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, SDLoc(N), widenType, Ops);
75357527 unsigned ExtOp = VT.bitsGT(tmp.getValueType()) ? ISD::ANY_EXTEND : ISD::TRUNCATE;
75367528 return DAG.getNode(ExtOp, SDLoc(N), VT, tmp);
75377529 }
76627654 Ops.push_back(*HiAdd);
76637655
76647656 SDValue MLALNode = DAG.getNode(FinalOpc, SDLoc(AddcNode),
7665 DAG.getVTList(MVT::i32, MVT::i32),
7666 &Ops[0], Ops.size());
7657 DAG.getVTList(MVT::i32, MVT::i32), Ops);
76677658
76687659 // Replace the ADDs' nodes uses by the MLA node's values.
76697660 SDValue HiMLALResult(MLALNode.getNode(), 1);
83008291 Increment);
83018292 Chains.push_back(Ch);
83028293 }
8303 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &Chains[0],
8304 Chains.size());
8294 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains);
83058295 }
83068296
83078297 if (!ISD::isNormalStore(St))
83978387 DCI.AddToWorklist(V.getNode());
83988388 }
83998389 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, NumElts);
8400 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, FloatVT, Ops.data(), NumElts);
8390 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, FloatVT, Ops);
84018391 return DAG.getNode(ISD::BITCAST, dl, VT, BV);
84028392 }
84038393
7171 TFOps[i] = Loads[i].getValue(1);
7272 SrcOff += VTSize;
7373 }
74 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
74 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
75 ArrayRef(TFOps, i));
7576
7677 for (i = 0;
7778 i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) {
8283 isVolatile, false, 0);
8384 DstOff += VTSize;
8485 }
85 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
86 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
87 ArrayRef(TFOps, i));
8688
8789 EmittedNumMemOps += i;
8890 }
112114 SrcOff += VTSize;
113115 BytesLeft -= VTSize;
114116 }
115 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
117 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
118 ArrayRef(TFOps, i));
116119
117120 i = 0;
118121 BytesLeft = BytesLeftSave;
133136 DstOff += VTSize;
134137 BytesLeft -= VTSize;
135138 }
136 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
139 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
140 ArrayRef(TFOps, i));
137141 }
138142
139143 // Adjust parameters for memset, EABI uses format (ptr, size, value),
14201420 BuildVectorOps.push_back(Sclr);
14211421 }
14221422
1423 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &BuildVectorOps[0],
1424 BuildVectorOps.size());
1423 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, BuildVectorOps);
14251424 }
14261425
14271426 SDValue ARM64TargetLowering::LowerINT_TO_FP(SDValue Op,
18201819 }
18211820
18221821 if (!MemOps.empty()) {
1823 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &MemOps[0],
1824 MemOps.size());
1822 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps);
18251823 }
18261824 }
18271825
21082106 }
21092107
21102108 if (!MemOpChains.empty())
2111 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &MemOpChains[0],
2112 MemOpChains.size());
2109 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains);
21132110
21142111 // Build a sequence of copy-to-reg nodes chained together with token chain
21152112 // and flag operands which copy the outgoing args into the appropriate regs.
21852182 // If we're doing a tall call, use a TC_RETURN here rather than an
21862183 // actual call instruction.
21872184 if (IsTailCall)
2188 return DAG.getNode(ARM64ISD::TC_RETURN, DL, NodeTys, &Ops[0], Ops.size());
2185 return DAG.getNode(ARM64ISD::TC_RETURN, DL, NodeTys, Ops);
21892186
21902187 // Returns a chain and a flag for retval copy to use.
2191 Chain = DAG.getNode(ARM64ISD::CALL, DL, NodeTys, &Ops[0], Ops.size());
2188 Chain = DAG.getNode(ARM64ISD::CALL, DL, NodeTys, Ops);
21922189 InFlag = Chain.getValue(1);
21932190
21942191 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
22562253 if (Flag.getNode())
22572254 RetOps.push_back(Flag);
22582255
2259 return DAG.getNode(ARM64ISD::RET_FLAG, DL, MVT::Other, &RetOps[0],
2260 RetOps.size());
2256 return DAG.getNode(ARM64ISD::RET_FLAG, DL, MVT::Other, RetOps);
22612257 }
22622258
22632259 //===----------------------------------------------------------------------===//
24272423 Ops.push_back(Glue);
24282424
24292425 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
2430 Chain = DAG.getNode(ARM64ISD::TLSDESC_CALL, DL, NodeTys, &Ops[0], Ops.size());
2426 Chain = DAG.getNode(ARM64ISD::TLSDESC_CALL, DL, NodeTys, Ops);
24312427 Glue = Chain.getValue(1);
24322428
24332429 return DAG.getCopyFromReg(Chain, DL, ARM64::X0, PtrVT, Glue);
27372733 for (unsigned i = 0; i < VecVT.getVectorNumElements(); ++i)
27382734 BuildVectorOps.push_back(EltMask);
27392735
2740 SDValue BuildVec = DAG.getNode(ISD::BUILD_VECTOR, DL, VecVT,
2741 &BuildVectorOps[0], BuildVectorOps.size());
2736 SDValue BuildVec = DAG.getNode(ISD::BUILD_VECTOR, DL, VecVT, BuildVectorOps);
27422737
27432738 // If we couldn't materialize the mask above, then the mask vector will be
27442739 // the zero vector, and we need to negate it here.
32753270 VROffsAddr, MachinePointerInfo(SV, 28), false,
32763271 false, 4));
32773272
3278 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &MemOps[0],
3279 MemOps.size());
3273 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps);
32803274 }
32813275
32823276 SDValue ARM64TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
43614355 Shuffle = DAG.getNode(
43624356 ISD::INTRINSIC_WO_CHAIN, DL, IndexVT,
43634357 DAG.getConstant(Intrinsic::arm64_neon_tbl1, MVT::i32), V1Cst,
4364 DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT, &TBLMask[0], IndexLen));
4358 DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT,
4359 ArrayRef(TBLMask.data(), IndexLen)));
43654360 } else {
43664361 if (IndexLen == 8) {
43674362 V1Cst = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v16i8, V1Cst, V2Cst);
43684363 Shuffle = DAG.getNode(
43694364 ISD::INTRINSIC_WO_CHAIN, DL, IndexVT,
43704365 DAG.getConstant(Intrinsic::arm64_neon_tbl1, MVT::i32), V1Cst,
4371 DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT, &TBLMask[0], IndexLen));
4366 DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT,
4367 ArrayRef(TBLMask.data(), IndexLen)));
43724368 } else {
43734369 // FIXME: We cannot, for the moment, emit a TBL2 instruction because we
43744370 // cannot currently represent the register constraints on the input
43794375 Shuffle = DAG.getNode(
43804376 ISD::INTRINSIC_WO_CHAIN, DL, IndexVT,
43814377 DAG.getConstant(Intrinsic::arm64_neon_tbl2, MVT::i32), V1Cst, V2Cst,
4382 DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT, &TBLMask[0], IndexLen));
4378 DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT,
4379 ArrayRef(TBLMask.data(), IndexLen)));
43834380 }
43844381 }
43854382 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Shuffle);
51625159 for (unsigned i = 0; i < NumElts; ++i)
51635160 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, NewType, Op.getOperand(i)));
51645161 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), NewType, NumElts);
5165 SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, &Ops[0], NumElts);
5162 SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, Ops);
51665163 Val = LowerBUILD_VECTOR(Val, DAG);
51675164 if (Val.getNode())
51685165 return DAG.getNode(ISD::BITCAST, dl, VT, Val);
347347 if (Flag.getNode())
348348 RetOps.push_back(Flag);
349349
350 return DAG.getNode(HexagonISD::RET_FLAG, dl, MVT::Other,
351 &RetOps[0], RetOps.size());
350 return DAG.getNode(HexagonISD::RET_FLAG, dl, MVT::Other, RetOps);
352351 }
353352
354353
521520 // Transform all store nodes into one single node because all store
522521 // nodes are independent of each other.
523522 if (!MemOpChains.empty()) {
524 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOpChains[0],
525 MemOpChains.size());
523 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains);
526524 }
527525
528526 if (!isTailCall)
596594 }
597595
598596 if (isTailCall)
599 return DAG.getNode(HexagonISD::TC_RETURN, dl, NodeTys, &Ops[0], Ops.size());
600
601 Chain = DAG.getNode(HexagonISD::CALL, dl, NodeTys, &Ops[0], Ops.size());
597 return DAG.getNode(HexagonISD::TC_RETURN, dl, NodeTys, Ops);
598
599 Chain = DAG.getNode(HexagonISD::CALL, dl, NodeTys, Ops);
602600 InFlag = Chain.getValue(1);
603601
604602 // Create the CALLSEQ_END node.
917915 }
918916
919917 if (!MemOps.empty())
920 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOps[0],
921 MemOps.size());
918 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
922919
923920 if (isVarArg) {
924921 // This will point to the next argument passed via stack.
567567 if (Flag.getNode())
568568 RetOps.push_back(Flag);
569569
570 return DAG.getNode(Opc, dl, MVT::Other, &RetOps[0], RetOps.size());
570 return DAG.getNode(Opc, dl, MVT::Other, RetOps);
571571 }
572572
573573 /// LowerCCCCallTo - functions arguments are copied from virtual regs to
658658 // Transform all store nodes into one single node because all store nodes are
659659 // independent of each other.
660660 if (!MemOpChains.empty())
661 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
662 &MemOpChains[0], MemOpChains.size());
661 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains);
663662
664663 // Build a sequence of copy-to-reg nodes chained together with token chain and
665664 // flag operands which copy the outgoing args into registers. The InFlag in
694693 if (InFlag.getNode())
695694 Ops.push_back(InFlag);
696695
697 Chain = DAG.getNode(MSP430ISD::CALL, dl, NodeTys, &Ops[0], Ops.size());
696 Chain = DAG.getNode(MSP430ISD::CALL, dl, NodeTys, Ops);
698697 InFlag = Chain.getValue(1);
699698
700699 // Create the CALLSEQ_END node.
985984 Ops.push_back(Zero);
986985 Ops.push_back(TargetCC);
987986 Ops.push_back(Flag);
988 return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, &Ops[0], Ops.size());
987 return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, Ops);
989988 }
990989 }
991990
10081007 Ops.push_back(TargetCC);
10091008 Ops.push_back(Flag);
10101009
1011 return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, &Ops[0], Ops.size());
1010 return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, Ops);
10121011 }
10131012
10141013 SDValue MSP430TargetLowering::LowerSIGN_EXTEND(SDValue Op,
15091509 SDValue GA = DAG.getTargetGlobalAddress(GV, DL, MVT::i32, 0,
15101510 MipsII::MO_GPREL);
15111511 SDValue GPRelNode = DAG.getNode(MipsISD::GPRel, DL,
1512 DAG.getVTList(MVT::i32), &GA, 1);
1512 DAG.getVTList(MVT::i32), GA);
15131513 SDValue GPReg = DAG.getRegister(Mips::GP, MVT::i32);
15141514 return DAG.getNode(ISD::ADD, DL, MVT::i32, GPReg, GPRelNode);
15151515 }
24372437 // Transform all store nodes into one single node because all store
24382438 // nodes are independent of each other.
24392439 if (!MemOpChains.empty())
2440 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
2441 &MemOpChains[0], MemOpChains.size());
2440 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains);
24422441
24432442 // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
24442443 // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
24922491 CLI, Callee, Chain);
24932492
24942493 if (IsTailCall)
2495 return DAG.getNode(MipsISD::TailCall, DL, MVT::Other, &Ops[0], Ops.size());
2496
2497 Chain = DAG.getNode(MipsISD::JmpLink, DL, NodeTys, &Ops[0], Ops.size());
2494 return DAG.getNode(MipsISD::TailCall, DL, MVT::Other, Ops);
2495
2496 Chain = DAG.getNode(MipsISD::JmpLink, DL, NodeTys, Ops);
24982497 SDValue InFlag = Chain.getValue(1);
24992498
25002499 // Create the CALLSEQ_END node.
26822681 // the size of Ins and InVals. This only happens when on varg functions
26832682 if (!OutChains.empty()) {
26842683 OutChains.push_back(Chain);
2685 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
2686 &OutChains[0], OutChains.size());
2684 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, OutChains);
26872685 }
26882686
26892687 return Chain;
27682766 RetOps.push_back(Flag);
27692767
27702768 // Return on Mips is always a "jr $ra"
2771 return DAG.getNode(MipsISD::Ret, DL, MVT::Other, &RetOps[0], RetOps.size());
2769 return DAG.getNode(MipsISD::Ret, DL, MVT::Other, RetOps);
27722770 }
27732771
27742772 //===----------------------------------------------------------------------===//
12351235 ResTys.push_back((*I == MVT::i64) ? MVT::Untyped : *I);
12361236
12371237 // Create node.
1238 SDValue Val = DAG.getNode(Opc, DL, ResTys, &Ops[0], Ops.size());
1238 SDValue Val = DAG.getNode(Opc, DL, ResTys, Ops);
12391239 SDValue Out = (ResTys[0] == MVT::Untyped) ? extractLOHI(Val, DL, DAG) : Val;
12401240
12411241 if (!HasChainIn)
12801280 SDValue Ops[16] = { LaneA, LaneB, LaneA, LaneB, LaneA, LaneB, LaneA, LaneB,
12811281 LaneA, LaneB, LaneA, LaneB, LaneA, LaneB, LaneA, LaneB };
12821282
1283 SDValue Result = DAG.getNode(ISD::BUILD_VECTOR, DL, ViaVecTy, Ops,
1284 ViaVecTy.getVectorNumElements());
1283 SDValue Result = DAG.getNode(ISD::BUILD_VECTOR, DL, ViaVecTy,
1284 ArrayRef(Ops, ViaVecTy.getVectorNumElements()));
12851285
12861286 if (ViaVecTy != ResVecTy)
12871287 Result = DAG.getNode(ISD::BITCAST, DL, ResVecTy, Result);
13201320 SplatValueA, SplatValueB, SplatValueA, SplatValueB,
13211321 SplatValueA, SplatValueB, SplatValueA, SplatValueB };
13221322
1323 SDValue Result = DAG.getNode(ISD::BUILD_VECTOR, DL, ViaVecTy, Ops,
1324 ViaVecTy.getVectorNumElements());
1323 SDValue Result = DAG.getNode(ISD::BUILD_VECTOR, DL, ViaVecTy,
1324 ArrayRef(Ops, ViaVecTy.getVectorNumElements()));
13251325
13261326 if (VecTy != ViaVecTy)
13271327 Result = DAG.getNode(ISD::BITCAST, DL, VecTy, Result);
17351735
17361736 // If ResTy is v2i64 then the type legalizer will break this node down into
17371737 // an equivalent v4i32.
1738 return DAG.getNode(ISD::BUILD_VECTOR, DL, ResTy, &Ops[0], Ops.size());
1738 return DAG.getNode(ISD::BUILD_VECTOR, DL, ResTy, Ops);
17391739 }
17401740 case Intrinsic::mips_fexp2_w:
17411741 case Intrinsic::mips_fexp2_d: {
25602560 ++I)
25612561 Ops.push_back(DAG.getTargetConstant(*I, MaskEltTy));
25622562
2563 SDValue MaskVec = DAG.getNode(ISD::BUILD_VECTOR, DL, MaskVecTy, &Ops[0],
2564 Ops.size());
2563 SDValue MaskVec = DAG.getNode(ISD::BUILD_VECTOR, DL, MaskVecTy, Ops);
25652564
25662565 if (Using1stVec && Using2ndVec) {
25672566 Op0 = Op->getOperand(0);
684684 DAG.getConstant(paramCount, MVT::i32),
685685 DAG.getConstant(sz, MVT::i32), InFlag };
686686 Chain = DAG.getNode(NVPTXISD::DeclareParam, dl, DeclareParamVTs,
687 DeclareParamOps, 5);
687 DeclareParamOps);
688688 InFlag = Chain.getValue(1);
689689 unsigned curOffset = 0;
690690 for (unsigned j = 0, je = vtparts.size(); j != je; ++j) {
730730 DAG.getConstant(paramCount, MVT::i32),
731731 DAG.getConstant(sz, MVT::i32), InFlag };
732732 Chain = DAG.getNode(NVPTXISD::DeclareParam, dl, DeclareParamVTs,
733 DeclareParamOps, 5);
733 DeclareParamOps);
734734 InFlag = Chain.getValue(1);
735735 unsigned NumElts = ObjectVT.getVectorNumElements();
736736 EVT EltVT = ObjectVT.getVectorElementType();
871871 DAG.getConstant(sz, MVT::i32),
872872 DAG.getConstant(0, MVT::i32), InFlag };
873873 Chain = DAG.getNode(NVPTXISD::DeclareScalarParam, dl, DeclareParamVTs,
874 DeclareParamOps, 5);
874 DeclareParamOps);
875875 InFlag = Chain.getValue(1);
876876 SDValue OutV = OutVals[OIdx];
877877 if (needExtend) {
915915 InFlag
916916 };
917917 Chain = DAG.getNode(NVPTXISD::DeclareParam, dl, DeclareParamVTs,
918 DeclareParamOps, 5);
918 DeclareParamOps);
919919 InFlag = Chain.getValue(1);
920920 unsigned curOffset = 0;
921921 for (unsigned j = 0, je = vtparts.size(); j != je; ++j) {
974974 DAG.getConstant(resultsz, MVT::i32),
975975 DAG.getConstant(0, MVT::i32), InFlag };
976976 Chain = DAG.getNode(NVPTXISD::DeclareRet, dl, DeclareRetVTs,
977 DeclareRetOps, 5);
977 DeclareRetOps);
978978 InFlag = Chain.getValue(1);
979979 } else {
980980 retAlignment = getArgumentAlignment(Callee, CS, retTy, 0);
984984 DAG.getConstant(resultsz / 8, MVT::i32),
985985 DAG.getConstant(0, MVT::i32), InFlag };
986986 Chain = DAG.getNode(NVPTXISD::DeclareRetParam, dl, DeclareRetVTs,
987 DeclareRetOps, 5);
987 DeclareRetOps);
988988 InFlag = Chain.getValue(1);
989989 }
990990 }
10041004 SDValue ProtoOps[] = {
10051005 Chain, DAG.getTargetExternalSymbol(ProtoStr, MVT::i32), InFlag,
10061006 };
1007 Chain = DAG.getNode(NVPTXISD::CallPrototype, dl, ProtoVTs, &ProtoOps[0], 3);
1007 Chain = DAG.getNode(NVPTXISD::CallPrototype, dl, ProtoVTs, ProtoOps);
10081008 InFlag = Chain.getValue(1);
10091009 }
10101010 // Op to just print "call"
10131013 Chain, DAG.getConstant((Ins.size() == 0) ? 0 : 1, MVT::i32), InFlag
10141014 };
10151015 Chain = DAG.getNode(Func ? (NVPTXISD::PrintCallUni) : (NVPTXISD::PrintCall),
1016 dl, PrintCallVTs, PrintCallOps, 3);
1016 dl, PrintCallVTs, PrintCallOps);
10171017 InFlag = Chain.getValue(1);
10181018
10191019 // Ops to print out the function name
10201020 SDVTList CallVoidVTs = DAG.getVTList(MVT::Other, MVT::Glue);
10211021 SDValue CallVoidOps[] = { Chain, Callee, InFlag };
1022 Chain = DAG.getNode(NVPTXISD::CallVoid, dl, CallVoidVTs, CallVoidOps, 3);
1022 Chain = DAG.getNode(NVPTXISD::CallVoid, dl, CallVoidVTs, CallVoidOps);
10231023 InFlag = Chain.getValue(1);
10241024
10251025 // Ops to print out the param list
10261026 SDVTList CallArgBeginVTs = DAG.getVTList(MVT::Other, MVT::Glue);
10271027 SDValue CallArgBeginOps[] = { Chain, InFlag };
10281028 Chain = DAG.getNode(NVPTXISD::CallArgBegin, dl, CallArgBeginVTs,
1029 CallArgBeginOps, 2);
1029 CallArgBeginOps);
10301030 InFlag = Chain.getValue(1);
10311031
10321032 for (unsigned i = 0, e = paramCount; i != e; ++i) {
10381038 SDVTList CallArgVTs = DAG.getVTList(MVT::Other, MVT::Glue);
10391039 SDValue CallArgOps[] = { Chain, DAG.getConstant(1, MVT::i32),
10401040 DAG.getConstant(i, MVT::i32), InFlag };
1041 Chain = DAG.getNode(opcode, dl, CallArgVTs, CallArgOps, 4);
1041 Chain = DAG.getNode(opcode, dl, CallArgVTs, CallArgOps);
10421042 InFlag = Chain.getValue(1);
10431043 }
10441044 SDVTList CallArgEndVTs = DAG.getVTList(MVT::Other, MVT::Glue);
10451045 SDValue CallArgEndOps[] = { Chain, DAG.getConstant(Func ? 1 : 0, MVT::i32),
10461046 InFlag };
1047 Chain =
1048 DAG.getNode(NVPTXISD::CallArgEnd, dl, CallArgEndVTs, CallArgEndOps, 3);
1047 Chain = DAG.getNode(NVPTXISD::CallArgEnd, dl, CallArgEndVTs, CallArgEndOps);
10491048 InFlag = Chain.getValue(1);
10501049
10511050 if (!Func) {
10521051 SDVTList PrototypeVTs = DAG.getVTList(MVT::Other, MVT::Glue);
10531052 SDValue PrototypeOps[] = { Chain, DAG.getConstant(uniqueCallSite, MVT::i32),
10541053 InFlag };
1055 Chain = DAG.getNode(NVPTXISD::Prototype, dl, PrototypeVTs, PrototypeOps, 3);
1054 Chain = DAG.getNode(NVPTXISD::Prototype, dl, PrototypeVTs, PrototypeOps);
10561055 InFlag = Chain.getValue(1);
10571056 }
10581057
12621261 DAG.getIntPtrConstant(j)));
12631262 }
12641263 }
1265 return DAG.getNode(ISD::BUILD_VECTOR, dl, Node->getValueType(0), &Ops[0],
1266 Ops.size());
1264 return DAG.getNode(ISD::BUILD_VECTOR, dl, Node->getValueType(0), Ops);
12671265 }
12681266
12691267 SDValue
17921790 //}
17931791
17941792 if (!OutChains.empty())
1795 DAG.setRoot(DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &OutChains[0],
1796 OutChains.size()));
1793 DAG.setRoot(DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains));
17971794
17981795 return Chain;
17991796 }
25602557
25612558 SDValue LoadChain = NewLD.getValue(NumElts);
25622559
2563 SDValue BuildVec =
2564 DAG.getNode(ISD::BUILD_VECTOR, DL, ResVT, &ScalarRes[0], NumElts);
2560 SDValue BuildVec = DAG.getNode(ISD::BUILD_VECTOR, DL, ResVT, ScalarRes);
25652561
25662562 Results.push_back(BuildVec);
25672563 Results.push_back(LoadChain);
26752671 SDValue LoadChain = NewLD.getValue(NumElts);
26762672
26772673 SDValue BuildVec =
2678 DAG.getNode(ISD::BUILD_VECTOR, DL, ResVT, &ScalarRes[0], NumElts);
2674 DAG.getNode(ISD::BUILD_VECTOR, DL, ResVT, ScalarRes);
26792675
26802676 Results.push_back(BuildVec);
26812677 Results.push_back(LoadChain);
23332333 }
23342334
23352335 if (!MemOps.empty())
2336 Chain = DAG.getNode(ISD::TokenFactor, dl,
2337 MVT::Other, &MemOps[0], MemOps.size());
2336 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
23382337
23392338 return Chain;
23402339 }
26832682 }
26842683
26852684 if (!MemOps.empty())
2686 Chain = DAG.getNode(ISD::TokenFactor, dl,
2687 MVT::Other, &MemOps[0], MemOps.size());
2685 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
26882686
26892687 return Chain;
26902688 }
30393037 }
30403038
30413039 if (!MemOps.empty())
3042 Chain = DAG.getNode(ISD::TokenFactor, dl,
3043 MVT::Other, &MemOps[0], MemOps.size());
3040 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
30443041
30453042 return Chain;
30463043 }
33613358 StoreTailCallArgumentsToStackSlot(DAG, Chain, TailCallArguments,
33623359 MemOpChains2, dl);
33633360 if (!MemOpChains2.empty())
3364 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3365 &MemOpChains2[0], MemOpChains2.size());
3361 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains2);
33663362
33673363 // Store the return address to the appropriate stack slot.
33683364 Chain = EmitTailCallStoreFPAndRetAddr(DAG, MF, Chain, LROp, FPOp, SPDiff,
34763472 // Load the address of the function entry point from the function
34773473 // descriptor.
34783474 SDVTList VTs = DAG.getVTList(MVT::i64, MVT::Other, MVT::Glue);
3479 SDValue LoadFuncPtr = DAG.getNode(PPCISD::LOAD, dl, VTs, MTCTROps,
3480 InFlag.getNode() ? 3 : 2);
3475 SDValue LoadFuncPtr = DAG.getNode(PPCISD::LOAD, dl, VTs,
3476 ArrayRef(MTCTROps, InFlag.getNode() ? 3 : 2));
34813477 Chain = LoadFuncPtr.getValue(1);
34823478 InFlag = LoadFuncPtr.getValue(2);
34833479
35133509 MTCTROps[2] = InFlag;
35143510 }
35153511
3516 Chain = DAG.getNode(PPCISD::MTCTR, dl, NodeTys, MTCTROps,
3517 InFlag.getNode() ? 3 : 2);
3512 Chain = DAG.getNode(PPCISD::MTCTR, dl, NodeTys,
3513 ArrayRef(MTCTROps, InFlag.getNode() ? 3 : 2));
35183514 InFlag = Chain.getValue(1);
35193515
35203516 NodeTys.clear();
36503646 isa(Callee)) &&
36513647 "Expecting an global address, external symbol, absolute value or register");
36523648
3653 return DAG.getNode(PPCISD::TC_RETURN, dl, MVT::Other, &Ops[0], Ops.size());
3649 return DAG.getNode(PPCISD::TC_RETURN, dl, MVT::Other, Ops);
36543650 }
36553651
36563652 // Add a NOP immediately after the branch instruction when using the 64-bit
36833679 }
36843680 }
36853681
3686 Chain = DAG.getNode(CallOpc, dl, NodeTys, &Ops[0], Ops.size());
3682 Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops);
36873683 InFlag = Chain.getValue(1);
36883684
36893685 if (needsTOCRestore) {
39253921 }
39263922
39273923 if (!MemOpChains.empty())
3928 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3929 &MemOpChains[0], MemOpChains.size());
3924 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains);
39303925
39313926 // Build a sequence of copy-to-reg nodes chained together with token chain
39323927 // and flag operands which copy the outgoing args into the appropriate regs.
39443939 SDValue Ops[] = { Chain, InFlag };
39453940
39463941 Chain = DAG.getNode(seenFloatArg ? PPCISD::CR6SET : PPCISD::CR6UNSET,
3947 dl, VTs, Ops, InFlag.getNode() ? 2 : 1);
3942 dl, VTs,
3943 ArrayRef(Ops, InFlag.getNode() ? 2 : 1));
39483944
39493945 InFlag = Chain.getValue(1);
39503946 }
43374333 }
43384334
43394335 if (!MemOpChains.empty())
4340 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
4341 &MemOpChains[0], MemOpChains.size());
4336 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains);
43424337
43434338 // Check if this is an indirect call (MTCTR/BCTRL).
43444339 // See PrepareCall() for more information about calls through function
47004695 }
47014696
47024697 if (!MemOpChains.empty())
4703 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
4704 &MemOpChains[0], MemOpChains.size());
4698 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains);
47054699
47064700 // On Darwin, R12 must contain the address of an indirect callee. This does
47074701 // not mean the MTCTR instruction must use R12; it's easier to model this as
47894783 if (Flag.getNode())
47904784 RetOps.push_back(Flag);
47914785
4792 return DAG.getNode(PPCISD::RET_FLAG, dl, MVT::Other,
4793 &RetOps[0], RetOps.size());
4786 return DAG.getNode(PPCISD::RET_FLAG, dl, MVT::Other, RetOps);
47944787 }
47954788
47964789 SDValue PPCTargetLowering::LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG,
48934886 // Build a DYNALLOC node.
48944887 SDValue Ops[3] = { Chain, NegSize, FPSIdx };
48954888 SDVTList VTs = DAG.getVTList(PtrVT, MVT::Other);
4896 return DAG.getNode(PPCISD::DYNALLOC, dl, VTs, Ops, 3);
4889 return DAG.getNode(PPCISD::DYNALLOC, dl, VTs, Ops);
48974890 }
48984891
48994892 SDValue PPCTargetLowering::lowerEH_SJLJ_SETJMP(SDValue Op,
52835276 MachineFunction &MF = DAG.getMachineFunction();
52845277 EVT VT = Op.getValueType();
52855278 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
5286 SDValue MFFSreg, InFlag;
52875279
52885280 // Save FP Control Word to register
52895281 EVT NodeTys[] = {
52905282 MVT::f64, // return register
52915283 MVT::Glue // unused in this context
52925284 };
5293 SDValue Chain = DAG.getNode(PPCISD::MFFS, dl, NodeTys, &InFlag, 0);
5285 SDValue Chain = DAG.getNode(PPCISD::MFFS, dl, NodeTys, ArrayRef());
52945286
52955287 // Save FP register to stack slot
52965288 int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8, false);
54365428 SDValue Elt = DAG.getConstant(Val, MVT::i32);
54375429 SmallVector Ops;
54385430 Ops.assign(CanonicalVT.getVectorNumElements(), Elt);
5439 SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, dl, CanonicalVT,
5440 &Ops[0], Ops.size());
5431 SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, dl, CanonicalVT, Ops);
54415432 return DAG.getNode(ISD::BITCAST, dl, ReqVT, Res);
54425433 }
54435434
58425833 }
58435834
58445835 SDValue VPermMask = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i8,
5845 &ResultMask[0], ResultMask.size());
5836 ResultMask);
58465837 return DAG.getNode(PPCISD::VPERM, dl, V1.getValueType(), V1, V2, VPermMask);
58475838 }
58485839
59175908 DAG.getConstant(CompareOpc, MVT::i32)
59185909 };
59195910 EVT VTs[] = { Op.getOperand(2).getValueType(), MVT::Glue };
5920 SDValue CompNode = DAG.getNode(PPCISD::VCMPo, dl, VTs, Ops, 3);
5911 SDValue CompNode = DAG.getNode(PPCISD::VCMPo, dl, VTs, Ops);
59215912
59225913 // Now that we have the comparison, emit a copy from the CR to a GPR.
59235914 // This is flagged to the above dot comparison.
75837574 Ops[C+i] = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, Ops[C+i]);
75847575
75857576 DAG.ReplaceAllUsesOfValueWith(PromOp,
7586 DAG.getNode(PromOp.getOpcode(), dl, MVT::i1,
7587 Ops.data(), Ops.size()));
7577 DAG.getNode(PromOp.getOpcode(), dl, MVT::i1, Ops));
75887578 }
75897579
75907580 // Now we're left with the initial truncation itself.
78207810 }
78217811
78227812 DAG.ReplaceAllUsesOfValueWith(PromOp,
7823 DAG.getNode(PromOp.getOpcode(), dl, N->getValueType(0),
7824 Ops.data(), Ops.size()));
7813 DAG.getNode(PromOp.getOpcode(), dl, N->getValueType(0), Ops));
78257814 }
78267815
78277816 // Now we're left with the initial extension itself.
83828371 DAG.getConstant(CompareOpc, MVT::i32)
83838372 };
83848373 EVT VTs[] = { LHS.getOperand(2).getValueType(), MVT::Glue };
8385 SDValue CompNode = DAG.getNode(PPCISD::VCMPo, dl, VTs, Ops, 3);
8374 SDValue CompNode = DAG.getNode(PPCISD::VCMPo, dl, VTs, Ops);
83868375
83878376 // Unpack the result based on how the target uses it.
83888377 PPC::Predicate CompOpc;
443443 Chains.push_back(LowerConstantInitializer(Init->getAggregateElement(i),
444444 GV, Ptr, Chain, DAG));
445445 }
446 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
447 Chains.data(), Chains.size());
446 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains);
448447 } else {
449448 Init->dump();
450449 llvm_unreachable("Unhandled constant initializer");
524523 DAG.ExtractVectorElements(A, Args);
525524 DAG.ExtractVectorElements(B, Args);
526525
527 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(),
528 Args.data(), Args.size());
526 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), Args);
529527 }
530528
531529 SDValue AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op,
537535 DAG.ExtractVectorElements(Op.getOperand(0), Args, Start,
538536 VT.getVectorNumElements());
539537
540 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(),
541 Args.data(), Args.size());
538 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), Args);
542539 }
543540
544541 SDValue AMDGPUTargetLowering::LowerFrameIndex(SDValue Op,
727724 MemEltVT, Load->isVolatile(), Load->isNonTemporal(),
728725 Load->getAlignment()));
729726 }
730 return DAG.getNode(ISD::BUILD_VECTOR, SL, Op.getValueType(),
731 Loads.data(), Loads.size());
727 return DAG.getNode(ISD::BUILD_VECTOR, SL, Op.getValueType(), Loads);
732728 }
733729
734730 SDValue AMDGPUTargetLowering::MergeVectorStore(const SDValue &Op,
812808 MemEltVT, Store->isVolatile(), Store->isNonTemporal(),
813809 Store->getAlignment()));
814810 }
815 return DAG.getNode(ISD::TokenFactor, SL, MVT::Other, Chains.data(), NumElts);
811 return DAG.getNode(ISD::TokenFactor, SL, MVT::Other, Chains);
816812 }
817813
818814 SDValue AMDGPUTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
11061102 for (unsigned I = 0; I < NElts; ++I)
11071103 Args[I] = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, ScalarVT, Args[I], VTOp);
11081104
1109 return DAG.getNode(ISD::BUILD_VECTOR, DL, VT, Args.data(), Args.size());
1105 return DAG.getNode(ISD::BUILD_VECTOR, DL, VT, Args);
11101106 }
11111107
11121108 //===----------------------------------------------------------------------===//
561561 DAG.getConstant(2, MVT::i32), // SWZ_Z
562562 DAG.getConstant(3, MVT::i32) // SWZ_W
563563 };
564 return DAG.getNode(AMDGPUISD::EXPORT, SDLoc(Op), Op.getValueType(),
565 Args, 8);
564 return DAG.getNode(AMDGPUISD::EXPORT, SDLoc(Op), Op.getValueType(), Args);
566565 }
567566
568567 // default for switch(IntrinsicID)
712711 Op.getOperand(9),
713712 Op.getOperand(10)
714713 };
715 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, DL, MVT::v4f32, TexArgs, 19);
714 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, DL, MVT::v4f32, TexArgs);
716715 }
717716 case AMDGPUIntrinsic::AMDGPU_dp4: {
718717 SDValue Args[8] = {
733732 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
734733 DAG.getConstant(3, MVT::i32))
735734 };
736 return DAG.getNode(AMDGPUISD::DOT4, DL, MVT::f32, Args, 8);
735 return DAG.getNode(AMDGPUISD::DOT4, DL, MVT::f32, Args);
737736 }
738737
739738 case Intrinsic::r600_read_ngroups_x:
11111110 DAG.getConstant(0, MVT::i32),
11121111 Mask
11131112 };
1114 SDValue Input = DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v4i32, Src, 4);
1113 SDValue Input = DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v4i32, Src);
11151114 SDValue Args[3] = { Chain, Input, DWordAddr };
11161115 return DAG.getMemIntrinsicNode(AMDGPUISD::STORE_MSKOR, DL,
11171116 Op->getVTList(), Args, 3, MemVT,
11541153 if (ValueVT.isVector()) {
11551154 unsigned NumElemVT = ValueVT.getVectorNumElements();
11561155 EVT ElemVT = ValueVT.getVectorElementType();
1157 SDValue Stores[4];
1156 SmallVector Stores(NumElemVT);
11581157
11591158 assert(NumElemVT >= StackWidth && "Stack width cannot be greater than "
11601159 "vector width in load");
11711170 Chain, Elem, Ptr,
11721171 DAG.getTargetConstant(Channel, MVT::i32));
11731172 }
1174 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Stores, NumElemVT);
1173 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Stores);
11751174 } else {
11761175 if (ValueVT == MVT::i8) {
11771176 Value = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, Value);
12761275 NewVT = VT;
12771276 NumElements = VT.getVectorNumElements();
12781277 }
1279 Result = DAG.getNode(ISD::BUILD_VECTOR, DL, NewVT, Slots, NumElements);
1278 Result = DAG.getNode(ISD::BUILD_VECTOR, DL, NewVT,
1279 ArrayRef(Slots, NumElements));
12801280 } else {
12811281 // non-constant ptr can't be folded, keeps it as a v4f32 load
12821282 Result = DAG.getNode(AMDGPUISD::CONST_ADDRESS, DL, MVT::v4i32,
13561356 Loads[i] = DAG.getUNDEF(ElemVT);
13571357 }
13581358 EVT TargetVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, 4);
1359 LoweredLoad = DAG.getNode(ISD::BUILD_VECTOR, DL, TargetVT, Loads, 4);
1359 LoweredLoad = DAG.getNode(ISD::BUILD_VECTOR, DL, TargetVT, Loads);
13601360 } else {
13611361 LoweredLoad = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, VT,
13621362 Chain, Ptr,
14781478 }
14791479
14801480 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(VectorEntry),
1481 VectorEntry.getValueType(), NewBldVec, 4);
1481 VectorEntry.getValueType(), NewBldVec);
14821482 }
14831483
14841484 static SDValue ReorganizeVector(SelectionDAG &DAG, SDValue VectorEntry,
15161516 }
15171517
15181518 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(VectorEntry),
1519 VectorEntry.getValueType(), NewBldVec, 4);
1519 VectorEntry.getValueType(), NewBldVec);
15201520 }
15211521
15221522
16441644 }
16451645
16461646 // Return the new vector
1647 return DAG.getNode(ISD::BUILD_VECTOR, dl,
1648 VT, Ops.data(), Ops.size());
1647 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
16491648 }
16501649
16511650 // Extract_vec (Build_vector) generated by custom lowering
17281727 };
17291728 SDLoc DL(N);
17301729 NewArgs[1] = OptimizeSwizzle(N->getOperand(1), &NewArgs[4], DAG);
1731 return DAG.getNode(AMDGPUISD::EXPORT, DL, N->getVTList(), NewArgs, 8);
1730 return DAG.getNode(AMDGPUISD::EXPORT, DL, N->getVTList(), NewArgs);
17321731 }
17331732 case AMDGPUISD::TEXTURE_FETCH: {
17341733 SDValue Arg = N->getOperand(1);
17581757 };
17591758 NewArgs[1] = OptimizeSwizzle(N->getOperand(1), &NewArgs[2], DAG);
17601759 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, SDLoc(N), N->getVTList(),
1761 NewArgs, 19);
1760 NewArgs);
17621761 }
17631762 }
17641763 return SDValue();
430430 for (unsigned j = 0; j != NumElements; ++j)
431431 Regs.push_back(DAG.getUNDEF(VT));
432432
433 InVals.push_back(DAG.getNode(ISD::BUILD_VECTOR, DL, Arg.VT,
434 Regs.data(), Regs.size()));
433 InVals.push_back(DAG.getNode(ISD::BUILD_VECTOR, DL, Arg.VT, Regs));
435434 continue;
436435 }
437436
744743 // build the new intrinsic call
745744 SDNode *Result = DAG.getNode(
746745 Res.size() > 1 ? ISD::INTRINSIC_W_CHAIN : ISD::INTRINSIC_VOID, DL,
747 DAG.getVTList(Res), Ops.data(), Ops.size()).getNode();
746 DAG.getVTList(Res), Ops).getNode();
748747
749748 if (BR) {
750749 // Give the branch instruction our target
234234 if (Flag.getNode())
235235 RetOps.push_back(Flag);
236236
237 return DAG.getNode(SPISD::RET_FLAG, DL, MVT::Other,
238 &RetOps[0], RetOps.size());
237 return DAG.getNode(SPISD::RET_FLAG, DL, MVT::Other, RetOps);
239238 }
240239
241240 // Lower return values for the 64-bit ABI.
314313 if (Flag.getNode())
315314 RetOps.push_back(Flag);
316315
317 return DAG.getNode(SPISD::RET_FLAG, DL, MVT::Other,
318 &RetOps[0], RetOps.size());
316 return DAG.getNode(SPISD::RET_FLAG, DL, MVT::Other, RetOps);
319317 }
320318
321319 SDValue SparcTargetLowering::
527525
528526 if (!OutChains.empty()) {
529527 OutChains.push_back(Chain);
530 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
531 &OutChains[0], OutChains.size());
528 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
532529 }
533530 }
534531
643640 }
644641
645642 if (!OutChains.empty())
646 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
647 &OutChains[0], OutChains.size());
643 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, OutChains);
648644
649645 return Chain;
650646 }
876872
877873 // Emit all stores, make sure the occur before any copies into physregs.
878874 if (!MemOpChains.empty())
879 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
880 &MemOpChains[0], MemOpChains.size());
875 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains);
881876
882877 // Build a sequence of copy-to-reg nodes chained together with token
883878 // chain and flag operands which copy the outgoing args into registers.
926921 if (InFlag.getNode())
927922 Ops.push_back(InFlag);
928923
929 Chain = DAG.getNode(SPISD::CALL, dl, NodeTys, &Ops[0], Ops.size());
924 Chain = DAG.getNode(SPISD::CALL, dl, NodeTys, Ops);
930925 InFlag = Chain.getValue(1);
931926
932927 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(ArgsSize, true),
11931188
11941189 // Emit all stores, make sure they occur before the call.
11951190 if (!MemOpChains.empty())
1196 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
1197 &MemOpChains[0], MemOpChains.size());
1191 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains);
11981192
11991193 // Build a sequence of CopyToReg nodes glued together with token chain and
12001194 // glue operands which copy the outgoing args into registers. The InGlue is
12441238
12451239 // Now the call itself.
12461240 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
1247 Chain = DAG.getNode(SPISD::CALL, DL, NodeTys, &Ops[0], Ops.size());
1241 Chain = DAG.getNode(SPISD::CALL, DL, NodeTys, Ops);
12481242 InGlue = Chain.getValue(1);
12491243
12501244 // Revert the stack pointer immediately after the call.
19131907 assert(Mask && "Missing call preserved mask for calling convention");
19141908 Ops.push_back(DAG.getRegisterMask(Mask));
19151909 Ops.push_back(InFlag);
1916 Chain = DAG.getNode(SPISD::TLS_CALL, DL, NodeTys, &Ops[0], Ops.size());
1910 Chain = DAG.getNode(SPISD::TLS_CALL, DL, NodeTys, Ops);
19171911 InFlag = Chain.getValue(1);
19181912 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(1, true),
19191913 DAG.getIntPtrConstant(0, true), InFlag, DL);
25962590 SubRegOdd);
25972591 SDValue OutChains[2] = { SDValue(Hi64.getNode(), 1),
25982592 SDValue(Lo64.getNode(), 1) };
2599 SDValue OutChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
2600 &OutChains[0], 2);
2593 SDValue OutChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
26012594 SDValue Ops[2] = {SDValue(InFP128,0), OutChain};
26022595 return DAG.getMergeValues(Ops, 2, dl);
26032596 }
26432636 LoPtr,
26442637 MachinePointerInfo(),
26452638 false, false, alignment);
2646 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
2647 &OutChains[0], 2);
2639 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
26482640 }
26492641
26502642 static SDValue LowerFNEGorFABS(SDValue Op, SelectionDAG &DAG, bool isV9) {
771771 }
772772 // Join the stores, which are independent of one another.
773773 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
774 &MemOps[NumFixedFPRs],
775 SystemZ::NumArgFPRs - NumFixedFPRs);
774 ArrayRef(&MemOps[NumFixedFPRs],
775 SystemZ::NumArgFPRs-NumFixedFPRs));
776776 }
777777 }
778778
874874
875875 // Join the stores, which are independent of one another.
876876 if (!MemOpChains.empty())
877 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
878 &MemOpChains[0], MemOpChains.size());
877 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains);
879878
880879 // Accept direct calls by converting symbolic call addresses to the
881880 // associated Target* opcodes. Force %r1 to be used for indirect
918917 // Emit the call.
919918 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
920919 if (IsTailCall)
921 return DAG.getNode(SystemZISD::SIBCALL, DL, NodeTys, &Ops[0], Ops.size());
922 Chain = DAG.getNode(SystemZISD::CALL, DL, NodeTys, &Ops[0], Ops.size());
920 return DAG.getNode(SystemZISD::SIBCALL, DL, NodeTys, Ops);
921 Chain = DAG.getNode(SystemZISD::CALL, DL, NodeTys, Ops);
923922 Glue = Chain.getValue(1);
924923
925924 // Mark the end of the call, which is glued to the call itself.
995994 if (Glue.getNode())
996995 RetOps.push_back(Glue);
997996
998 return DAG.getNode(SystemZISD::RET_FLAG, DL, MVT::Other,
999 RetOps.data(), RetOps.size());
997 return DAG.getNode(SystemZISD::RET_FLAG, DL, MVT::Other, RetOps);
1000998 }
1001999
10021000 SDValue SystemZTargetLowering::
17781776 Ops.push_back(Glue);
17791777
17801778 SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Glue);
1781 return DAG.getNode(SystemZISD::SELECT_CCMASK, DL, VTs, &Ops[0], Ops.size());
1779 return DAG.getNode(SystemZISD::SELECT_CCMASK, DL, VTs, Ops);
17821780 }
17831781
17841782 SDValue SystemZTargetLowering::lowerGlobalAddress(GlobalAddressSDNode *Node,
19701968 false, false, 0);
19711969 Offset += 8;
19721970 }
1973 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps, NumFields);
1971 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps);
19741972 }
19751973
19761974 SDValue SystemZTargetLowering::lowerVACOPY(SDValue Op,
230230 Ops.push_back(DAG.getConstant(SystemZ::CCMASK_SRST_FOUND, MVT::i32));
231231 Ops.push_back(Glue);
232232 VTs = DAG.getVTList(PtrVT, MVT::Glue);
233 End = DAG.getNode(SystemZISD::SELECT_CCMASK, DL, VTs, &Ops[0], Ops.size());
233 End = DAG.getNode(SystemZISD::SELECT_CCMASK, DL, VTs, Ops);
234234 return std::make_pair(End, Chain);
235235 }
236236
375375 else
376376 Ops.push_back(Chain.getOperand(i));
377377 SDValue NewChain =
378 CurDAG->getNode(ISD::TokenFactor, SDLoc(Load),
379 MVT::Other, &Ops[0], Ops.size());
378 CurDAG->getNode(ISD::TokenFactor, SDLoc(Load), MVT::Other, Ops);
380379 Ops.clear();
381380 Ops.push_back(NewChain);
382381 }
19911990 // Make a new TokenFactor with all the other input chains except
19921991 // for the load.
19931992 InputChain = CurDAG->getNode(ISD::TokenFactor, SDLoc(Chain),
1994 MVT::Other, &ChainOps[0], ChainOps.size());
1993 MVT::Other, ChainOps);
19951994 }
19961995 if (!ChainCheck)
19971996 return false;
19321932 if (Flag.getNode())
19331933 RetOps.push_back(Flag);
19341934
1935 return DAG.getNode(X86ISD::RET_FLAG, dl,
1936 MVT::Other, &RetOps[0], RetOps.size());
1935 return DAG.getNode(X86ISD::RET_FLAG, dl, MVT::Other, RetOps);
19371936 }
19381937
19391938 bool X86TargetLowering::isUsedByReturnOnly(SDNode *N, SDValue &Chain) const {
24262425 SaveXMMOps.push_back(Val);
24272426 }
24282427 MemOps.push_back(DAG.getNode(X86ISD::VASTART_SAVE_XMM_REGS, dl,
2429 MVT::Other,
2430 &SaveXMMOps[0], SaveXMMOps.size()));
2428 MVT::Other, SaveXMMOps));
24312429 }
24322430
24332431 if (!MemOps.empty())
2434 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
2435 &MemOps[0], MemOps.size());
2432 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
24362433 }
24372434 }
24382435
26982695 }
26992696
27002697 if (!MemOpChains.empty())
2701 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
2702 &MemOpChains[0], MemOpChains.size());
2698 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains);
27032699
27042700 if (Subtarget->isPICStyleGOT()) {
27052701 // ELF / PIC requires GOT in the EBX register before function calls via PLT
27982794 }
27992795
28002796 if (!MemOpChains2.empty())
2801 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
2802 &MemOpChains2[0], MemOpChains2.size());
2797 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains2);
28032798
28042799 // Store the return address to the appropriate stack slot.
28052800 Chain = EmitTailCallStoreRetAddr(DAG, MF, Chain, RetAddrFrIdx,
29362931 // This isn't right, although it's probably harmless on x86; liveouts
29372932 // should be computed from returns not tail calls. Consider a void
29382933 // function making a tail call to a function returning int.
2939 return DAG.getNode(X86ISD::TC_RETURN, dl, NodeTys, &Ops[0], Ops.size());
2940 }
2941
2942 Chain = DAG.getNode(X86ISD::CALL, dl, NodeTys, &Ops[0], Ops.size());
2934 return DAG.getNode(X86ISD::TC_RETURN, dl, NodeTys, Ops);
2935 }
2936
2937 Chain = DAG.getNode(X86ISD::CALL, dl, NodeTys, Ops);
29432938 InFlag = Chain.getValue(1);
29442939
29452940 // Create the CALLSEQ_END node.
48324827 if (Subtarget->hasInt256()) { // AVX2
48334828 SDValue Cst = DAG.getTargetConstant(0, MVT::i32);
48344829 SDValue Ops[] = { Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst };
4835 Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8i32, Ops,
4836 array_lengthof(Ops));
4830 Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8i32, Ops);
48374831 } else {
48384832 // 256-bit logic and arithmetic instructions in AVX are all
48394833 // floating-point, no support for integer ops. Emit fp zeroed vectors.
48404834 SDValue Cst = DAG.getTargetConstantFP(+0.0, MVT::f32);
48414835 SDValue Ops[] = { Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst };
4842 Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8f32, Ops,
4843 array_lengthof(Ops));
4836 Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8f32, Ops);
48444837 }
48454838 } else if (VT.is512BitVector()) { // AVX-512
48464839 SDValue Cst = DAG.getTargetConstant(0, MVT::i32);
48474840 SDValue Ops[] = { Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst,
48484841 Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst };
4849 Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i32, Ops, 16);
4842 Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i32, Ops);
48504843 } else if (VT.getScalarType() == MVT::i1) {
48514844 assert(VT.getVectorNumElements() <= 16 && "Unexpected vector type");
48524845 SDValue Cst = DAG.getTargetConstant(0, MVT::i1);
4853 SDValue Ops[] = { Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst,
4854 Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst };
4855 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT,
4856 Ops, VT.getVectorNumElements());
4846 SmallVector Ops(VT.getVectorNumElements(), Cst);
4847 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
48574848 } else
48584849 llvm_unreachable("Unexpected vector type");
48594850
48734864 if (VT.is256BitVector()) {
48744865 if (HasInt256) { // AVX2
48754866 SDValue Ops[] = { Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst };
4876 Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8i32, Ops,
4877 array_lengthof(Ops));
4867 Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8i32, Ops);
48784868 } else { // AVX
48794869 Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, Cst, Cst, Cst, Cst);
48804870 Vec = Concat128BitVectors(Vec, Vec, MVT::v8i32, 8, DAG, dl);
58535843 SDLoc dl(Op);
58545844 if (ISD::isBuildVectorAllZeros(Op.getNode())) {
58555845 SDValue Cst = DAG.getTargetConstant(0, MVT::i1);
5856 SDValue Ops[] = { Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst,
5857 Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst };
5858 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT,
5859 Ops, VT.getVectorNumElements());
5846 SmallVector Ops(VT.getVectorNumElements(), Cst);
5847 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
58605848 }
58615849
58625850 if (ISD::isBuildVectorAllOnes(Op.getNode())) {
58635851 SDValue Cst = DAG.getTargetConstant(1, MVT::i1);
5864 SDValue Ops[] = { Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst,
5865 Cst, Cst, Cst, Cst, Cst, Cst, Cst, Cst };
5866 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT,
5867 Ops, VT.getVectorNumElements());
5852 SmallVector Ops(VT.getVectorNumElements(), Cst);
5853 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
58685854 }
58695855
58705856 bool AllContants = true;
61246110 EVT HVT = EVT::getVectorVT(*DAG.getContext(), ExtVT, NumElems/2);
61256111
61266112 // Build both the lower and upper subvector.
6127 SDValue Lower = DAG.getNode(ISD::BUILD_VECTOR, dl, HVT, &V[0], NumElems/2);
6128 SDValue Upper = DAG.getNode(ISD::BUILD_VECTOR, dl, HVT, &V[NumElems / 2],
6129 NumElems/2);
6113 SDValue Lower = DAG.getNode(ISD::BUILD_VECTOR, dl, HVT,
6114 ArrayRef(&V[0], NumElems/2));
6115 SDValue Upper = DAG.getNode(ISD::BUILD_VECTOR, dl, HVT,
6116 ArrayRef(&V[NumElems / 2],
6117 NumElems/2));
61306118
61316119 // Recreate the wider vector with the lower and upper part.
61326120 if (VT.is256BitVector())
64136401 if (ShufVT != VT)
64146402 V1 = DAG.getNode(ISD::BITCAST, dl, ShufVT, V1);
64156403 return DAG.getNode(X86ISD::PSHUFB, dl, ShufVT, V1,
6416 DAG.getNode(ISD::BUILD_VECTOR, dl, ShufVT,
6417 PshufbMask.data(), PshufbMask.size()));
6404 DAG.getNode(ISD::BUILD_VECTOR, dl, ShufVT, PshufbMask));
64186405 }
64196406
64206407 // v8i16 shuffles - Prefer shuffles in the following order:
67166703 }
67176704 V1 = DAG.getNode(X86ISD::PSHUFB, dl, MVT::v16i8, V1,
67186705 DAG.getNode(ISD::BUILD_VECTOR, dl,
6719 MVT::v16i8, &pshufbMask[0], 16));
6706 MVT::v16i8, pshufbMask));
67206707
67216708 // As PSHUFB will zero elements with negative indices, it's safe to ignore
67226709 // the 2nd operand if it's undefined or zero.
67346721 }
67356722 V2 = DAG.getNode(X86ISD::PSHUFB, dl, MVT::v16i8, V2,
67366723 DAG.getNode(ISD::BUILD_VECTOR, dl,
6737 MVT::v16i8, &pshufbMask[0], 16));
6724 MVT::v16i8, pshufbMask));
67386725 return DAG.getNode(ISD::OR, dl, MVT::v16i8, V1, V2);
67396726 }
67406727
70056992 }
70066993
70076994 // Construct the output using a BUILD_VECTOR.
7008 Output[l] = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &SVOps[0],
7009 SVOps.size());
6995 Output[l] = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, SVOps);
70106996 } else if (InputUsed[0] < 0) {
70116997 // No input vectors were used! The result is undefined.
70126998 Output[l] = DAG.getUNDEF(NVT);
77937779 permclMask.push_back(DAG.getConstant((M[i]>=0) ? M[i] : 0, MaskEltVT));
77947780 }
77957781
7796 SDValue Mask = DAG.getNode(ISD::BUILD_VECTOR, dl, MaskVectorVT,
7797 &permclMask[0], NumElems);
7782 SDValue Mask = DAG.getNode(ISD::BUILD_VECTOR, dl, MaskVectorVT, permclMask);
77987783 if (V2IsUndef)
77997784 // Bitcast is for VPERMPS since mask is v8i32 but node takes v8f32
78007785 return DAG.getNode(X86ISD::VPERMV, dl, VT,
84938478
84948479 if (InFlag) {
84958480 SDValue Ops[] = { Chain, TGA, *InFlag };
8496 Chain = DAG.getNode(CallType, dl, NodeTys, Ops, array_lengthof(Ops));
8481 Chain = DAG.getNode(CallType, dl, NodeTys, Ops);
84978482 } else {
84988483 SDValue Ops[] = { Chain, TGA };
8499 Chain = DAG.getNode(CallType, dl, NodeTys, Ops, array_lengthof(Ops));
8484 Chain = DAG.getNode(CallType, dl, NodeTys, Ops);
85008485 }
85018486
85028487 // TLSADDR will be codegen'ed as call. Inform MFI that function has calls.
86808665 SDValue Chain = DAG.getEntryNode();
86818666 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
86828667 SDValue Args[] = { Chain, Offset };
8683 Chain = DAG.getNode(X86ISD::TLSCALL, DL, NodeTys, Args, 2);
8668 Chain = DAG.getNode(X86ISD::TLSCALL, DL, NodeTys, Args);
86848669
86858670 // TLSCALL will be codegen'ed as call. Inform MFI that function has calls.
86868671 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
88088793 SDValue Ops1[4] = { Tmp3, Tmp1, CC, Cond };
88098794
88108795 if (Op.getOpcode() == ISD::SHL_PARTS) {
8811 Hi = DAG.getNode(X86ISD::CMOV, dl, VT, Ops0, 4);
8812 Lo = DAG.getNode(X86ISD::CMOV, dl, VT, Ops1, 4);
8796 Hi = DAG.getNode(X86ISD::CMOV, dl, VT, Ops0);
8797 Lo = DAG.getNode(X86ISD::CMOV, dl, VT, Ops1);
88138798 } else {
8814 Lo = DAG.getNode(X86ISD::CMOV, dl, VT, Ops0, 4);
8815 Hi = DAG.getNode(X86ISD::CMOV, dl, VT, Ops1, 4);
8799 Lo = DAG.getNode(X86ISD::CMOV, dl, VT, Ops0);
8800 Hi = DAG.getNode(X86ISD::CMOV, dl, VT, Ops1);
88168801 }
88178802
88188803 SDValue Ops[2] = { Lo, Hi };
92209205 MVT::i32, eax.getValue(2));
92219206 SDValue Ops[] = { eax, edx };
92229207 SDValue pair = IsReplace
9223 ? DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Ops, array_lengthof(Ops))
9208 ? DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Ops)
92249209 : DAG.getMergeValues(Ops, array_lengthof(Ops), DL);
92259210 return std::make_pair(pair, SDValue());
92269211 }
94169401 for (unsigned j = 0; j < 8; ++j)
94179402 pshufbMask.push_back(DAG.getConstant(0x80, MVT::i8));
94189403 }
9419 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v32i8,
9420 &pshufbMask[0], 32);
9404 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v32i8, pshufbMask);
94219405 In = DAG.getNode(X86ISD::PSHUFB, DL, MVT::v32i8, In, BV);
94229406 In = DAG.getNode(ISD::BITCAST, DL, MVT::v4i64, In);
94239407
100149998 for (unsigned i = 0; i != NumOperands; ++i)
100159999 Ops.push_back(Op.getOperand(i));
1001610000
10017 SDValue New = DAG.getNode(Opcode, dl, VTs, &Ops[0], NumOperands);
10001 SDValue New = DAG.getNode(Opcode, dl, VTs, Ops);
1001810002 DAG.ReplaceAllUsesWith(Op, New);
1001910003 return SDValue(New.getNode(), 1);
1002010004 }
1029710281 ULTOp1.push_back(DAG.getConstant(Val - 1, EVT));
1029810282 }