llvm.org GIT mirror llvm / 8065738
[CodeGen] Use MVT iterator_ranges in legality loops. NFC intended. A few loops do trickier things than just iterating on an MVT subset, so I'll leave them be for now. Follow-up of r225387. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225392 91177308-0d34-0410-b5e6-96231b3b80d8 Ahmed Bougacha 5 years ago
7 changed file(s) with 62 addition(s) and 106 deletion(s). Raw diff Collapse all Expand all
747747 memset(TargetDAGCombineArray, 0, array_lengthof(TargetDAGCombineArray));
748748
749749 // Set default actions for various operations.
750 for (unsigned VT = 0; VT != (unsigned)MVT::LAST_VALUETYPE; ++VT) {
750 for (MVT VT : MVT::all_valuetypes()) {
751751 // Default all indexed load / store to expand.
752752 for (unsigned IM = (unsigned)ISD::PRE_INC;
753753 IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) {
754 setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand);
755 setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand);
754 setIndexedLoadAction(IM, VT, Expand);
755 setIndexedStoreAction(IM, VT, Expand);
756756 }
757757
758758 // Most backends expect to see the node which just returns the value loaded.
759 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS,
760 (MVT::SimpleValueType)VT, Expand);
759 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Expand);
761760
762761 // These operations default to expand.
763 setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand);
764 setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand);
765 setOperationAction(ISD::FMINNUM, (MVT::SimpleValueType)VT, Expand);
766 setOperationAction(ISD::FMAXNUM, (MVT::SimpleValueType)VT, Expand);
762 setOperationAction(ISD::FGETSIGN, VT, Expand);
763 setOperationAction(ISD::CONCAT_VECTORS, VT, Expand);
764 setOperationAction(ISD::FMINNUM, VT, Expand);
765 setOperationAction(ISD::FMAXNUM, VT, Expand);
767766
768767 // These library functions default to expand.
769 setOperationAction(ISD::FROUND, (MVT::SimpleValueType)VT, Expand);
768 setOperationAction(ISD::FROUND, VT, Expand);
770769
771770 // These operations default to expand for vector types.
772 if (VT >= MVT::FIRST_VECTOR_VALUETYPE &&
773 VT <= MVT::LAST_VECTOR_VALUETYPE) {
774 setOperationAction(ISD::FCOPYSIGN, (MVT::SimpleValueType)VT, Expand);
775 setOperationAction(ISD::ANY_EXTEND_VECTOR_INREG,
776 (MVT::SimpleValueType)VT, Expand);
777 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG,
778 (MVT::SimpleValueType)VT, Expand);
779 setOperationAction(ISD::ZERO_EXTEND_VECTOR_INREG,
780 (MVT::SimpleValueType)VT, Expand);
771 if (VT.isVector()) {
772 setOperationAction(ISD::FCOPYSIGN, VT, Expand);
773 setOperationAction(ISD::ANY_EXTEND_VECTOR_INREG, VT, Expand);
774 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, VT, Expand);
775 setOperationAction(ISD::ZERO_EXTEND_VECTOR_INREG, VT, Expand);
781776 }
782777 }
783778
538538 setTruncStoreAction(MVT::v2i32, MVT::v2i16, Expand);
539539 // Likewise, narrowing and extending vector loads/stores aren't handled
540540 // directly.
541 for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
542 VT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++VT) {
543
544 setOperationAction(ISD::SIGN_EXTEND_INREG, (MVT::SimpleValueType)VT,
545 Expand);
546
547 setOperationAction(ISD::MULHS, (MVT::SimpleValueType)VT, Expand);
548 setOperationAction(ISD::SMUL_LOHI, (MVT::SimpleValueType)VT, Expand);
549 setOperationAction(ISD::MULHU, (MVT::SimpleValueType)VT, Expand);
550 setOperationAction(ISD::UMUL_LOHI, (MVT::SimpleValueType)VT, Expand);
551
552 setOperationAction(ISD::BSWAP, (MVT::SimpleValueType)VT, Expand);
553
554 for (unsigned InnerVT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
555 InnerVT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++InnerVT)
556 setTruncStoreAction((MVT::SimpleValueType)VT,
557 (MVT::SimpleValueType)InnerVT, Expand);
558 setLoadExtAction(ISD::SEXTLOAD, (MVT::SimpleValueType)VT, Expand);
559 setLoadExtAction(ISD::ZEXTLOAD, (MVT::SimpleValueType)VT, Expand);
560 setLoadExtAction(ISD::EXTLOAD, (MVT::SimpleValueType)VT, Expand);
541 for (MVT VT : MVT::vector_valuetypes()) {
542 setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Expand);
543
544 setOperationAction(ISD::MULHS, VT, Expand);
545 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
546 setOperationAction(ISD::MULHU, VT, Expand);
547 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
548
549 setOperationAction(ISD::BSWAP, VT, Expand);
550
551 for (MVT InnerVT : MVT::vector_valuetypes())
552 setTruncStoreAction(VT, InnerVT, Expand);
553 setLoadExtAction(ISD::SEXTLOAD, VT, Expand);
554 setLoadExtAction(ISD::ZEXTLOAD, VT, Expand);
555 setLoadExtAction(ISD::EXTLOAD, VT, Expand);
561556 }
562557
563558 // AArch64 has implementations of a lot of rounding-like FP operations.
403403 addRegisterClass(MVT::f64, &ARM::DPRRegClass);
404404 }
405405
406 for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
407 VT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++VT) {
408 for (unsigned InnerVT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
409 InnerVT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++InnerVT)
410 setTruncStoreAction((MVT::SimpleValueType)VT,
411 (MVT::SimpleValueType)InnerVT, Expand);
412 setLoadExtAction(ISD::SEXTLOAD, (MVT::SimpleValueType)VT, Expand);
413 setLoadExtAction(ISD::ZEXTLOAD, (MVT::SimpleValueType)VT, Expand);
414 setLoadExtAction(ISD::EXTLOAD, (MVT::SimpleValueType)VT, Expand);
415
416 setOperationAction(ISD::MULHS, (MVT::SimpleValueType)VT, Expand);
417 setOperationAction(ISD::SMUL_LOHI, (MVT::SimpleValueType)VT, Expand);
418 setOperationAction(ISD::MULHU, (MVT::SimpleValueType)VT, Expand);
419 setOperationAction(ISD::UMUL_LOHI, (MVT::SimpleValueType)VT, Expand);
420
421 setOperationAction(ISD::BSWAP, (MVT::SimpleValueType)VT, Expand);
406 for (MVT VT : MVT::vector_valuetypes()) {
407 for (MVT InnerVT : MVT::vector_valuetypes())
408 setTruncStoreAction(VT, InnerVT, Expand);
409 setLoadExtAction(ISD::SEXTLOAD, VT, Expand);
410 setLoadExtAction(ISD::ZEXTLOAD, VT, Expand);
411 setLoadExtAction(ISD::EXTLOAD, VT, Expand);
412
413 setOperationAction(ISD::MULHS, VT, Expand);
414 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
415 setOperationAction(ISD::MULHU, VT, Expand);
416 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
417
418 setOperationAction(ISD::BSWAP, VT, Expand);
422419 }
423420
424421 setOperationAction(ISD::ConstantFP, MVT::f32, Custom);
92529249
92539250 // Find the largest store unit
92549251 MVT StoreType = MVT::i8;
9255 for (unsigned tp = MVT::FIRST_INTEGER_VALUETYPE;
9256 tp < MVT::LAST_INTEGER_VALUETYPE; ++tp) {
9257 MVT Tp = (MVT::SimpleValueType)tp;
9252 for (MVT Tp : MVT::integer_valuetypes()) {
92589253 if (TLI.isTypeLegal(Tp) && Tp.getSizeInBits() <= NumElems * ToEltSz)
92599254 StoreType = Tp;
92609255 }
4545
4646 if (Subtarget.hasDSP() || Subtarget.hasMSA()) {
4747 // Expand all truncating stores and extending loads.
48 unsigned FirstVT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
49 unsigned LastVT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
50
51 for (unsigned VT0 = FirstVT; VT0 <= LastVT; ++VT0) {
52 for (unsigned VT1 = FirstVT; VT1 <= LastVT; ++VT1)
53 setTruncStoreAction((MVT::SimpleValueType)VT0,
54 (MVT::SimpleValueType)VT1, Expand);
55
56 setLoadExtAction(ISD::SEXTLOAD, (MVT::SimpleValueType)VT0, Expand);
57 setLoadExtAction(ISD::ZEXTLOAD, (MVT::SimpleValueType)VT0, Expand);
58 setLoadExtAction(ISD::EXTLOAD, (MVT::SimpleValueType)VT0, Expand);
48 for (MVT VT0 : MVT::vector_valuetypes()) {
49 for (MVT VT1 : MVT::vector_valuetypes())
50 setTruncStoreAction(VT0, VT1, Expand);
51
52 setLoadExtAction(ISD::SEXTLOAD, VT0, Expand);
53 setLoadExtAction(ISD::ZEXTLOAD, VT0, Expand);
54 setLoadExtAction(ISD::EXTLOAD, VT0, Expand);
5955 }
6056 }
6157
231231 setOperationAction(ISD::ADDE, MVT::i64, Expand);
232232
233233 // Register custom handling for vector loads/stores
234 for (int i = MVT::FIRST_VECTOR_VALUETYPE; i <= MVT::LAST_VECTOR_VALUETYPE;
235 ++i) {
236 MVT VT = (MVT::SimpleValueType) i;
234 for (MVT VT : MVT::vector_valuetypes()) {
237235 if (IsPTXVectorType(VT)) {
238236 setOperationAction(ISD::LOAD, VT, Custom);
239237 setOperationAction(ISD::STORE, VT, Custom);
393393 if (Subtarget.hasAltivec()) {
394394 // First set operation action for all vector types to expand. Then we
395395 // will selectively turn on ones that can be effectively codegen'd.
396 for (unsigned i = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
397 i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) {
398 MVT::SimpleValueType VT = (MVT::SimpleValueType)i;
399
396 for (MVT VT : MVT::vector_valuetypes()) {
400397 // add/sub are legal for all supported vector VT's.
401398 setOperationAction(ISD::ADD , VT, Legal);
402399 setOperationAction(ISD::SUB , VT, Legal);
463460 setOperationAction(ISD::VSELECT, VT, Expand);
464461 setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Expand);
465462
466 for (unsigned j = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
467 j <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++j) {
468 MVT::SimpleValueType InnerVT = (MVT::SimpleValueType)j;
463 for (MVT InnerVT : MVT::vector_valuetypes())
469464 setTruncStoreAction(VT, InnerVT, Expand);
470 }
471465 setLoadExtAction(ISD::SEXTLOAD, VT, Expand);
472466 setLoadExtAction(ISD::ZEXTLOAD, VT, Expand);
473467 setLoadExtAction(ISD::EXTLOAD, VT, Expand);
800800 // First set operation action for all vector types to either promote
801801 // (for widening) or expand (for scalarization). Then we will selectively
802802 // turn on ones that can be effectively codegen'd.
803 for (int i = MVT::FIRST_VECTOR_VALUETYPE;
804 i <= MVT::LAST_VECTOR_VALUETYPE; ++i) {
805 MVT VT = (MVT::SimpleValueType)i;
803 for (MVT VT : MVT::vector_valuetypes()) {
806804 setOperationAction(ISD::ADD , VT, Expand);
807805 setOperationAction(ISD::SUB , VT, Expand);
808806 setOperationAction(ISD::FADD, VT, Expand);
871869 setOperationAction(ISD::ANY_EXTEND, VT, Expand);
872870 setOperationAction(ISD::VSELECT, VT, Expand);
873871 setOperationAction(ISD::SELECT_CC, VT, Expand);
874 for (int InnerVT = MVT::FIRST_VECTOR_VALUETYPE;
875 InnerVT <= MVT::LAST_VECTOR_VALUETYPE; ++InnerVT)
876 setTruncStoreAction(VT,
877 (MVT::SimpleValueType)InnerVT, Expand);
872 for (MVT InnerVT : MVT::vector_valuetypes())
873 setTruncStoreAction(VT, InnerVT, Expand);
878874 setLoadExtAction(ISD::SEXTLOAD, VT, Expand);
879875 setLoadExtAction(ISD::ZEXTLOAD, VT, Expand);
880876
13271323 setOperationAction(ISD::SRA, MVT::v8i32, Custom);
13281324
13291325 // Custom lower several nodes for 256-bit types.
1330 for (int i = MVT::FIRST_VECTOR_VALUETYPE;
1331 i <= MVT::LAST_VECTOR_VALUETYPE; ++i) {
1332 MVT VT = (MVT::SimpleValueType)i;
1333
1326 for (MVT VT : MVT::vector_valuetypes()) {
13341327 if (VT.getScalarSizeInBits() >= 32) {
13351328 setOperationAction(ISD::MLOAD, VT, Legal);
13361329 setOperationAction(ISD::MSTORE, VT, Legal);
15031496 }
15041497
15051498 // Custom lower several nodes.
1506 for (int i = MVT::FIRST_VECTOR_VALUETYPE;
1507 i <= MVT::LAST_VECTOR_VALUETYPE; ++i) {
1508 MVT VT = (MVT::SimpleValueType)i;
1509
1499 for (MVT VT : MVT::vector_valuetypes()) {
15101500 unsigned EltSize = VT.getVectorElementType().getSizeInBits();
15111501 // Extract subvector is special because the value type
15121502 // (result) is 256/128-bit but the source is 512-bit wide.
15951585
15961586 // SIGN_EXTEND_INREGs are evaluated by the extend type. Handle the expansion
15971587 // of this type with custom code.
1598 for (int VT = MVT::FIRST_VECTOR_VALUETYPE;
1599 VT != MVT::LAST_VECTOR_VALUETYPE; VT++) {
1600 setOperationAction(ISD::SIGN_EXTEND_INREG, (MVT::SimpleValueType)VT,
1601 Custom);
1602 }
1588 for (MVT VT : MVT::vector_valuetypes())
1589 setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Custom);
16031590
16041591 // We want to custom lower some of our intrinsics.
16051592 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
1600815995 // Attempt to load the original value using scalar loads.
1600915996 // Find the largest scalar type that divides the total loaded size.
1601015997 MVT SclrLoadTy = MVT::i8;
16011 for (unsigned tp = MVT::FIRST_INTEGER_VALUETYPE;
16012 tp < MVT::LAST_INTEGER_VALUETYPE; ++tp) {
16013 MVT Tp = (MVT::SimpleValueType)tp;
15998 for (MVT Tp : MVT::integer_valuetypes()) {
1601415999 if (TLI.isTypeLegal(Tp) && ((MemSz % Tp.getSizeInBits()) == 0)) {
1601516000 SclrLoadTy = Tp;
1601616001 }
2468824673
2468924674 // Find the largest store unit
2469024675 MVT StoreType = MVT::i8;
24691 for (unsigned tp = MVT::FIRST_INTEGER_VALUETYPE;
24692 tp < MVT::LAST_INTEGER_VALUETYPE; ++tp) {
24693 MVT Tp = (MVT::SimpleValueType)tp;
24676 for (MVT Tp : MVT::integer_valuetypes()) {
2469424677 if (TLI.isTypeLegal(Tp) && Tp.getSizeInBits() <= NumElems * ToSz)
2469524678 StoreType = Tp;
2469624679 }