llvm.org GIT mirror llvm / 8043ea3
AMDGPU/GlobalISel: Redo legality for build_vector It seems better to avoid using the callback if possible since there are coverage assertions which are disabled if this is used. Also fix missing tests. Only test the legal cases since it seems legalization for build_vector is quite lacking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349878 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 10 months ago
2 changed file(s) with 623 addition(s) and 10 deletion(s). Raw diff Collapse all Expand all
3232 };
3333
3434 const LLT S1 = LLT::scalar(1);
35 const LLT V2S16 = LLT::vector(2, 16);
36 const LLT V2S32 = LLT::vector(2, 32);
37
3835 const LLT S32 = LLT::scalar(32);
3936 const LLT S64 = LLT::scalar(64);
4037 const LLT S512 = LLT::scalar(512);
38
39 const LLT V2S16 = LLT::vector(2, 16);
40
41 const LLT V2S32 = LLT::vector(2, 32);
42 const LLT V3S32 = LLT::vector(3, 32);
43 const LLT V4S32 = LLT::vector(4, 32);
44 const LLT V5S32 = LLT::vector(5, 32);
45 const LLT V6S32 = LLT::vector(6, 32);
46 const LLT V7S32 = LLT::vector(7, 32);
47 const LLT V8S32 = LLT::vector(8, 32);
48 const LLT V9S32 = LLT::vector(9, 32);
49 const LLT V10S32 = LLT::vector(10, 32);
50 const LLT V11S32 = LLT::vector(11, 32);
51 const LLT V12S32 = LLT::vector(12, 32);
52 const LLT V13S32 = LLT::vector(13, 32);
53 const LLT V14S32 = LLT::vector(14, 32);
54 const LLT V15S32 = LLT::vector(15, 32);
55 const LLT V16S32 = LLT::vector(16, 32);
56
57 const LLT V2S64 = LLT::vector(2, 64);
58 const LLT V3S64 = LLT::vector(3, 64);
59 const LLT V4S64 = LLT::vector(4, 64);
60 const LLT V5S64 = LLT::vector(5, 64);
61 const LLT V6S64 = LLT::vector(6, 64);
62 const LLT V7S64 = LLT::vector(7, 64);
63 const LLT V8S64 = LLT::vector(8, 64);
64
65 std::initializer_list AllS32Vectors =
66 {V2S32, V3S32, V4S32, V5S32, V6S32, V7S32, V8S32,
67 V9S32, V10S32, V11S32, V12S32, V13S32, V14S32, V15S32, V16S32};
68 std::initializer_list AllS64Vectors =
69 {V2S64, V3S64, V4S64, V5S64, V6S64, V7S64, V8S64};
4170
4271 const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS);
4372 const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS);
230259 });
231260
232261 getActionDefinitionsBuilder(G_BUILD_VECTOR)
233 .legalIf([=](const LegalityQuery &Query) {
234 const LLT &VecTy = Query.Types[0];
235 const LLT &ScalarTy = Query.Types[1];
236 return VecTy.getSizeInBits() % 32 == 0 &&
237 ScalarTy.getSizeInBits() % 32 == 0 &&
238 VecTy.getSizeInBits() <= 512;
239 });
262 .legalForCartesianProduct(AllS32Vectors, {S32})
263 .legalForCartesianProduct(AllS64Vectors, {S64})
264 .clampNumElements(0, V16S32, V16S32)
265 .clampNumElements(0, V2S64, V8S64)
266 .minScalarSameAs(1, 0);
267
240268 // Merge/Unmerge
241269 for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
242270 unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
0 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
1 # RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -run-pass=legalizer %s -o - | FileCheck %s
2
3 ---
4 name: legal_v2s32
5 body: |
6 bb.0:
7 liveins: $vgpr0, $vgpr1
8 ; CHECK-LABEL: name: legal_v2s32
9 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
10 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
11 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32)
12 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s32>)
13 %0:_(s32) = COPY $vgpr0
14 %1:_(s32) = COPY $vgpr1
15 %2:_(<2 x s32>) = G_BUILD_VECTOR %0, %1
16 S_NOP 0, implicit %2
17 ...
18 ---
19 name: legal_v3s32
20 body: |
21 bb.0:
22 liveins: $vgpr0, $vgpr1, $vgpr2
23 ; CHECK-LABEL: name: legal_v3s32
24 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
25 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
26 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
27 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32)
28 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s32>)
29 %0:_(s32) = COPY $vgpr0
30 %1:_(s32) = COPY $vgpr1
31 %2:_(s32) = COPY $vgpr2
32 %3:_(<3 x s32>) = G_BUILD_VECTOR %0, %1, %2
33 S_NOP 0, implicit %3
34 ...
35 ---
36 name: legal_v4s32
37 body: |
38 bb.0:
39 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
40 ; CHECK-LABEL: name: legal_v4s32
41 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
42 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
43 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
44 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
45 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32)
46 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<4 x s32>)
47 %0:_(s32) = COPY $vgpr0
48 %1:_(s32) = COPY $vgpr1
49 %2:_(s32) = COPY $vgpr2
50 %3:_(s32) = COPY $vgpr3
51 %4:_(<4 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3
52 S_NOP 0, implicit %4
53 ...
54 ---
55 name: legal_v5s32
56 body: |
57 bb.0:
58 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
59 ; CHECK-LABEL: name: legal_v5s32
60 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
61 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
62 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
63 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
64 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
65 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32)
66 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<5 x s32>)
67 %0:_(s32) = COPY $vgpr0
68 %1:_(s32) = COPY $vgpr1
69 %2:_(s32) = COPY $vgpr2
70 %3:_(s32) = COPY $vgpr3
71 %4:_(s32) = COPY $vgpr4
72 %5:_(<5 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4
73 S_NOP 0, implicit %5
74 ...
75 ---
76 name: legal_v6s32
77 body: |
78 bb.0:
79 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
80 ; CHECK-LABEL: name: legal_v6s32
81 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
82 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
83 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
84 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
85 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
86 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
87 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<6 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32)
88 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<6 x s32>)
89 %0:_(s32) = COPY $vgpr0
90 %1:_(s32) = COPY $vgpr1
91 %2:_(s32) = COPY $vgpr2
92 %3:_(s32) = COPY $vgpr3
93 %4:_(s32) = COPY $vgpr4
94 %5:_(s32) = COPY $vgpr5
95 %6:_(<6 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5
96 S_NOP 0, implicit %6
97 ...
98 ---
99 name: legal_v7s32
100 body: |
101 bb.0:
102 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6
103 ; CHECK-LABEL: name: legal_v7s32
104 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
105 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
106 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
107 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
108 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
109 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
110 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
111 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<7 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32)
112 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<7 x s32>)
113 %0:_(s32) = COPY $vgpr0
114 %1:_(s32) = COPY $vgpr1
115 %2:_(s32) = COPY $vgpr2
116 %3:_(s32) = COPY $vgpr3
117 %4:_(s32) = COPY $vgpr4
118 %5:_(s32) = COPY $vgpr5
119 %6:_(s32) = COPY $vgpr6
120 %7:_(<7 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6
121 S_NOP 0, implicit %7
122 ...
123 ---
124 name: legal_v8s32
125 body: |
126 bb.0:
127 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
128 ; CHECK-LABEL: name: legal_v8s32
129 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
130 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
131 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
132 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
133 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
134 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
135 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
136 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
137 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
138 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<8 x s32>)
139 %0:_(s32) = COPY $vgpr0
140 %1:_(s32) = COPY $vgpr1
141 %2:_(s32) = COPY $vgpr2
142 %3:_(s32) = COPY $vgpr3
143 %4:_(s32) = COPY $vgpr4
144 %5:_(s32) = COPY $vgpr5
145 %6:_(s32) = COPY $vgpr6
146 %7:_(s32) = COPY $vgpr7
147 %8:_(<8 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6, %7
148 S_NOP 0, implicit %8
149 ...
150 ---
151 name: legal_v9s32
152 body: |
153 bb.0:
154 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8
155 ; CHECK-LABEL: name: legal_v9s32
156 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
157 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
158 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
159 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
160 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
161 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
162 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
163 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
164 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
165 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32)
166 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<9 x s32>)
167 %0:_(s32) = COPY $vgpr0
168 %1:_(s32) = COPY $vgpr1
169 %2:_(s32) = COPY $vgpr2
170 %3:_(s32) = COPY $vgpr3
171 %4:_(s32) = COPY $vgpr4
172 %5:_(s32) = COPY $vgpr5
173 %6:_(s32) = COPY $vgpr6
174 %7:_(s32) = COPY $vgpr7
175 %8:_(s32) = COPY $vgpr8
176 %9:_(<9 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6, %7, %8
177 S_NOP 0, implicit %9
178 ...
179 ---
180 name: legal_v10s32
181 body: |
182 bb.0:
183 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
184 ; CHECK-LABEL: name: legal_v10s32
185 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
186 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
187 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
188 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
189 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
190 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
191 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
192 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
193 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
194 ; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
195 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<10 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32)
196 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<10 x s32>)
197 %0:_(s32) = COPY $vgpr0
198 %1:_(s32) = COPY $vgpr1
199 %2:_(s32) = COPY $vgpr2
200 %3:_(s32) = COPY $vgpr3
201 %4:_(s32) = COPY $vgpr4
202 %5:_(s32) = COPY $vgpr5
203 %6:_(s32) = COPY $vgpr6
204 %7:_(s32) = COPY $vgpr7
205 %8:_(s32) = COPY $vgpr8
206 %9:_(s32) = COPY $vgpr9
207 %10:_(<10 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6, %7, %8, %9
208 S_NOP 0, implicit %10
209 ...
210 ---
211 name: legal_v11s32
212 body: |
213 bb.0:
214 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10
215 ; CHECK-LABEL: name: legal_v11s32
216 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
217 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
218 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
219 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
220 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
221 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
222 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
223 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
224 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
225 ; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
226 ; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
227 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<11 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32)
228 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<11 x s32>)
229 %0:_(s32) = COPY $vgpr0
230 %1:_(s32) = COPY $vgpr1
231 %2:_(s32) = COPY $vgpr2
232 %3:_(s32) = COPY $vgpr3
233 %4:_(s32) = COPY $vgpr4
234 %5:_(s32) = COPY $vgpr5
235 %6:_(s32) = COPY $vgpr6
236 %7:_(s32) = COPY $vgpr7
237 %8:_(s32) = COPY $vgpr8
238 %9:_(s32) = COPY $vgpr9
239 %10:_(s32) = COPY $vgpr10
240 %11:_(<11 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6, %7, %8, %9, %10
241 S_NOP 0, implicit %11
242 ...
243 ---
244 name: legal_v12s32
245 body: |
246 bb.0:
247 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11
248 ; CHECK-LABEL: name: legal_v12s32
249 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
250 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
251 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
252 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
253 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
254 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
255 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
256 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
257 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
258 ; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
259 ; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
260 ; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
261 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<12 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)
262 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<12 x s32>)
263 %0:_(s32) = COPY $vgpr0
264 %1:_(s32) = COPY $vgpr1
265 %2:_(s32) = COPY $vgpr2
266 %3:_(s32) = COPY $vgpr3
267 %4:_(s32) = COPY $vgpr4
268 %5:_(s32) = COPY $vgpr5
269 %6:_(s32) = COPY $vgpr6
270 %7:_(s32) = COPY $vgpr7
271 %8:_(s32) = COPY $vgpr8
272 %9:_(s32) = COPY $vgpr9
273 %10:_(s32) = COPY $vgpr10
274 %11:_(s32) = COPY $vgpr11
275 %12:_(<12 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11
276 S_NOP 0, implicit %12
277 ...
278 ---
279 name: legal_v13s32
280 body: |
281 bb.0:
282 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12
283 ; CHECK-LABEL: name: legal_v13s32
284 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
285 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
286 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
287 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
288 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
289 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
290 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
291 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
292 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
293 ; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
294 ; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
295 ; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
296 ; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
297 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<13 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32)
298 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<13 x s32>)
299 %0:_(s32) = COPY $vgpr0
300 %1:_(s32) = COPY $vgpr1
301 %2:_(s32) = COPY $vgpr2
302 %3:_(s32) = COPY $vgpr3
303 %4:_(s32) = COPY $vgpr4
304 %5:_(s32) = COPY $vgpr5
305 %6:_(s32) = COPY $vgpr6
306 %7:_(s32) = COPY $vgpr7
307 %8:_(s32) = COPY $vgpr8
308 %9:_(s32) = COPY $vgpr9
309 %10:_(s32) = COPY $vgpr10
310 %11:_(s32) = COPY $vgpr11
311 %12:_(s32) = COPY $vgpr12
312 %13:_(<13 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12
313 S_NOP 0, implicit %13
314 ...
315 ---
316 name: legal_v14s32
317 body: |
318 bb.0:
319 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13
320 ; CHECK-LABEL: name: legal_v14s32
321 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
322 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
323 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
324 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
325 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
326 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
327 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
328 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
329 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
330 ; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
331 ; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
332 ; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
333 ; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
334 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
335 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<14 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32)
336 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<14 x s32>)
337 %0:_(s32) = COPY $vgpr0
338 %1:_(s32) = COPY $vgpr1
339 %2:_(s32) = COPY $vgpr2
340 %3:_(s32) = COPY $vgpr3
341 %4:_(s32) = COPY $vgpr4
342 %5:_(s32) = COPY $vgpr5
343 %6:_(s32) = COPY $vgpr6
344 %7:_(s32) = COPY $vgpr7
345 %8:_(s32) = COPY $vgpr8
346 %9:_(s32) = COPY $vgpr9
347 %10:_(s32) = COPY $vgpr10
348 %11:_(s32) = COPY $vgpr11
349 %12:_(s32) = COPY $vgpr12
350 %13:_(s32) = COPY $vgpr13
351 %14:_(<14 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12, %13
352 S_NOP 0, implicit %14
353 ...
354 ---
355 name: legal_v15s32
356 body: |
357 bb.0:
358 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14
359 ; CHECK-LABEL: name: legal_v15s32
360 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
361 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
362 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
363 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
364 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
365 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
366 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
367 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
368 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
369 ; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
370 ; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
371 ; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
372 ; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
373 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
374 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
375 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32)
376 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<15 x s32>)
377 %0:_(s32) = COPY $vgpr0
378 %1:_(s32) = COPY $vgpr1
379 %2:_(s32) = COPY $vgpr2
380 %3:_(s32) = COPY $vgpr3
381 %4:_(s32) = COPY $vgpr4
382 %5:_(s32) = COPY $vgpr5
383 %6:_(s32) = COPY $vgpr6
384 %7:_(s32) = COPY $vgpr7
385 %8:_(s32) = COPY $vgpr8
386 %9:_(s32) = COPY $vgpr9
387 %10:_(s32) = COPY $vgpr10
388 %11:_(s32) = COPY $vgpr11
389 %12:_(s32) = COPY $vgpr12
390 %13:_(s32) = COPY $vgpr13
391 %14:_(s32) = COPY $vgpr14
392 %15:_(<15 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12, %13, %14
393 S_NOP 0, implicit %15
394 ...
395 ---
396 name: legal_v16s32
397 body: |
398 bb.0:
399 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
400 ; CHECK-LABEL: name: legal_v16s32
401 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
402 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
403 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
404 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
405 ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
406 ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
407 ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
408 ; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
409 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
410 ; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
411 ; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
412 ; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
413 ; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
414 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
415 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
416 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
417 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32)
418 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<16 x s32>)
419 %0:_(s32) = COPY $vgpr0
420 %1:_(s32) = COPY $vgpr1
421 %2:_(s32) = COPY $vgpr2
422 %3:_(s32) = COPY $vgpr3
423 %4:_(s32) = COPY $vgpr4
424 %5:_(s32) = COPY $vgpr5
425 %6:_(s32) = COPY $vgpr6
426 %7:_(s32) = COPY $vgpr7
427 %8:_(s32) = COPY $vgpr8
428 %9:_(s32) = COPY $vgpr9
429 %10:_(s32) = COPY $vgpr10
430 %11:_(s32) = COPY $vgpr11
431 %12:_(s32) = COPY $vgpr12
432 %13:_(s32) = COPY $vgpr13
433 %14:_(s32) = COPY $vgpr14
434 %15:_(s32) = COPY $vgpr15
435 %16:_(<16 x s32>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12, %13, %14, %15
436 S_NOP 0, implicit %16
437 ...
438 ---
439 name: legal_v2s64
440 body: |
441 bb.0:
442 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
443 ; CHECK-LABEL: name: legal_v2s64
444 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
445 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
446 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64)
447 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s64>)
448 %0:_(s64) = COPY $vgpr0_vgpr1
449 %1:_(s64) = COPY $vgpr2_vgpr3
450 %2:_(<2 x s64>) = G_BUILD_VECTOR %0, %1
451 S_NOP 0, implicit %2
452 ...
453 ---
454 name: legal_v3s64
455 body: |
456 bb.0:
457 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
458 ; CHECK-LABEL: name: legal_v3s64
459 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
460 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
461 ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
462 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64)
463 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s64>)
464 %0:_(s64) = COPY $vgpr0_vgpr1
465 %1:_(s64) = COPY $vgpr2_vgpr3
466 %2:_(s64) = COPY $vgpr4_vgpr5
467 %3:_(<3 x s64>) = G_BUILD_VECTOR %0, %1, %2
468 S_NOP 0, implicit %3
469 ...
470 ---
471 name: legal_v4s64
472 body: |
473 bb.0:
474 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7
475 ; CHECK-LABEL: name: legal_v4s64
476 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
477 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
478 ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
479 ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY $vgpr6_vgpr7
480 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64), [[COPY3]](s64)
481 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<4 x s64>)
482 %0:_(s64) = COPY $vgpr0_vgpr1
483 %1:_(s64) = COPY $vgpr2_vgpr3
484 %2:_(s64) = COPY $vgpr4_vgpr5
485 %3:_(s64) = COPY $vgpr6_vgpr7
486 %4:_(<4 x s64>) = G_BUILD_VECTOR %0, %1, %2, %3
487 S_NOP 0, implicit %4
488 ...
489 ---
490 name: legal_v5s64
491 body: |
492 bb.0:
493 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7, $vgpr8_vgpr9
494 ; CHECK-LABEL: name: legal_v5s64
495 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
496 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
497 ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
498 ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY $vgpr6_vgpr7
499 ; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY $vgpr8_vgpr9
500 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64), [[COPY3]](s64), [[COPY4]](s64)
501 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<5 x s64>)
502 %0:_(s64) = COPY $vgpr0_vgpr1
503 %1:_(s64) = COPY $vgpr2_vgpr3
504 %2:_(s64) = COPY $vgpr4_vgpr5
505 %3:_(s64) = COPY $vgpr6_vgpr7
506 %4:_(s64) = COPY $vgpr8_vgpr9
507 %5:_(<5 x s64>) = G_BUILD_VECTOR %0, %1, %2, %3, %4
508 S_NOP 0, implicit %5
509 ...
510 ---
511 name: legal_v6s64
512 body: |
513 bb.0:
514 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7, $vgpr8_vgpr9, $vgpr10_vgpr11
515 ; CHECK-LABEL: name: legal_v6s64
516 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
517 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
518 ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
519 ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY $vgpr6_vgpr7
520 ; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY $vgpr8_vgpr9
521 ; CHECK: [[COPY5:%[0-9]+]]:_(s64) = COPY $vgpr10_vgpr11
522 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<6 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64), [[COPY3]](s64), [[COPY4]](s64), [[COPY5]](s64)
523 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<6 x s64>)
524 %0:_(s64) = COPY $vgpr0_vgpr1
525 %1:_(s64) = COPY $vgpr2_vgpr3
526 %2:_(s64) = COPY $vgpr4_vgpr5
527 %3:_(s64) = COPY $vgpr6_vgpr7
528 %4:_(s64) = COPY $vgpr8_vgpr9
529 %5:_(s64) = COPY $vgpr10_vgpr11
530 %6:_(<6 x s64>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5
531 S_NOP 0, implicit %6
532 ...
533 ---
534 name: legal_v7s64
535 body: |
536 bb.0:
537 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7, $vgpr8_vgpr9, $vgpr10_vgpr11, $vgpr12_vgpr13
538 ; CHECK-LABEL: name: legal_v7s64
539 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
540 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
541 ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
542 ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY $vgpr6_vgpr7
543 ; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY $vgpr8_vgpr9
544 ; CHECK: [[COPY5:%[0-9]+]]:_(s64) = COPY $vgpr10_vgpr11
545 ; CHECK: [[COPY6:%[0-9]+]]:_(s64) = COPY $vgpr12_vgpr13
546 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<7 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64), [[COPY3]](s64), [[COPY4]](s64), [[COPY5]](s64), [[COPY6]](s64)
547 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<7 x s64>)
548 %0:_(s64) = COPY $vgpr0_vgpr1
549 %1:_(s64) = COPY $vgpr2_vgpr3
550 %2:_(s64) = COPY $vgpr4_vgpr5
551 %3:_(s64) = COPY $vgpr6_vgpr7
552 %4:_(s64) = COPY $vgpr8_vgpr9
553 %5:_(s64) = COPY $vgpr10_vgpr11
554 %6:_(s64) = COPY $vgpr12_vgpr13
555 %7:_(<7 x s64>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6
556 S_NOP 0, implicit %7
557 ...
558 ---
559 name: legal_v8s64
560 body: |
561 bb.0:
562 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7, $vgpr8_vgpr9, $vgpr10_vgpr11, $vgpr12_vgpr13, $vgpr14_vgpr15
563 ; CHECK-LABEL: name: legal_v8s64
564 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
565 ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
566 ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5
567 ; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY $vgpr6_vgpr7
568 ; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY $vgpr8_vgpr9
569 ; CHECK: [[COPY5:%[0-9]+]]:_(s64) = COPY $vgpr10_vgpr11
570 ; CHECK: [[COPY6:%[0-9]+]]:_(s64) = COPY $vgpr12_vgpr13
571 ; CHECK: [[COPY7:%[0-9]+]]:_(s64) = COPY $vgpr14_vgpr15
572 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64), [[COPY2]](s64), [[COPY3]](s64), [[COPY4]](s64), [[COPY5]](s64), [[COPY6]](s64), [[COPY7]](s64)
573 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<8 x s64>)
574 %0:_(s64) = COPY $vgpr0_vgpr1
575 %1:_(s64) = COPY $vgpr2_vgpr3
576 %2:_(s64) = COPY $vgpr4_vgpr5
577 %3:_(s64) = COPY $vgpr6_vgpr7
578 %4:_(s64) = COPY $vgpr8_vgpr9
579 %5:_(s64) = COPY $vgpr10_vgpr11
580 %6:_(s64) = COPY $vgpr12_vgpr13
581 %7:_(s64) = COPY $vgpr14_vgpr15
582 %8:_(<8 x s64>) = G_BUILD_VECTOR %0, %1, %2, %3, %4, %5, %6, %7
583 S_NOP 0, implicit %8
584 ...