llvm.org GIT mirror llvm / 7dd95ec
[X86][SSE] Merged ALIGNR/SLLDQ/SRLDQ shuffle decode comments. NFC. Now that we can recognise different vector sizes - will make future AVX512 additions easier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253266 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 4 years ago
1 changed file(s) with 14 addition(s) and 40 deletion(s). Raw diff Collapse all Expand all
362362
363363 case X86::PSLLDQri:
364364 case X86::VPSLLDQri:
365 Src1Name = getRegName(MI->getOperand(1).getReg());
366 DestName = getRegName(MI->getOperand(0).getReg());
367 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
368 DecodePSLLDQMask(MVT::v16i8,
365 case X86::VPSLLDQYri:
366 Src1Name = getRegName(MI->getOperand(1).getReg());
367 DestName = getRegName(MI->getOperand(0).getReg());
368 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
369 DecodePSLLDQMask(getRegOperandVectorVT(MI, MVT::i8, 0),
369370 MI->getOperand(MI->getNumOperands() - 1).getImm(),
370371 ShuffleMask);
371372 break;
372373
373 case X86::VPSLLDQYri:
374 Src1Name = getRegName(MI->getOperand(1).getReg());
375 DestName = getRegName(MI->getOperand(0).getReg());
376 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
377 DecodePSLLDQMask(MVT::v32i8,
374 case X86::PSRLDQri:
375 case X86::VPSRLDQri:
376 case X86::VPSRLDQYri:
377 Src1Name = getRegName(MI->getOperand(1).getReg());
378 DestName = getRegName(MI->getOperand(0).getReg());
379 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
380 DecodePSRLDQMask(getRegOperandVectorVT(MI, MVT::i8, 0),
378381 MI->getOperand(MI->getNumOperands() - 1).getImm(),
379382 ShuffleMask);
380383 break;
381384
382 case X86::PSRLDQri:
383 case X86::VPSRLDQri:
384 Src1Name = getRegName(MI->getOperand(1).getReg());
385 DestName = getRegName(MI->getOperand(0).getReg());
386 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
387 DecodePSRLDQMask(MVT::v16i8,
388 MI->getOperand(MI->getNumOperands() - 1).getImm(),
389 ShuffleMask);
390 break;
391
392 case X86::VPSRLDQYri:
393 Src1Name = getRegName(MI->getOperand(1).getReg());
394 DestName = getRegName(MI->getOperand(0).getReg());
395 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
396 DecodePSRLDQMask(MVT::v32i8,
397 MI->getOperand(MI->getNumOperands() - 1).getImm(),
398 ShuffleMask);
399 break;
400
401385 case X86::PALIGNR128rr:
402386 case X86::VPALIGNR128rr:
387 case X86::VPALIGNR256rr:
403388 Src1Name = getRegName(MI->getOperand(2).getReg());
404389 // FALL THROUGH.
405390 case X86::PALIGNR128rm:
406391 case X86::VPALIGNR128rm:
407 Src2Name = getRegName(MI->getOperand(1).getReg());
408 DestName = getRegName(MI->getOperand(0).getReg());
409 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
410 DecodePALIGNRMask(MVT::v16i8,
411 MI->getOperand(MI->getNumOperands() - 1).getImm(),
412 ShuffleMask);
413 break;
414
415 case X86::VPALIGNR256rr:
416 Src1Name = getRegName(MI->getOperand(2).getReg());
417 // FALL THROUGH.
418392 case X86::VPALIGNR256rm:
419393 Src2Name = getRegName(MI->getOperand(1).getReg());
420394 DestName = getRegName(MI->getOperand(0).getReg());
421395 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
422 DecodePALIGNRMask(MVT::v32i8,
396 DecodePALIGNRMask(getRegOperandVectorVT(MI, MVT::i8, 0),
423397 MI->getOperand(MI->getNumOperands() - 1).getImm(),
424398 ShuffleMask);
425399 break;