llvm.org GIT mirror llvm / 7c3e057
Intrinsics: add LLVMHalfElementsVectorType constraint This is like the LLVMMatchType, except the verifier checks that the second argument is a vector with the same base type and half the number of elements. This will be used by the ARM64 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205079 91177308-0d34-0410-b5e6-96231b3b80d8 Tim Northover 6 years ago
6 changed file(s) with 48 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
399399 return VectorType::get(EltTy, VTy->getNumElements());
400400 }
401401
402 /// VectorType::getHalfElementsVectorType - This static method returns
403 /// a VectorType with half as many elements as the input type and the
404 /// same element type.
405 ///
406 static VectorType *getHalfElementsVectorType(VectorType *VTy) {
407 unsigned NumElts = VTy->getNumElements();
408 assert ((NumElts & 1) == 0 &&
409 "Cannot halve vector with odd number of elements.");
410 return VectorType::get(VTy->getElementType(), NumElts/2);
411 }
412
413 /// VectorType::getDoubleElementsVectorType - This static method returns
414 /// a VectorType with twice as many elements as the input type and the
415 /// same element type.
416 ///
417 static VectorType *getDoubleElementsVectorType(VectorType *VTy) {
418 unsigned NumElts = VTy->getNumElements();
419 return VectorType::get(VTy->getElementType(), NumElts*2);
420 }
421
402422 /// isValidElementType - Return true if the specified type is valid as a
403423 /// element type.
404424 static bool isValidElementType(Type *ElemTy);
7878 enum IITDescriptorKind {
7979 Void, VarArg, MMX, Metadata, Half, Float, Double,
8080 Integer, Vector, Pointer, Struct,
81 Argument, ExtendArgument, TruncArgument,
81 Argument, ExtendArgument, TruncArgument, HalfVecArgument
8282 } Kind;
8383
8484 union {
9898 };
9999 unsigned getArgumentNumber() const {
100100 assert(Kind == Argument || Kind == ExtendArgument ||
101 Kind == TruncArgument);
101 Kind == TruncArgument || Kind == HalfVecArgument);
102102 return Argument_Info >> 2;
103103 }
104104 ArgKind getArgumentKind() const {
105105 assert(Kind == Argument || Kind == ExtendArgument ||
106 Kind == TruncArgument);
106 Kind == TruncArgument || Kind == HalfVecArgument);
107107 return (ArgKind)(Argument_Info&3);
108108 }
109109
111111 // the intrinsic is overloaded, so the matched type should be declared as iAny.
112112 class LLVMExtendedType : LLVMMatchType;
113113 class LLVMTruncatedType : LLVMMatchType;
114
115 // Match the type of another intrinsic parameter that is expected to be a
116 // vector type, but change the element count to be half as many
117 class LLVMHalfElementsVectorType : LLVMMatchType;
114118
115119 def llvm_void_ty : LLVMType;
116120 def llvm_anyint_ty : LLVMType;
469469 IIT_TRUNC_ARG = 24,
470470 IIT_ANYPTR = 25,
471471 IIT_V1 = 26,
472 IIT_VARARG = 27
472 IIT_VARARG = 27,
473 IIT_HALF_VEC_ARG = 28
473474 };
474475
475476
564565 case IIT_TRUNC_ARG: {
565566 unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]);
566567 OutputTable.push_back(IITDescriptor::get(IITDescriptor::TruncArgument,
568 ArgInfo));
569 return;
570 }
571 case IIT_HALF_VEC_ARG: {
572 unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]);
573 OutputTable.push_back(IITDescriptor::get(IITDescriptor::HalfVecArgument,
567574 ArgInfo));
568575 return;
569576 }
671678 assert(ITy->getBitWidth() % 2 == 0);
672679 return IntegerType::get(Context, ITy->getBitWidth() / 2);
673680 }
681 case IITDescriptor::HalfVecArgument:
682 return VectorType::getHalfElementsVectorType(cast(
683 Tys[D.getArgumentNumber()]));
674684 }
675685 llvm_unreachable("unhandled");
676686 }
22052205
22062206 return Ty != NewTy;
22072207 }
2208 case IITDescriptor::HalfVecArgument:
2209 // This may only be used when referring to a previous vector argument.
2210 return D.getArgumentNumber() >= ArgTys.size() ||
2211 !isa(ArgTys[D.getArgumentNumber()]) ||
2212 VectorType::getHalfElementsVectorType(
2213 cast(ArgTys[D.getArgumentNumber()])) != Ty;
22082214 }
22092215 llvm_unreachable("unhandled");
22102216 }
249249 IIT_TRUNC_ARG = 24,
250250 IIT_ANYPTR = 25,
251251 IIT_V1 = 26,
252 IIT_VARARG = 27
252 IIT_VARARG = 27,
253 IIT_HALF_VEC_ARG = 28
253254 };
254255
255256
295296 Sig.push_back(IIT_EXTEND_ARG);
296297 else if (R->isSubClassOf("LLVMTruncatedType"))
297298 Sig.push_back(IIT_TRUNC_ARG);
299 else if (R->isSubClassOf("LLVMHalfElementsVectorType"))
300 Sig.push_back(IIT_HALF_VEC_ARG);
298301 else
299302 Sig.push_back(IIT_ARG);
300303 return Sig.push_back((Number << 2) | ArgCodes[Number]);