llvm.org GIT mirror llvm / 7c0b3c1
Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153863 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 8 years ago
15 changed file(s) with 12 addition(s) and 74 deletion(s). Raw diff Collapse all Expand all
1717 #include "llvm/MC/MCInst.h"
1818 #include "llvm/MC/MCAsmInfo.h"
1919 #include "llvm/MC/MCExpr.h"
20 #include "llvm/MC/MCInstrInfo.h"
2021 #include "llvm/MC/MCRegisterInfo.h"
2122 #include "llvm/Support/raw_ostream.h"
2223 using namespace llvm;
2324
24 #define GET_INSTRUCTION_NAME
2525 #include "ARMGenAsmWriter.inc"
2626
2727 /// translateShiftImm - Convert shift immediate from 0-31 to 1-32 for printing.
4444 }
4545
4646 StringRef ARMInstPrinter::getOpcodeName(unsigned Opcode) const {
47 return getInstructionName(Opcode);
47 return MII.getName(Opcode);
4848 }
4949
5050 void ARMInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
2828 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
2929 virtual StringRef getOpcodeName(unsigned Opcode) const;
3030 virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
31
32 static const char *getInstructionName(unsigned Opcode);
3331
3432 // Autogenerated by tblgen.
3533 void printInstruction(const MCInst *MI, raw_ostream &O);
2929 // Autogenerated by tblgen.
3030 void printInstruction(const MCInst *MI, raw_ostream &O);
3131 static const char *getRegisterName(unsigned RegNo);
32 static const char *getInstructionName(unsigned Opcode);
3332
3433 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
3534 const char *Modifier = 0);
1515 #include "llvm/ADT/StringExtras.h"
1616 #include "llvm/MC/MCExpr.h"
1717 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCInstrInfo.h"
1819 #include "llvm/MC/MCSymbol.h"
1920 #include "llvm/Support/ErrorHandling.h"
2021 #include "llvm/Support/raw_ostream.h"
2122 using namespace llvm;
2223
23 #define GET_INSTRUCTION_NAME
2424 #include "MipsGenAsmWriter.inc"
2525
2626 const char* Mips::MipsFCCToString(Mips::CondCode CC) {
6262 }
6363
6464 StringRef MipsInstPrinter::getOpcodeName(unsigned Opcode) const {
65 return getInstructionName(Opcode);
65 return MII.getName(Opcode);
6666 }
6767
6868 void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
8282
8383 // Autogenerated by tblgen.
8484 void printInstruction(const MCInst *MI, raw_ostream &O);
85 static const char *getInstructionName(unsigned Opcode);
8685 static const char *getRegisterName(unsigned RegNo);
8786
8887 virtual StringRef getOpcodeName(unsigned Opcode) const;
1717 #include "llvm/MC/MCExpr.h"
1818 #include "llvm/MC/MCInst.h"
1919 #include "llvm/MC/MCSymbol.h"
20 #include "llvm/MC/MCInstrInfo.h"
2021 #include "llvm/ADT/APFloat.h"
2122 #include "llvm/ADT/StringExtras.h"
2223 #include "llvm/Support/ErrorHandling.h"
2324 #include "llvm/Support/raw_ostream.h"
2425 using namespace llvm;
2526
26 #define GET_INSTRUCTION_NAME
2727 #include "PTXGenAsmWriter.inc"
2828
2929 PTXInstPrinter::PTXInstPrinter(const MCAsmInfo &MAI,
3636 }
3737
3838 StringRef PTXInstPrinter::getOpcodeName(unsigned Opcode) const {
39 return getInstructionName(Opcode);
39 return MII.getName(Opcode);
4040 }
4141
4242 void PTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
2929 virtual StringRef getOpcodeName(unsigned Opcode) const;
3030 virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
3131
32 static const char *getInstructionName(unsigned Opcode);
33
3432 // Autogenerated by tblgen.
3533 void printInstruction(const MCInst *MI, raw_ostream &O);
3634 static const char *getRegisterName(unsigned RegNo);
1616 #include "MCTargetDesc/PPCPredicates.h"
1717 #include "llvm/MC/MCExpr.h"
1818 #include "llvm/MC/MCInst.h"
19 #include "llvm/MC/MCInstrInfo.h"
1920 #include "llvm/Support/raw_ostream.h"
2021 using namespace llvm;
2122
22 #define GET_INSTRUCTION_NAME
2323 #include "PPCGenAsmWriter.inc"
2424
2525 StringRef PPCInstPrinter::getOpcodeName(unsigned Opcode) const {
26 return getInstructionName(Opcode);
26 return MII.getName(Opcode);
2727 }
2828
2929 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
3535 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
3636 virtual StringRef getOpcodeName(unsigned Opcode) const;
3737
38 static const char *getInstructionName(unsigned Opcode);
39
4038 // Autogenerated by tblgen.
4139 void printInstruction(const MCInst *MI, raw_ostream &O);
4240 static const char *getRegisterName(unsigned RegNo);
1818 #include "llvm/MC/MCInst.h"
1919 #include "llvm/MC/MCAsmInfo.h"
2020 #include "llvm/MC/MCExpr.h"
21 #include "llvm/MC/MCInstrInfo.h"
2122 #include "llvm/MC/MCRegisterInfo.h"
2223 #include "llvm/Support/ErrorHandling.h"
2324 #include "llvm/Support/Format.h"
2627 using namespace llvm;
2728
2829 // Include the auto-generated portion of the assembly writer.
29 #define GET_INSTRUCTION_NAME
3030 #define PRINT_ALIAS_INSTR
3131 #include "X86GenAsmWriter.inc"
3232
5050 }
5151
5252 StringRef X86ATTInstPrinter::getOpcodeName(unsigned Opcode) const {
53 return getInstructionName(Opcode);
53 return MII.getName(Opcode);
5454 }
5555
5656 void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
3636 // Autogenerated by tblgen.
3737 void printInstruction(const MCInst *MI, raw_ostream &OS);
3838 static const char *getRegisterName(unsigned RegNo);
39 static const char *getInstructionName(unsigned Opcode);
4039
4140 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
4241 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS);
1616 #include "X86InstComments.h"
1717 #include "MCTargetDesc/X86MCTargetDesc.h"
1818 #include "llvm/MC/MCInst.h"
19 #include "llvm/MC/MCAsmInfo.h"
2019 #include "llvm/MC/MCExpr.h"
20 #include "llvm/MC/MCInstrInfo.h"
2121 #include "llvm/Support/ErrorHandling.h"
2222 #include "llvm/Support/FormattedStream.h"
2323 #include
2424 using namespace llvm;
2525
26 // Include the auto-generated portion of the assembly writer.
27 #define GET_INSTRUCTION_NAME
2826 #include "X86GenAsmWriter1.inc"
2927
3028 void X86IntelInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
4341 EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
4442 }
4543 StringRef X86IntelInstPrinter::getOpcodeName(unsigned Opcode) const {
46 return getInstructionName(Opcode);
44 return MII.getName(Opcode);
4745 }
4846
4947 void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
3333 // Autogenerated by tblgen.
3434 void printInstruction(const MCInst *MI, raw_ostream &O);
3535 static const char *getRegisterName(unsigned RegNo);
36 static const char *getInstructionName(unsigned Opcode);
3736
3837 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
3938 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O);
564564 << "}\n";
565565 }
566566
567 void AsmWriterEmitter::EmitGetInstructionName(raw_ostream &O) {
568 CodeGenTarget Target(Records);
569 Record *AsmWriter = Target.getAsmWriter();
570 std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
571
572 const std::vector &NumberedInstructions =
573 Target.getInstructionsByEnumValue();
574
575 O <<
576 "\n\n#ifdef GET_INSTRUCTION_NAME\n"
577 "#undef GET_INSTRUCTION_NAME\n\n"
578 "/// getInstructionName: This method is automatically generated by tblgen\n"
579 "/// from the instruction set description. This returns the enum name of the\n"
580 "/// specified instruction.\n"
581 << "const char *" << Target.getName() << ClassName
582 << "::getInstructionName(unsigned Opcode) {\n"
583 << " assert(Opcode < " << NumberedInstructions.size()
584 << " && \"Invalid instruction number!\");\n"
585 << "\n";
586
587 SequenceToOffsetTable StringTable;
588 for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
589 const CodeGenInstruction &Inst = *NumberedInstructions[i];
590 StringTable.add(Inst.TheDef->getName());
591 }
592
593 StringTable.layout();
594 O << " static const char Strs[] = {\n";
595 StringTable.emit(O, printChar);
596 O << " };\n\n";
597
598 O << " static const unsigned InstAsmOffset[] = {";
599 for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
600 const CodeGenInstruction &Inst = *NumberedInstructions[i];
601
602 std::string AsmName = Inst.TheDef->getName();
603 if ((i % 14) == 0)
604 O << "\n ";
605
606 O << StringTable.get(AsmName) << ", ";
607 }
608 O << " };\n"
609 << "\n";
610
611 O << " return Strs+InstAsmOffset[Opcode];\n"
612 << "}\n\n#endif\n";
613 }
614
615567 namespace {
616568 // IAPrinter - Holds information about an InstAlias. Two InstAliases match if
617569 // they both have the same conditionals. In which case, we cannot print out the
964916
965917 EmitPrintInstruction(O);
966918 EmitGetRegisterName(O);
967 EmitGetInstructionName(O);
968919 EmitPrintAliasInstruction(O);
969920 }
970921
3636 private:
3737 void EmitPrintInstruction(raw_ostream &o);
3838 void EmitGetRegisterName(raw_ostream &o);
39 void EmitGetInstructionName(raw_ostream &o);
4039 void EmitPrintAliasInstruction(raw_ostream &O);
4140
4241 AsmWriterInst *getAsmWriterInstByID(unsigned ID) const {